diff options
| author | QMK Bot <hello@qmk.fm> | 2020-03-06 02:15:29 +0000 |
|---|---|---|
| committer | QMK Bot <hello@qmk.fm> | 2020-03-06 02:15:29 +0000 |
| commit | fd7b52cc64683683109cfb146670b76782a3c490 (patch) | |
| tree | 12a6e4e3645e373e7b2d016754e2c35e01cd173c /drivers/boards/BLACKPILL_STM32_F411 | |
| parent | d0d6fb27c485d865aa47d8eb1bc3a6cdf4c3708f (diff) | |
format code according to conventions [skip ci]
Diffstat (limited to 'drivers/boards/BLACKPILL_STM32_F411')
| -rw-r--r-- | drivers/boards/BLACKPILL_STM32_F411/board.c | 155 | ||||
| -rw-r--r-- | drivers/boards/BLACKPILL_STM32_F411/board.h | 1383 |
2 files changed, 359 insertions, 1179 deletions
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.c b/drivers/boards/BLACKPILL_STM32_F411/board.c index a06b52d14b..330e06c8aa 100644 --- a/drivers/boards/BLACKPILL_STM32_F411/board.c +++ b/drivers/boards/BLACKPILL_STM32_F411/board.c @@ -38,13 +38,13 @@ * @brief Type of STM32 GPIO port setup. */ typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; } gpio_setup_t; /** @@ -52,37 +52,37 @@ typedef struct { */ typedef struct { #if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; + gpio_setup_t PAData; #endif #if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; + gpio_setup_t PBData; #endif #if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; + gpio_setup_t PCData; #endif #if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; + gpio_setup_t PDData; #endif #if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; + gpio_setup_t PEData; #endif #if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; + gpio_setup_t PFData; #endif #if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; + gpio_setup_t PGData; #endif #if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; + gpio_setup_t PHData; #endif #if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; + gpio_setup_t PIData; #endif #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; + gpio_setup_t PJData; #endif #if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; + gpio_setup_t PKData; #endif } gpio_config_t; @@ -91,48 +91,37 @@ typedef struct { */ static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, #endif #if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, #endif #if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, #endif #if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, #endif #if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, #endif #if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, #endif #if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, #endif #if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, #endif #if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, #endif #if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, - VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, #endif #if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, - VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; @@ -141,56 +130,54 @@ static const gpio_config_t gpio_default_config = { /*===========================================================================*/ static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; } static void stm32_gpio_init(void) { + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB1(STM32_GPIO_EN_MASK); - rccEnableAHB1(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ + /* Initializing all the defined GPIO ports.*/ #if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); + gpio_init(GPIOA, &gpio_default_config.PAData); #endif #if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); + gpio_init(GPIOB, &gpio_default_config.PBData); #endif #if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); + gpio_init(GPIOC, &gpio_default_config.PCData); #endif #if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); + gpio_init(GPIOD, &gpio_default_config.PDData); #endif #if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); + gpio_init(GPIOE, &gpio_default_config.PEData); #endif #if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); + gpio_init(GPIOF, &gpio_default_config.PFData); #endif #if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); + gpio_init(GPIOG, &gpio_default_config.PGData); #endif #if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); + gpio_init(GPIOH, &gpio_default_config.PHData); #endif #if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); + gpio_init(GPIOI, &gpio_default_config.PIData); #endif #if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif #if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); + gpio_init(GPIOK, &gpio_default_config.PKData); #endif } @@ -210,10 +197,10 @@ __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} * else. */ void __early_init(void) { - enter_bootloader_mode_if_requested(); + enter_bootloader_mode_if_requested(); - stm32_gpio_init(); - stm32_clock_init(); + stm32_gpio_init(); + stm32_clock_init(); } #if HAL_USE_SDC || defined(__DOXYGEN__) @@ -221,20 +208,18 @@ void __early_init(void) { * @brief SDC card detection. */ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; } /** * @brief SDC card write protection detection. */ bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; } #endif /* HAL_USE_SDC */ @@ -243,20 +228,18 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) { * @brief MMC_SPI card detection. */ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; + (void)mmcp; + /* TODO: Fill the implementation.*/ + return true; } /** * @brief MMC_SPI card write protection detection. */ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; + (void)mmcp; + /* TODO: Fill the implementation.*/ + return false; } #endif @@ -264,6 +247,4 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @brief Board-specific initialization code. * @todo Add your board-specific code, if any. */ -void boardInit(void) { - -} +void boardInit(void) {} diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.h b/drivers/boards/BLACKPILL_STM32_F411/board.h index f6a527a376..c0613b4a71 100644 --- a/drivers/boards/BLACKPILL_STM32_F411/board.h +++ b/drivers/boards/BLACKPILL_STM32_F411/board.h @@ -34,7 +34,7 @@ * Board identifier. */ #define BOARD_BLACKPILL_STM32_F411 -#define BOARD_NAME "STM32F411CEU6 blackpill" +#define BOARD_NAME "STM32F411CEU6 blackpill" /* * Allow Board to boot USB without extra A9 hardware/software config @@ -45,11 +45,11 @@ * Board oscillators-related settings. */ #if !defined(STM32_LSECLK) -#define STM32_LSECLK 32768U +# define STM32_LSECLK 32768U #endif #if !defined(STM32_HSECLK) -#define STM32_HSECLK 25000000U +# define STM32_HSECLK 25000000U #endif //#define STM32_HSE_BYPASS @@ -58,7 +58,7 @@ * Board voltages. * Required for performance limits calculation. */ -#define STM32_VDD 300U +#define STM32_VDD 300U /* * MCU type as defined in the ST header. @@ -68,213 +68,213 @@ /* * IO pins assignments. */ -#define GPIOA_ARD_A0 0U -#define GPIOA_ADC1_IN0 0U -#define GPIOA_ARD_A1 1U -#define GPIOA_ADC1_IN1 1U -#define GPIOA_ARD_D1 2U -#define GPIOA_USART2_TX 2U -#define GPIOA_ARD_D0 3U -#define GPIOA_USART2_RX 3U -#define GPIOA_ARD_A2 4U -#define GPIOA_ADC1_IN4 4U -#define GPIOA_LED_GREEN 5U -#define GPIOA_ARD_D13 5U -#define GPIOA_ARD_D12 6U -#define GPIOA_ARD_D11 7U -#define GPIOA_ARD_D7 8U -#define GPIOA_ARD_D8 9U -#define GPIOA_ARD_D2 10U -#define GPIOA_OTG_FS_DM 11U -#define GPIOA_OTG_FS_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_ARD_A3 0U -#define GPIOB_ADC1_IN8 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_SWO 3U -#define GPIOB_ARD_D3 3U -#define GPIOB_ARD_D5 4U -#define GPIOB_ARD_D4 5U -#define GPIOB_ARD_D10 6U -#define GPIOB_PIN7 7U -#define GPIOB_ARD_D15 8U -#define GPIOB_ARD_D14 9U -#define GPIOB_ARD_D6 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_ARD_A5 0U -#define GPIOC_ADC1_IN10 0U -#define GPIOC_ARD_A4 1U -#define GPIOC_ADC1_IN11 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_ARD_D9 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_BUTTON 13U -#define GPIOC_OSC32_IN 14U -#define GPIOC_OSC32_OUT 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_PIN0 0U -#define GPIOF_PIN1 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_OSC_IN 0U -#define GPIOH_OSC_OUT 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -#define GPIOI_PIN0 0U -#define GPIOI_PIN1 1U -#define GPIOI_PIN2 2U -#define GPIOI_PIN3 3U -#define GPIOI_PIN4 4U -#define GPIOI_PIN5 5U -#define GPIOI_PIN6 6U -#define GPIOI_PIN7 7U -#define GPIOI_PIN8 8U -#define GPIOI_PIN9 9U -#define GPIOI_PIN10 10U -#define GPIOI_PIN11 11U -#define GPIOI_PIN12 12U -#define GPIOI_PIN13 13U -#define GPIOI_PIN14 14U -#define GPIOI_PIN15 15U +#define GPIOA_ARD_A0 0U +#define GPIOA_ADC1_IN0 0U +#define GPIOA_ARD_A1 1U +#define GPIOA_ADC1_IN1 1U +#define GPIOA_ARD_D1 2U +#define GPIOA_USART2_TX 2U +#define GPIOA_ARD_D0 3U +#define GPIOA_USART2_RX 3U +#define GPIOA_ARD_A2 4U +#define GPIOA_ADC1_IN4 4U +#define GPIOA_LED_GREEN 5U +#define GPIOA_ARD_D13 5U +#define GPIOA_ARD_D12 6U +#define GPIOA_ARD_D11 7U +#define GPIOA_ARD_D7 8U +#define GPIOA_ARD_D8 9U +#define GPIOA_ARD_D2 10U +#define GPIOA_OTG_FS_DM 11U +#define GPIOA_OTG_FS_DP 12U +#define GPIOA_SWDIO 13U +#define GPIOA_SWCLK 14U +#define GPIOA_PIN15 15U + +#define GPIOB_ARD_A3 0U +#define GPIOB_ADC1_IN8 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_SWO 3U +#define GPIOB_ARD_D3 3U +#define GPIOB_ARD_D5 4U +#define GPIOB_ARD_D4 5U +#define GPIOB_ARD_D10 6U +#define GPIOB_PIN7 7U +#define GPIOB_ARD_D15 8U +#define GPIOB_ARD_D14 9U +#define GPIOB_ARD_D6 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_PIN13 13U +#define GPIOB_PIN14 14U +#define GPIOB_PIN15 15U + +#define GPIOC_ARD_A5 0U +#define GPIOC_ADC1_IN10 0U +#define GPIOC_ARD_A4 1U +#define GPIOC_ADC1_IN11 1U +#define GPIOC_PIN2 2U +#define GPIOC_PIN3 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_PIN6 6U +#define GPIOC_ARD_D9 7U +#define GPIOC_PIN8 8U +#define GPIOC_PIN9 9U +#define GPIOC_PIN10 10U +#define GPIOC_PIN11 11U +#define GPIOC_PIN12 12U +#define GPIOC_BUTTON 13U +#define GPIOC_OSC32_IN 14U +#define GPIOC_OSC32_OUT 15U + +#define GPIOD_PIN0 0U +#define GPIOD_PIN1 1U +#define GPIOD_PIN2 2U +#define GPIOD_PIN3 3U +#define GPIOD_PIN4 4U +#define GPIOD_PIN5 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +#define GPIOD_PIN12 12U +#define GPIOD_PIN13 13U +#define GPIOD_PIN14 14U +#define GPIOD_PIN15 15U + +#define GPIOE_PIN0 0U +#define GPIOE_PIN1 1U +#define GPIOE_PIN2 2U +#define GPIOE_PIN3 3U +#define GPIOE_PIN4 4U +#define GPIOE_PIN5 5U +#define GPIOE_PIN6 6U +#define GPIOE_PIN7 7U +#define GPIOE_PIN8 8U +#define GPIOE_PIN9 9U +#define GPIOE_PIN10 10U +#define GPIOE_PIN11 11U +#define GPIOE_PIN12 12U +#define GPIOE_PIN13 13U +#define GPIOE_PIN14 14U +#define GPIOE_PIN15 15U + +#define GPIOF_PIN0 0U +#define GPIOF_PIN1 1U +#define GPIOF_PIN2 2U +#define GPIOF_PIN3 3U +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U +#define GPIOF_PIN8 8U +#define GPIOF_PIN9 9U +#define GPIOF_PIN10 10U +#define GPIOF_PIN11 11U +#define GPIOF_PIN12 12U +#define GPIOF_PIN13 13U +#define GPIOF_PIN14 14U +#define GPIOF_PIN15 15U + +#define GPIOG_PIN0 0U +#define GPIOG_PIN1 1U +#define GPIOG_PIN2 2U +#define GPIOG_PIN3 3U +#define GPIOG_PIN4 4U +#define GPIOG_PIN5 5U +#define GPIOG_PIN6 6U +#define GPIOG_PIN7 7U +#define GPIOG_PIN8 8U +#define GPIOG_PIN9 9U +#define GPIOG_PIN10 10U +#define GPIOG_PIN11 11U +#define GPIOG_PIN12 12U +#define GPIOG_PIN13 13U +#define GPIOG_PIN14 14U +#define GPIOG_PIN15 15U + +#define GPIOH_OSC_IN 0U +#define GPIOH_OSC_OUT 1U +#define GPIOH_PIN2 2U +#define GPIOH_PIN3 3U +#define GPIOH_PIN4 4U +#define GPIOH_PIN5 5U +#define GPIOH_PIN6 6U +#define GPIOH_PIN7 7U +#define GPIOH_PIN8 8U +#define GPIOH_PIN9 9U +#define GPIOH_PIN10 10U +#define GPIOH_PIN11 11U +#define GPIOH_PIN12 12U +#define GPIOH_PIN13 13U +#define GPIOH_PIN14 14U +#define GPIOH_PIN15 15U + +#define GPIOI_PIN0 0U +#define GPIOI_PIN1 1U +#define GPIOI_PIN2 2U +#define GPIOI_PIN3 3U +#define GPIOI_PIN4 4U +#define GPIOI_PIN5 5U +#define GPIOI_PIN6 6U +#define GPIOI_PIN7 7U +#define GPIOI_PIN8 8U +#define GPIOI_PIN9 9U +#define GPIOI_PIN10 10U +#define GPIOI_PIN11 11U +#define GPIOI_PIN12 12U +#define GPIOI_PIN13 13U +#define GPIOI_PIN14 14U +#define GPIOI_PIN15 15U /* * IO lines assignments. */ -#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) -#define LINE_ADC1_IN0 PAL_LINE(GPIOA, 0U) -#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) -#define LINE_ADC1_IN1 PAL_LINE(GPIOA, 1U) -#define LINE_ARD_D1 PAL_LINE(GPIOA, 2U) -#define LINE_USART2_TX PAL_LINE(GPIOA, 2U) -#define LINE_ARD_D0 PAL_LINE(GPIOA, 3U) -#define LINE_USART2_RX PAL_LINE(GPIOA, 3U) -#define LINE_ARD_A2 PAL_LINE(GPIOA, 4U) -#define LINE_ADC1_IN4 PAL_LINE(GPIOA, 4U) -#define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) -#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) -#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) -#define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) -#define LINE_ARD_D7 PAL_LINE(GPIOA, 8U) -#define LINE_ARD_D8 PAL_LINE(GPIOA, 9U) -#define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) -#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) -#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) -#define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) -#define LINE_SWO PAL_LINE(GPIOB, 3U) -#define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) -#define LINE_ARD_D5 PAL_LINE(GPIOB, 4U) -#define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) -#define LINE_ARD_D10 PAL_LINE(GPIOB, 6U) -#define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) -#define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) -#define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) -#define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) -#define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) -#define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) -#define LINE_ADC1_IN11 PAL_LINE(GPIOC, 1U) -#define LINE_ARD_D9 PAL_LINE(GPIOC, 7U) -#define LINE_BUTTON PAL_LINE(GPIOC, 13U) -#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) -#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) +#define LINE_ADC1_IN0 PAL_LINE(GPIOA, 0U) +#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) +#define LINE_ADC1_IN1 PAL_LINE(GPIOA, 1U) +#define LINE_ARD_D1 PAL_LINE(GPIOA, 2U) +#define LINE_USART2_TX PAL_LINE(GPIOA, 2U) +#define LINE_ARD_D0 PAL_LINE(GPIOA, 3U) +#define LINE_USART2_RX PAL_LINE(GPIOA, 3U) +#define LINE_ARD_A2 PAL_LINE(GPIOA, 4U) +#define LINE_ADC1_IN4 PAL_LINE(GPIOA, 4U) +#define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) +#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) +#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) +#define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) +#define LINE_ARD_D7 PAL_LINE(GPIOA, 8U) +#define LINE_ARD_D8 PAL_LINE(GPIOA, 9U) +#define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) +#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) +#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) +#define LINE_SWDIO PAL_LINE(GPIOA, 13U) +#define LINE_SWCLK PAL_LINE(GPIOA, 14U) +#define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) +#define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) +#define LINE_SWO PAL_LINE(GPIOB, 3U) +#define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) +#define LINE_ARD_D5 PAL_LINE(GPIOB, 4U) +#define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) +#define LINE_ARD_D10 PAL_LINE(GPIOB, 6U) +#define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) +#define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) +#define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) +#define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) +#define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) +#define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) +#define LINE_ADC1_IN11 PAL_LINE(GPIOC, 1U) +#define LINE_ARD_D9 PAL_LINE(GPIOC, 7U) +#define LINE_BUTTON PAL_LINE(GPIOC, 13U) +#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) +#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) /*===========================================================================*/ /* Driver pre-compile time settings. */ @@ -297,22 +297,22 @@ * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) +#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) +#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) +#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) +#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) +#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) +#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) +#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) /* * GPIOA setup: @@ -334,102 +334,13 @@ * PA14 - SWCLK (alternate 0). * PA15 - PIN15 (input pullup). */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \ - PIN_MODE_INPUT(GPIOA_ARD_A1) | \ - PIN_MODE_ALTERNATE(GPIOA_ARD_D1) | \ - PIN_MODE_ALTERNATE(GPIOA_ARD_D0) | \ - PIN_MODE_INPUT(GPIOA_ARD_A2) | \ - PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | \ - PIN_MODE_INPUT(GPIOA_ARD_D12) | \ - PIN_MODE_INPUT(GPIOA_ARD_D11) | \ - PIN_MODE_INPUT(GPIOA_ARD_D7) | \ - PIN_MODE_INPUT(GPIOA_ARD_D8) | \ - PIN_MODE_INPUT(GPIOA_ARD_D2) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \ - PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) | \ - PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_A2) | \ - PIN_OSPEED_MEDIUM(GPIOA_LED_GREEN) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D12) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D11) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D7) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D8) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \ - PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \ - PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \ - PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ - PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ - PIN_OSPEED_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \ - PIN_PUPDR_FLOATING(GPIOA_ARD_D1) | \ - PIN_PUPDR_FLOATING(GPIOA_ARD_D0) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \ - PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D7) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D8) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ - PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ - PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \ - PIN_ODR_HIGH(GPIOA_ARD_A1) | \ - PIN_ODR_HIGH(GPIOA_ARD_D1) | \ - PIN_ODR_HIGH(GPIOA_ARD_D0) | \ - PIN_ODR_HIGH(GPIOA_ARD_A2) | \ - PIN_ODR_LOW(GPIOA_LED_GREEN) | \ - PIN_ODR_HIGH(GPIOA_ARD_D12) | \ - PIN_ODR_HIGH(GPIOA_ARD_D11) | \ - PIN_ODR_HIGH(GPIOA_ARD_D7) | \ - PIN_ODR_HIGH(GPIOA_ARD_D8) | \ - PIN_ODR_HIGH(GPIOA_ARD_D2) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ - PIN_ODR_HIGH(GPIOA_SWDIO) | \ - PIN_ODR_HIGH(GPIOA_SWCLK) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D1, 7U) | \ - PIN_AFIO_AF(GPIOA_ARD_D0, 7U) | \ - PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \ - PIN_AFIO_AF(GPIOA_LED_GREEN, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D11, 0U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D8, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0U)) +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | PIN_MODE_INPUT(GPIOA_ARD_A1) | PIN_MODE_ALTERNATE(GPIOA_ARD_D1) | PIN_MODE_ALTERNATE(GPIOA_ARD_D0) | PIN_MODE_INPUT(GPIOA_ARD_A2) | PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | PIN_MODE_INPUT(GPIOA_ARD_D12) | PIN_MODE_INPUT(GPIOA_ARD_D11) | PIN_MODE_INPUT(GPIOA_ARD_D7) | PIN_MODE_INPUT(GPIOA_ARD_D8) | PIN_MODE_INPUT(GPIOA_ARD_D2) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | PIN_OSPEED_HIGH(GPIOA_ARD_A1) | PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) | PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) | PIN_OSPEED_HIGH(GPIOA_ARD_A2) | PIN_OSPEED_MEDIUM(GPIOA_LED_GREEN) | PIN_OSPEED_HIGH(GPIOA_ARD_D12) | PIN_OSPEED_HIGH(GPIOA_ARD_D11) | PIN_OSPEED_HIGH(GPIOA_ARD_D7) | PIN_OSPEED_HIGH(GPIOA_ARD_D8) | PIN_OSPEED_HIGH(GPIOA_ARD_D2) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | PIN_PUPDR_FLOATING(GPIOA_ARD_D1) | PIN_PUPDR_FLOATING(GPIOA_ARD_D0) | PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | PIN_PUPDR_PULLUP(GPIOA_ARD_D7) | PIN_PUPDR_PULLUP(GPIOA_ARD_D8) | PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | PIN_ODR_HIGH(GPIOA_ARD_A1) | PIN_ODR_HIGH(GPIOA_ARD_D1) | PIN_ODR_HIGH(GPIOA_ARD_D0) | PIN_ODR_HIGH(GPIOA_ARD_A2) | PIN_ODR_LOW(GPIOA_LED_GREEN) | PIN_ODR_HIGH(GPIOA_ARD_D12) | PIN_ODR_HIGH(GPIOA_ARD_D11) | PIN_ODR_HIGH(GPIOA_ARD_D7) | PIN_ODR_HIGH(GPIOA_ARD_D8) | PIN_ODR_HIGH(GPIOA_ARD_D2) | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | PIN_AFIO_AF(GPIOA_ARD_D1, 7U) | PIN_AFIO_AF(GPIOA_ARD_D0, 7U) | PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | PIN_AFIO_AF(GPIOA_LED_GREEN, 0U) | PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | PIN_AFIO_AF(GPIOA_ARD_D11, 0U)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) | PIN_AFIO_AF(GPIOA_ARD_D8, 0U) | PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) /* * GPIOB setup: @@ -451,102 +362,13 @@ * PB14 - PIN14 (input pullup). * PB15 - PIN15 (input pullup). */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT( |