diff options
25 files changed, 79 insertions, 2440 deletions
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c deleted file mode 100644 index 20b857d006..0000000000 --- a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c +++ /dev/null @@ -1,263 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - http://www.apache.org/licenses/LICENSE-2.0 - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include <hal.h> -#include <stm32_gpio.h> - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, - VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, - VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB(STM32_GPIO_EN_MASK); - rccEnableAHB(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Early initialization code. - * @details GPIO ports and system clocks are initialized before everything - * else. - */ -void __early_init(void) { - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { - -} diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h deleted file mode 100644 index 3c4f3f2e82..0000000000 --- a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h +++ /dev/null @@ -1,950 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - http://www.apache.org/licenses/LICENSE-2.0 - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#ifndef BOARD_H -#define BOARD_H - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/* - * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. - */ - -/* - * Board identifier. - */ -#define BOARD_ST_NUCLEO32_F042K6 -#define BOARD_NAME "STMicroelectronics STM32 Nucleo32-F042K6" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - * NOTE: HSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 0U -#endif - -/* - * MCU type as defined in the ST header. - */ -#define STM32F042x6 - -/* - * IO pins assignments. - */ -#define GPIOA_ARD_A0 0U -#define GPIOA_ARD_A1 1U -#define GPIOA_VCP_TX 2U -#define GPIOA_ARD_A2 3U -#define GPIOA_ARD_A3 4U -#define GPIOA_ARD_A4 5U -#define GPIOA_ARD_A5 6U -#define GPIOA_ARD_A6 7U -#define GPIOA_ARD_D9 8U -#define GPIOA_ARD_D1 9U -#define GPIOA_ARD_D0 10U -#define GPIOA_ARD_D10 11U -#define GPIOA_ARD_D2 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_VCP_RX 15U - -#define GPIOB_ARD_D3 0U -#define GPIOB_ARD_D6 1U -#define GPIOB_PIN2 2U -#define GPIOB_ARD_D13 3U -#define GPIOB_LED_GREEN 3U -#define GPIOB_ARD_D12 4U -#define GPIOB_ARD_D11 5U -#define GPIOB_ARD_D5 6U -#define GPIOB_ARD_A5_ALT 6U -#define GPIOB_ARD_D4 7U -#define GPIOB_ARD_A4_ALT 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_ARD_D7 0U -#define GPIOF_ARD_D8 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) -#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) -#define LINE_VCP_TX PAL_LINE(GPIOA, 2U) -#define LINE_ARD_A2 PAL_LINE(GPIOA, 3U) -#define LINE_ARD_A3 PAL_LINE(GPIOA, 4U) -#define LINE_ARD_A4 PAL_LINE(GPIOA, 5U) -#define LINE_ARD_A5 PAL_LINE(GPIOA, 6U) -#define LINE_ARD_A6 PAL_LINE(GPIOA, 7U) -#define LINE_ARD_D9 PAL_LINE(GPIOA, 8U) -#define LINE_ARD_D1 PAL_LINE(GPIOA, 9U) -#define LINE_ARD_D0 PAL_LINE(GPIOA, 10U) -#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U) -#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_VCP_RX PAL_LINE(GPIOA, 15U) -#define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) -#define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) -#define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) -#define LINE_LED_GREEN PAL_LINE(GPIOB, 3U) -#define LINE_ARD_D12 PAL_LINE(GPIOB, 4U) -#define LINE_ARD_D11 PAL_LINE(GPIOB, 5U) -#define LINE_ARD_D5 PAL_LINE(GPIOB, 6U) -#define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) -#define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) -#define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) -#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) -#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - ARD_A0 (input pullup). - * PA1 - ARD_A1 (input pullup). - * PA2 - VCP_TX (alternate 1). - * PA3 - ARD_A2 (input pullup). - * PA4 - ARD_A3 (input pullup). - * PA5 - ARD_A4 (input pullup). - * PA6 - ARD_A5 (input pullup). - * PA7 - ARD_A6 (input pullup). - * PA8 - ARD_D9 (input pullup). - * PA9 - ARD_D1 (input pullup). - * PA10 - ARD_D0 (input pullup). - * PA11 - ARD_D10 (input pullup). - * PA12 - ARD_D2 (input pullup). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - VCP_RX (alternate 1). - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \ - PIN_MODE_INPUT(GPIOA_ARD_A1) | \ - PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \ - PIN_MODE_INPUT(GPIOA_ARD_A2) | \ - PIN_MODE_INPUT(GPIOA_ARD_A3) | \ - PIN_MODE_INPUT(GPIOA_ARD_A4) | \ - PIN_MODE_INPUT(GPIOA_ARD_A5) | \ - PIN_MODE_INPUT(GPIOA_ARD_A6) | \ - PIN_MODE_INPUT(GPIOA_ARD_D9) | \ - PIN_MODE_INPUT(GPIOA_ARD_D1) | \ - PIN_MODE_INPUT(GPIOA_ARD_D0) | \ - PIN_MODE_INPUT(GPIOA_ARD_D10) | \ - PIN_MODE_INPUT(GPIOA_ARD_D2) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_ALTERNATE(GPIOA_VCP_RX)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \ - PIN_OSPEED_LOW(GPIOA_VCP_TX) | \ - PIN_OSPEED_LOW(GPIOA_ARD_A2) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \ - PIN_OSPEED_LOW(GPIOA_ARD_A4) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \ - PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \ - PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ - PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ - PIN_OSPEED_HIGH(GPIOA_VCP_RX)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \ - PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \ - PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \ - PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ - PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUPDR_FLOATING(GPIOA_VCP_RX)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \ - PIN_ODR_HIGH(GPIOA_ARD_A1) | \ - PIN_ODR_HIGH(GPIOA_VCP_TX) | \ - PIN_ODR_HIGH(GPIOA_ARD_A2) | \ - PIN_ODR_HIGH(GPIOA_ARD_A3) | \ - PIN_ODR_LOW(GPIOA_ARD_A4) | \ - PIN_ODR_HIGH(GPIOA_ARD_A5) | \ - PIN_ODR_HIGH(GPIOA_ARD_A6) | \ - PIN_ODR_HIGH(GPIOA_ARD_D9) | \ - PIN_ODR_HIGH(GPIOA_ARD_D1) | \ - PIN_ODR_HIGH(GPIOA_ARD_D0) | \ - PIN_ODR_HIGH(GPIOA_ARD_D10) | \ - PIN_ODR_HIGH(GPIOA_ARD_D2) | \ - PIN_ODR_HIGH(GPIOA_SWDIO) | \ - PIN_ODR_HIGH(GPIOA_SWCLK) | \ - PIN_ODR_HIGH(GPIOA_VCP_RX)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \ - PIN_AFIO_AF(GPIOA_VCP_TX, 1U) | \ - PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_A3, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_A4, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_A5, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_A6, 0U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D1, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D0, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \ - PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ - PIN_AFIO_AF(GPIOA_VCP_RX, 1U)) - -/* - * GPIOB setup: - * - * PB0 - ARD_D3 (input pullup). - * PB1 - ARD_D6 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - ARD_D13 LED_GREEN (output pushpull maximum). - * PB4 - ARD_D12 (input pullup). - * PB5 - ARD_D11 (input pullup). - * PB6 - ARD_D5 ARD_A5_ALT (input pullup). - * PB7 - ARD_D4 ARD_A4_ALT (input pullup). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \ - PIN_MODE_INPUT(GPIOB_ARD_D6) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \ - PIN_MODE_INPUT(GPIOB_ARD_D12) | \ - PIN_MODE_INPUT(GPIOB_ARD_D11) | \ - PIN_MODE_INPUT(GPIOB_ARD_D5) | \ - PIN_MODE_INPUT(GPIOB_ARD_D4) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \ - PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \ - PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \ - PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \ - PIN_OSPEED_HIGH(GPIOB_PIN2) | \ - PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \ - PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \ - PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \ - PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \ - PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \ - PIN_OSPEED_HIGH(GPIOB_PIN8) | \ - PIN_OSPEED_HIGH(GPIOB_PIN9) | \ - PIN_OSPEED_HIGH(GPIOB_PIN10) | \ - PIN_OSPEED_HIGH(GPIOB_PIN11) | \ - PIN_OSPEED_HIGH(GPIOB_PIN12) | \ - PIN_OSPEED_HIGH(GPIOB_PIN13) | \ - PIN_OSPEED_HIGH(GPIOB_PIN14) | \ - PIN_OSPEED_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \ - PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \ - PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \ - PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \ - PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \ - PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \ - PIN_ODR_HIGH(GPIOB_ARD_D6) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_LOW(GPIOB_ARD_D13) | \ - PIN_ODR_HIGH(GPIOB_ARD_D12) | \ - PIN_ODR_HIGH(GPIOB_ARD_D11) | \ - PIN_ODR_HIGH(GPIOB_ARD_D5) | \ - PIN_ODR_HIGH(GPIOB_ARD_D4) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \ - PIN_AFIO_AF(GPI |