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authorJoel Challis <git@zvecr.com>2021-07-22 23:01:19 +0100
committerGitHub <noreply@github.com>2021-07-22 23:01:19 +0100
commit5d7f2823c947264d3ff3bb4f057f8e050d6b4af1 (patch)
treea1cfdefd57fd2fcc7afcc1fa025da25538cc692d /tmk_core
parent95a7c2282466252641a1d0bb1b15d50752193f4b (diff)
Implement GPIO abstraction for atsam (#13567)
* Implement GPIO abstraction for atsam * Convert Drop boards to normal matrix config * Work round pin conflicts and matrix delay
Diffstat (limited to 'tmk_core')
-rw-r--r--tmk_core/common/arm_atsam/atomic_util.h37
-rw-r--r--tmk_core/common/arm_atsam/gpio.h71
-rw-r--r--tmk_core/common/arm_atsam/pin_defs.h84
3 files changed, 192 insertions, 0 deletions
diff --git a/tmk_core/common/arm_atsam/atomic_util.h b/tmk_core/common/arm_atsam/atomic_util.h
new file mode 100644
index 0000000000..848542d23a
--- /dev/null
+++ b/tmk_core/common/arm_atsam/atomic_util.h
@@ -0,0 +1,37 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "samd51j18a.h"
+
+static __inline__ uint8_t __interrupt_disable__(void) {
+ __disable_irq();
+
+ return 1;
+}
+
+static __inline__ void __interrupt_enable__(const uint8_t *__s) {
+ __enable_irq();
+
+ __asm__ volatile("" ::: "memory");
+ (void)__s;
+}
+
+#define ATOMIC_BLOCK(type) for (type, __ToDo = __interrupt_disable__(); __ToDo; __ToDo = 0)
+#define ATOMIC_FORCEON uint8_t sreg_save __attribute__((__cleanup__(__interrupt_enable__))) = 0
+
+#define ATOMIC_BLOCK_RESTORESTATE _Static_assert(0, "ATOMIC_BLOCK_RESTORESTATE not implemented")
+#define ATOMIC_BLOCK_FORCEON ATOMIC_BLOCK(ATOMIC_FORCEON)
diff --git a/tmk_core/common/arm_atsam/gpio.h b/tmk_core/common/arm_atsam/gpio.h
new file mode 100644
index 0000000000..c2d5a30889
--- /dev/null
+++ b/tmk_core/common/arm_atsam/gpio.h
@@ -0,0 +1,71 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "stdint.h"
+#include "samd51j18a.h"
+
+#include "pin_defs.h"
+
+typedef uint8_t pin_t;
+
+#define SAMD_PORT(pin) ((pin & 0x20) >> 5)
+#define SAMD_PIN(pin) (pin & 0x1f)
+#define SAMD_PIN_MASK(pin) (1 << (pin & 0x1f))
+
+#define setPinInput(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \
+ PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define setPinInputHigh(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.PULLEN = 1; \
+ } while (0)
+
+#define setPinInputLow(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.PULLEN = 1; \
+ } while (0)
+
+#define setPinOutput(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].DIRSET.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define writePinHigh(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define writePinLow(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define writePin(pin, level) ((level) ? (writePinHigh(pin)) : (writePinLow(pin)))
+
+#define readPin(pin) ((PORT->Group[SAMD_PORT(pin)].IN.reg & SAMD_PIN_MASK(pin)) != 0)
+
+#define togglePin(pin) (PORT->Group[SAMD_PORT(pin)].OUTTGL.reg = SAMD_PIN_MASK(pin))
diff --git a/tmk_core/common/arm_atsam/pin_defs.h b/tmk_core/common/arm_atsam/pin_defs.h
new file mode 100644
index 0000000000..5b50b23910
--- /dev/null
+++ b/tmk_core/common/arm_atsam/pin_defs.h
@@ -0,0 +1,84 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "samd51j18a.h"
+
+#define A00 PIN_PA00
+#define A01 PIN_PA01
+#define A02 PIN_PA02
+#define A03 PIN_PA03
+#define A04 PIN_PA04
+#define A05 PIN_PA05
+#define A06 PIN_PA06
+#define A07 PIN_PA07
+#define A08 PIN_PA08
+#define A09 PIN_PA09
+#define A10 PIN_PA10
+#define A11 PIN_PA11
+#define A12 PIN_PA12
+#define A13 PIN_PA13
+#define A14 PIN_PA14
+#define A15 PIN_PA15
+#define A16 PIN_PA16
+#define A17 PIN_PA17
+#define A18 PIN_PA18
+#define A19 PIN_PA19
+#define A20 PIN_PA20
+#define A21 PIN_PA21
+#define A22 PIN_PA22
+#define A23 PIN_PA23
+#define A24 PIN_PA24
+#define A25 PIN_PA25
+#define A26 PIN_PA26
+#define A27 PIN_PA27
+#define A28 PIN_PA28
+#define A29 PIN_PA29
+#define A30 PIN_PA30
+#define A31 PIN_PA31
+
+#define B00 PIN_PB00
+#define B01 PIN_PB01
+#define B02 PIN_PB02
+#define B03 PIN_PB03
+#define B04 PIN_PB04
+#define B05 PIN_PB05
+#define B06 PIN_PB06
+#define B07 PIN_PB07
+#define B08 PIN_PB08
+#define B09 PIN_PB09
+#define B10 PIN_PB10
+#define B11 PIN_PB11
+#define B12 PIN_PB12
+#define B13 PIN_PB13
+#define B14 PIN_PB14
+#define B15 PIN_PB15
+#define B16 PIN_PB16
+#define B17 PIN_PB17
+#define B18 PIN_PB18
+#define B19 PIN_PB19
+#define B20 PIN_PB20
+#define B21 PIN_PB21
+#define B22 PIN_PB22
+#define B23 PIN_PB23
+#define B24 PIN_PB24
+#define B25 PIN_PB25
+#define B26 PIN_PB26
+#define B27 PIN_PB27
+#define B28 PIN_PB28
+#define B29 PIN_PB29
+#define B30 PIN_PB30
+#define B31 PIN_PB31