diff options
| author | tmk <nobody@nowhere> | 2011-02-09 00:03:58 +0900 |
|---|---|---|
| committer | tmk <nobody@nowhere> | 2011-02-22 03:08:59 +0900 |
| commit | acc974c64b1e17e6807133fdc50de5bb34aedda5 (patch) | |
| tree | 7af7511a56d680a4d93b535c52891a8ffc15dd04 /pjrc/jump_bootloader.c | |
| parent | 5552b5afeaa9ce7432f9ded3586984253f292d80 (diff) | |
added protocol stack: pjrc, vusb
Diffstat (limited to 'pjrc/jump_bootloader.c')
| -rw-r--r-- | pjrc/jump_bootloader.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/pjrc/jump_bootloader.c b/pjrc/jump_bootloader.c new file mode 100644 index 0000000000..5710e052f5 --- /dev/null +++ b/pjrc/jump_bootloader.c @@ -0,0 +1,40 @@ +// this code from: +// http://www.pjrc.com/teensy/jump_to_bootloader.html +#include <avr/io.h> +#include <avr/interrupt.h> +#include <util/delay.h> + +void jump_bootloader(void) { + cli(); + // disable watchdog, if enabled + // disable all peripherals + UDCON = 1; + USBCON = (1<<FRZCLK); // disable USB + UCSR1B = 0; + _delay_ms(5); +#if defined(__AVR_AT90USB162__) // Teensy 1.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; + TIMSK0 = 0; TIMSK1 = 0; UCSR1B = 0; + DDRB = 0; DDRC = 0; DDRD = 0; + PORTB = 0; PORTC = 0; PORTD = 0; + asm volatile("jmp 0x3E00"); +#elif defined(__AVR_ATmega32U4__) // Teensy 2.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; + TIMSK0 = 0; TIMSK1 = 0; TIMSK3 = 0; TIMSK4 = 0; UCSR1B = 0; TWCR = 0; + DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; TWCR = 0; + PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; + asm volatile("jmp 0x7E00"); +#elif defined(__AVR_AT90USB646__) // Teensy++ 1.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; + TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0; + DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; + PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; + asm volatile("jmp 0xFC00"); +#elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; + TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0; + DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; + PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; + asm volatile("jmp 0x1FC00"); +#endif +} |