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authorJack Humbert <jack.humb@gmail.com>2017-08-23 22:29:07 -0400
committerGitHub <noreply@github.com>2017-08-23 22:29:07 -0400
commitd2ff66a985b938e87fffe55c1d9f1dc55e356f91 (patch)
tree561b3e203033849573a17f5ac6248077ab687676 /keyboards/ergodox_infinity
parent7260fc3eef98fb7b0e2ed24d3d0d14cf2e613000 (diff)
Creates a layouts/ folder for keymaps shared between keyboards (#1609)
* include variables and .h files as pp directives * start layout compilation * split ergodoxes up * don't compile all layouts for everything * might seg fault * reset layouts variable * actually reset layouts * include rules.mk instead * remove includes from rules.mk * update variable setting * load visualizer from path * adds some more examples * adds more layouts * more boards added * more boards added * adds documentation for layouts * use lowercase names for LAYOUT_ * add layout.json files for each layout * add community folder, default keymaps for layouts * touch-up default layouts * touch-up layouts, some keyboard rules.mk * update documentation for layouts * fix up serial/i2c switches
Diffstat (limited to 'keyboards/ergodox_infinity')
-rw-r--r--keyboards/ergodox_infinity/MEMO.txt385
-rw-r--r--keyboards/ergodox_infinity/Makefile3
-rw-r--r--keyboards/ergodox_infinity/board_is31fl3731c.h110
-rw-r--r--keyboards/ergodox_infinity/board_st7565.h113
-rw-r--r--keyboards/ergodox_infinity/bootloader_defs.h1
-rw-r--r--keyboards/ergodox_infinity/chconf.h524
-rw-r--r--keyboards/ergodox_infinity/config.h98
-rw-r--r--keyboards/ergodox_infinity/ergodox_infinity.c195
-rw-r--r--keyboards/ergodox_infinity/ergodox_infinity.h123
-rw-r--r--keyboards/ergodox_infinity/gfxconf.h27
-rw-r--r--keyboards/ergodox_infinity/halconf.h353
-rw-r--r--keyboards/ergodox_infinity/led.c26
-rw-r--r--keyboards/ergodox_infinity/matrix.c173
-rw-r--r--keyboards/ergodox_infinity/mcuconf.h74
-rw-r--r--keyboards/ergodox_infinity/readme.md45
-rw-r--r--keyboards/ergodox_infinity/rules.mk89
-rw-r--r--keyboards/ergodox_infinity/simple_visualizer.h123
-rw-r--r--keyboards/ergodox_infinity/visualizer.c329
18 files changed, 2791 insertions, 0 deletions
diff --git a/keyboards/ergodox_infinity/MEMO.txt b/keyboards/ergodox_infinity/MEMO.txt
new file mode 100644
index 0000000000..e2886aa002
--- /dev/null
+++ b/keyboards/ergodox_infinity/MEMO.txt
@@ -0,0 +1,385 @@
+flabbergast's TMK/ChibiOS port
+==============================
+2015/10/16
+
+
+Build
+-----
+$ git clone -b chibios https://github.com/flabbergast/tmk_keyboard.git
+
+$ cd tmk_keyboard
+$ git submodule add -f -b kinetis https://github.com/flabbergast/ChibiOS.git tmk_core/tool/chibios/chibios
+or
+$ cd tmk_keyboard/tmk_core/tool/chibios
+$ git clone -b kinetis https://github.com/flabbergast/ChibiOS.git tmk_core/tool/chibios/chibios
+
+$ cd tmk_keyboard/keyboard/infinity_chibios
+$ make
+
+
+
+
+Chibios Configuration
+---------------------
+halconf.h: for HAL configuration
+ placed in project directory
+ read in chibios/os/hal/hal.mk
+ included in chibios/os/hal/include/hal.h
+mcuconf.h: for MCU configuration
+ placed in project directory
+ included in halconf.h
+
+
+Chibios Term
+------------
+PAL = Port Abstraction Layer
+ palWritePad
+ palReadPad
+ palSetPad
+ chibios/os/hal/include/pal.h
+
+LLD = Low Level Driver
+
+
+Makefile
+--------
+ # <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
+ MCU_FAMILY = KINETIS
+ MCU_SERIES = KL2x
+
+ # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
+ # or <this_dir>/ld/
+ MCU_LDSCRIPT = MKL26Z64
+
+ # - it should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/
+ MCU_STARTUP = kl2x
+
+ # Board: it should exist either in <chibios>/os/hal/boards/
+ # or <this_dir>/boards
+ BOARD = PJRC_TEENSY_LC
+
+ MCU = cortex-m0
+
+ # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
+ ARMV = 6
+
+
+halconf.h
+---------
+
+
+mcuconf.h
+---------
+
+
+chconf.h
+--------
+
+
+ld script
+---------
+--- ../../tmk_core/tool/chibios/chibios/os/common/ports/ARMCMx/compilers/GCC/ld/MKL26Z64.ld 2015-10-15 09:08:58.732904304 +0900
++++ ld/MKL26Z64.ld 2015-10-15 08:48:06.430215496 +0900
+@@ -27,7 +27,8 @@
+ {
+ flash0 : org = 0x00000000, len = 0xc0
+ flashcfg : org = 0x00000400, len = 0x10
+- flash : org = 0x00000410, len = 64k - 0x410
++ flash : org = 0x00000410, len = 62k - 0x410
++ eeprom_emu : org = 0x0000F800, len = 2k
+ ram : org = 0x1FFFF800, len = 8k
+ }
+
+@@ -35,6 +36,10 @@
+ __ram_size__ = LENGTH(ram);
+ __ram_end__ = __ram_start__ + __ram_size__;
+
++__eeprom_workarea_start__ = ORIGIN(eeprom_emu);
++__eeprom_workarea_size__ = LENGTH(eeprom_emu);
++__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__;
++
+ SECTIONS
+ {
+ . = 0;
+
+
+
+Configuration/Startup for Infinity 60%
+--------------------------------------
+Configuration:
+
+
+Clock:
+Inifinity
+ FEI(FLL Engaged Internal) mode with core clock:48MHz, bus clock:48MHz, flash clock:24MHz
+ Clock dividor:
+ SIM_CLKDIV1[OUTDIV1] = 0 divide-by-1 for core clock
+ SIM_CLKDIV1[OUTDIV2] = 0 divide-by-1 for bus clock
+ SIM_CLKDIV1[OUTDIV4] = 1 divide-by-2 for flash clock
+ Internal reference clock:
+ MCG_C1[IREFS] = 1 Internal Reference Select for clock source for FLL
+ MCG_C1[IRCLKEN] = 1 Internal Reference Clock Enable
+ FLL multipilication:
+ MCG_C4[DMX32] = 1
+ MCG_C4[DRST_DRS] = 01 FLL factor 1464 * 32.768kHz = 48MHz
+
+chibios/os/hal/ports/KINETIS/K20x/hal_lld.c
+ k20x_clock_init(): called in __early_init() defined in board.c
+ disable watchdog and configure clock
+
+ configurable macros:
+ KINETIS_NO_INIT: whether init or not
+ KINETIS_MCG_MODE: clock mode
+ KINETIS_MCG_MODE_FEI
+ KINETIS_MCG_MODE_PEE
+ hal/ports/KINETIS/K20x/hal_lld.h
+
+
+chibios/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h
+ PALConfig pal_default_config
+ boardInit()
+ __early_init()
+ macro definitions for board infos, freq and mcu type
+
+chibios/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c
+
+USB
+
+
+Startup
+-------
+ common/ports/ARMCMx/GCC/crt0_v[67]m.s
+ Reset_Handler: startup code
+ common/ports/ARMCMx/GCC/crt1.c
+ __core_init(): weak
+ __early_init(): weak
+ __late_init(): weak
+ __default_exit(): weak
+ called from Reset_Handler of crt0
+ common/ports/ARMCMx/GCC/vector.c
+ common/ports/ARMCMx/GCC/ld/*.ld
+
+chibios/os/common/ports/ARMCMx/compilers/GCC/
+├── crt0_v6m.s
+├── crt0_v7m.s
+├── crt1.c
+├── ld
+│   ├── MK20DX128BLDR3.ld
+│   ├── MK20DX128BLDR4.ld
+│   ├── MK20DX128.ld
+│   ├── MK20DX256.ld
+│   ├── MKL25Z128.ld
+│   ├── MKL26Z128.ld
+│   ├── MKL26Z64.ld
+│   └── STM32L476xG.ld
+├── mk
+│   ├── startup_k20x5.mk
+│   ├── startup_k20x7.mk
+│   ├── startup_k20x.mk
+│   ├── startup_kl2x.mk
+│   └── startup_stm32l4xx.mk
+├── rules.ld
+├── rules.mk
+└── vectors.c
+
+chibios/os/hal/
+├── boards
+│   ├── FREESCALE_FREEDOM_K20D50M
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   └── board.mk
+│   ├── MCHCK_K20
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   └── board.mk
+│   ├── PJRC_TEENSY_3
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   └── board.mk
+│   ├── PJRC_TEENSY_3_1
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   └── board.mk
+│   ├── PJRC_TEENSY_LC
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   └── board.mk
+│   ├── readme.txt
+│   ├── simulator
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   └── board.mk
+│   ├── ST_NUCLEO_F030R8
+│   │   ├── board.c
+│   │   ├── board.h
+│   │   ├── board.mk
+│   │   └── cfg
+│   │   └── board.chcfg
+├── hal.mk
+├── include
+│   ├── adc.h
+│   ├── can.h
+│   ├── dac.h
+│   ├── ext.h
+│   ├── gpt.h
+│   ├── hal_channels.h
+│   ├── hal_files.h
+│   ├── hal.h
+│   ├── hal_ioblock.h
+│   ├── hal_mmcsd.h
+│   ├── hal_queues.h
+│   ├── hal_streams.h
+│   ├── i2c.h
+│   ├── i2s.h
+│   ├── icu.h
+│   ├── mac.h
+│   ├── mii.h
+│   ├── mmc_spi.h
+│   ├── pal.h
+│   ├── pwm.h
+│   ├── rtc.h
+│   ├── sdc.h
+│   ├── serial.h
+│   ├── serial_usb.h
+│   ├── spi.h
+│   ├── st.h
+│   ├── uart.h
+│   └── usb.h
+├── lib
+│   └── streams
+│   ├── chprintf.c
+│   ├── chprintf.h
+│   ├── memstreams.c
+│   ├── memstreams.h
+│   ├── nullstreams.c
+│   └── nullstreams.h
+├── osal
+│   ├── nil
+│   │   ├── osal.c
+│   │   ├── osal.h
+│   │   └── osal.mk
+│   ├── os-less
+│   │   └── ARMCMx
+│   │   ├── osal.c
+│   │   ├── osal.h
+│   │   └── osal.mk
+│   └── rt
+│   ├── osal.c
+│   ├── osal.h
+│   └── osal.mk
+├── ports
+│   ├── AVR
+│   ├── common
+│   │   └── ARMCMx
+│   │   ├── mpu.h
+│   │   ├── nvic.c
+│   │   └── nvic.h
+│   ├── KINETIS
+│   │   ├── K20x
+│   │   │   ├── hal_lld.c
+│   │   │   ├── hal_lld.h
+│   │   │   ├── kinetis_registry.h
+│   │   │   ├── platform.dox
+│   │   │   ├── platform.mk
+│   │   │   ├── pwm_lld.c
+│   │   │   ├── pwm_lld.h
+│   │   │   ├── spi_lld.c
+│   │   │   └── spi_lld.h
+│   │   ├── KL2x
+│   │   │   ├── hal_lld.c
+│   │   │   ├── hal_lld.h
+│   │   │   ├── kinetis_registry.h
+│   │   │   ├── platform.mk
+│   │   │   ├── pwm_lld.c
+│   │   │   └── pwm_lld.h
+│   │   ├── LLD
+│   │   │   ├── adc_lld.c
+│   │   │   ├── adc_lld.h
+│   │   │   ├── ext_lld.c
+│   │   │   ├── ext_lld.h
+│   │   │   ├── gpt_lld.c
+│   │   │   ├── gpt_lld.h
+│   │   │   ├── i2c_lld.c
+│   │   │   ├── i2c_lld.h
+│   │   │   ├── pal_lld.c
+│   │   │   ├── pal_lld.h
+│   │   │   ├── serial_lld.c
+│   │   │   ├── serial_lld.h
+│   │   │   ├── st_lld.c
+│   │   │   ├── st_lld.h
+│   │   │   ├── usb_lld.c
+│   │   │   └── usb_lld.h
+│   │   └── README.md
+│   ├── LPC
+│   ├── simulator
+│   └── STM32
+├── src
+│   ├── adc.c
+│   ├── can.c
+│   ├── dac.c
+│   ├── ext.c
+│   ├── gpt.c
+│   ├── hal.c
+│   ├── hal_mmcsd.c
+│   ├── hal_queues.c
+│   ├── i2c.c
+│   ├── i2s.c
+│   ├── icu.c
+│   ├── mac.c
+│   ├── mmc_spi.c
+│   ├── pal.c
+│   ├── pwm.c
+│   ├── rtc.c
+│   ├── sdc.c
+│   ├── serial.c
+│   ├── serial_usb.c
+│   ├── spi.c
+│   ├── st.c
+│   ├── uart.c
+│   └── usb.c
+└── templates
+ ├── adc_lld.c
+ ├── adc_lld.h
+ ├── can_lld.c
+ ├── can_lld.h
+ ├── dac_lld.c
+ ├── dac_lld.h
+ ├── ext_lld.c
+ ├── ext_lld.h
+ ├── gpt_lld.c
+ ├── gpt_lld.h
+ ├── halconf.h
+ ├── hal_lld.c
+ ├── hal_lld.h
+ ├── i2c_lld.c
+ ├── i2c_lld.h
+ ├── i2s_lld.c
+ ├── i2s_lld.h
+ ├── icu_lld.c
+ ├── icu_lld.h
+ ├── mac_lld.c
+ ├── mac_lld.h
+ ├── mcuconf.h
+ ├── osal
+ │   ├── osal.c
+ │   ├── osal.h
+ │   └── osal.mk
+ ├── pal_lld.c
+ ├── pal_lld.h
+ ├── platform.mk
+ ├── pwm_lld.c
+ ├── pwm_lld.h
+ ├── rtc_lld.c
+ ├── rtc_lld.h
+ ├── sdc_lld.c
+ ├── sdc_lld.h
+ ├── serial_lld.c
+ ├── serial_lld.h
+ ├── spi_lld.c
+ ├── spi_lld.h
+ ├── st_lld.c
+ ├── st_lld.h
+ ├── uart_lld.c
+ ├── uart_lld.h
+ ├── usb_lld.c
+ └── usb_lld.h
diff --git a/keyboards/ergodox_infinity/Makefile b/keyboards/ergodox_infinity/Makefile
new file mode 100644
index 0000000000..bd09e5885d
--- /dev/null
+++ b/keyboards/ergodox_infinity/Makefile
@@ -0,0 +1,3 @@
+ifndef MAKEFILE_INCLUDED
+ include ../../../Makefile
+endif
diff --git a/keyboards/ergodox_infinity/board_is31fl3731c.h b/keyboards/ergodox_infinity/board_is31fl3731c.h
new file mode 100644
index 0000000000..f248cc25ba
--- /dev/null
+++ b/keyboards/ergodox_infinity/board_is31fl3731c.h
@@ -0,0 +1,110 @@
+/*
+Copyright 2016 Fred Sundvik <fsundvik@gmail.com>
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _GDISP_LLD_BOARD_H
+#define _GDISP_LLD_BOARD_H
+
+static const I2CConfig i2ccfg = {
+ 400000 // clock speed (Hz); 400kHz max for IS31
+};
+
+static const uint8_t led_mask[] = {
+ 0xFF, 0x00, /* C1-1 -> C1-16 */
+ 0xFF, 0x00, /* C2-1 -> C2-16 */
+ 0xFF, 0x00, /* C3-1 -> C3-16 */
+ 0xFF, 0x00, /* C4-1 -> C4-16 */
+ 0x3F, 0x00, /* C5-1 -> C5-16 */
+ 0x00, 0x00, /* C6-1 -> C6-16 */
+ 0x00, 0x00, /* C7-1 -> C7-16 */
+ 0x00, 0x00, /* C8-1 -> C8-16 */
+ 0x00, 0x00, /* C9-1 -> C9-16 */
+};
+
+// The address of the LED
+#define LA(c, r) (c + r * 16 )
+// Need to be an address that is not mapped, but inside the range of the controller matrix
+#define NA LA(8, 8)
+
+// The numbers in the comments are the led numbers DXX on the PCB
+// The mapping is taken from the schematic of left hand side
+static const uint8_t led_mapping[GDISP_SCREEN_HEIGHT][GDISP_SCREEN_WIDTH] = {
+// 45 44 43 42 41 40 39
+ { LA(1, 1), LA(1, 0), LA(0, 4), LA(0, 3), LA(0, 2), LA(0, 1), LA(0, 0)},
+// 52 51 50 49 48 47 46
+ { LA(2, 3), LA(2, 2), LA(2, 1), LA(2, 0), LA(1, 4), LA(1, 3), LA(1, 2) },
+// 58 57 56 55 54 53 N/A
+ { LA(3, 4), LA(3, 3), LA(3, 2), LA(3, 1), LA(3, 0), LA(2, 4), NA },
+// 67 66 65 64 63 62 61
+ { LA(5, 3), LA(5, 2), LA(5, 1), LA(5, 0), LA(4, 4), LA(4, 3), LA(4, 2) },
+// 76 75 74 73 72 60 59
+ { LA(7, 3), LA(7, 2), LA(7, 1), LA(7, 0), LA(6, 3), LA(4, 1), LA(4, 0) },
+// N/A N/A N/A N/A N/A N/A 68
+ { NA, NA, NA, NA, NA, NA, LA(5, 4) },
+// N/A N/A N/A N/A 71 70 69
+ { NA, NA, NA, NA, LA(6, 2), LA(6, 1), LA(6, 0) },
+};
+
+
+#define IS31_ADDR_DEFAULT 0x74 // AD connected to GND
+#define IS31_TIMEOUT 5000
+
+static GFXINLINE void init_board(GDisplay *g) {
+ (void) g;
+ /* I2C pins */
+ palSetPadMode(GPIOB, 0, PAL_MODE_ALTERNATIVE_2); // PTB0/I2C0/SCL
+ palSetPadMode(GPIOB, 1, PAL_MODE_ALTERNATIVE_2); // PTB1/I2C0/SDA
+ palSetPadMode(GPIOB, 16, PAL_MODE_OUTPUT_PUSHPULL);
+ palClearPad(GPIOB, 16);
+ /* start I2C */
+ i2cStart(&I2CD1, &i2ccfg);
+ // try high drive (from kiibohd)
+ I2CD1.i2c->C2 |= I2Cx_C2_HDRS;
+ // try glitch fixing (from kiibohd)
+ I2CD1.i2c->FLT = 4;
+}
+
+static GFXINLINE void post_init_board(GDisplay *g) {
+ (void) g;
+}
+
+static GFXINLINE const uint8_t* get_led_mask(GDisplay* g) {
+ (void) g;
+ return led_mask;
+}
+
+static GFXINLINE uint8_t get_led_address(GDisplay* g, uint16_t x, uint16_t y)
+{
+ (void) g;
+ return led_mapping[y][x];
+}
+
+static GFXINLINE void set_hardware_shutdown(GDisplay* g, bool shutdown) {
+ (void) g;
+ if(!shutdown) {
+ palSetPad(GPIOB, 16);
+ }
+ else {
+ palClearPad(GPIOB, 16);
+ }
+}
+
+static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
+ (void) g;
+ i2cMasterTransmitTimeout(&I2CD1, IS31_ADDR_DEFAULT, data, length, 0, 0, US2ST(IS31_TIMEOUT));
+}
+
+#endif /* _GDISP_LLD_BOARD_H */
diff --git a/keyboards/ergodox_infinity/board_st7565.h b/keyboards/ergodox_infinity/board_st7565.h
new file mode 100644
index 0000000000..9ab636c95d
--- /dev/null
+++ b/keyboards/ergodox_infinity/board_st7565.h
@@ -0,0 +1,113 @@
+/*
+ * This file is subject to the terms of the GFX License. If a copy of
+ * the license was not distributed with this file, you can obtain one at:
+ *
+ * http://ugfx.org/license.html
+ */
+
+#ifndef _GDISP_LLD_BOARD_H
+#define _GDISP_LLD_BOARD_H
+
+#define ST7565_LCD_BIAS ST7565_LCD_BIAS_9 // actually 6
+#define ST7565_ADC ST7565_ADC_NORMAL
+#define ST7565_COM_SCAN ST7565_COM_SCAN_DEC
+#define ST7565_PAGE_ORDER 0,1,2,3
+/*
+ * Custom page order for several LCD boards, e.g. HEM12864-99
+ * #define ST7565_PAGE_ORDER 4,5,6,7,0,1,2,3
+ */
+
+#define ST7565_GPIOPORT GPIOC
+#define ST7565_PORT PORTC
+#define ST7565_A0_PIN 7
+#define ST7565_RST_PIN 8
+#define ST7565_MOSI_PIN 6
+#define ST7565_SLCK_PIN 5
+#define ST7565_SS_PIN 4
+
+#define palSetPadModeRaw(portname, bits) \
+ ST7565_PORT->PCR[ST7565_##portname##_PIN] = bits
+
+#define palSetPadModeNamed(portname, portmode) \
+ palSetPadMode(ST7565_GPIOPORT, ST7565_##portname##_PIN, portmode)
+
+#define ST7565_SPI_MODE PORTx_PCRn_DSE | PORTx_PCRn_MUX(2)
+// DSPI Clock and Transfer Attributes
+// Frame Size: 8 bits
+// MSB First
+// CLK Low by default
+static const SPIConfig spi1config = {
+ // Operation complete callback or @p NULL.
+ .end_cb = NULL,
+ //The chip select line port - when not using pcs.
+ .ssport = ST7565_GPIOPORT,
+ // brief The chip select line pad number - when not using pcs.
+ .sspad=ST7565_SS_PIN,
+ // SPI initialization data.
+ .tar0 =
+ SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes
+ | SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns
+ | SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns
+ | SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns
+ | SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2
+ | SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns
+};
+
+static GFXINLINE void acquire_bus(GDisplay *g) {
+ (void) g;
+ // Only the LCD is using the SPI bus, so no need to acquire
+ // spiAcquireBus(&SPID1);
+ spiSelect(&SPID1);
+}
+
+static GFXINLINE void release_bus(GDisplay *g) {
+ (void) g;
+ // Only the LCD is using the SPI bus, so no need to release
+ //spiReleaseBus(&SPID1);
+ spiUnselect(&SPID1);
+}
+
+static GFXINLINE void init_board(GDisplay *g) {
+ (void) g;
+ palSetPadModeNamed(A0, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN);
+ palSetPadModeNamed(RST, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN);
+ palSetPadModeRaw(MOSI, ST7565_SPI_MODE);
+ palSetPadModeRaw(SLCK, ST7565_SPI_MODE);
+ palSetPadModeNamed(SS, PAL_MODE_OUTPUT_PUSHPULL);
+
+ spiInit();
+ spiStart(&SPID1, &spi1config);
+ release_bus(g);
+}
+
+static GFXINLINE void post_init_board(GDisplay *g) {
+ (void) g;
+}
+
+static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) {
+ (void) g;
+ if (state) {
+ palClearPad(ST7565_GPIOPORT, ST7565_RST_PIN);
+ }
+ else {
+ palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN);
+ }
+}
+
+static GFXINLINE void enter_data_mode(GDisplay *g) {
+ palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN);
+}
+
+static GFXINLINE void enter_cmd_mode(GDisplay *g) {
+ palClearPad(ST7565_GPIOPORT, ST7565_A0_PIN);
+}
+
+
+static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
+ (void) g;
+ spiSend(&SPID1, length, data);
+}
+
+#endif /* _GDISP_LLD_BOARD_H */
diff --git a/keyboards/ergodox_infinity/bootloader_defs.h b/keyboards/ergodox_infinity/bootloader_defs.h
new file mode 100644
index 0000000000..c67153be60
--- /dev/null
+++ b/keyboards/ergodox_infinity/bootloader_defs.h
@@ -0,0 +1 @@
+#define KIIBOHD_BOOTLOADER
diff --git a/keyboards/ergodox_infinity/chconf.h b/keyboards/ergodox_infinity/chconf.h
new file mode 100644
index 0000000000..d59c35eb68
--- /dev/null
+++ b/keyboards/ergodox_infinity/chconf.h
@@ -0,0 +1,524 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+#define _CHIBIOS_RT_CONF_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY 100000
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define CH_CFG_ST_TIMEDELTA 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM 20
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE 0
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop.
+ */
+#define CH_CFG_NO_IDLE_THREAD FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM FALSE
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY TRUE
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT TRUE
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES TRUE
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES TRUE
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS TRUE
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS TRUE
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES TRUE
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES TRUE
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_QUEUES TRUE
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE TRUE
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP TRUE
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define