2020 February 29 Breaking Changes Update (#8064)

6 files changed, 379 insertions, 56 deletions

diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.c b/drivers/boards/GENERIC_STM32_F072XB/board.c
index dcbb94310f..c91136e8f6 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/board.c
+++ b/drivers/boards/GENERIC_STM32_F072XB/board.c
@@ -1,5 +1,5 @@
 /*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -20,56 +20,209 @@
  */
 
 #include "hal.h"
+#include "stm32_gpio.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   Type of STM32 GPIO port setup.
+ */
+typedef struct {
+    uint32_t moder;
+    uint32_t otyper;
+    uint32_t ospeedr;
+    uint32_t pupdr;
+    uint32_t odr;
+    uint32_t afrl;
+    uint32_t afrh;
+} gpio_setup_t;
 
-#if HAL_USE_PAL || defined(__DOXYGEN__)
 /**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
+ * @brief   Type of STM32 GPIO initialization data.
  */
-const PALConfig pal_default_config = {
-#    if STM32_HAS_GPIOA
+typedef struct {
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
+    gpio_setup_t PAData;
+#endif
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
+    gpio_setup_t PBData;
+#endif
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
+    gpio_setup_t PCData;
+#endif
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
+    gpio_setup_t PDData;
+#endif
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
+    gpio_setup_t PEData;
+#endif
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
+    gpio_setup_t PFData;
+#endif
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
+    gpio_setup_t PGData;
+#endif
+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
+    gpio_setup_t PHData;
+#endif
+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
+    gpio_setup_t PIData;
+#endif
+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
+    gpio_setup_t PJData;
+#endif
+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
+    gpio_setup_t PKData;
+#endif
+} gpio_config_t;
+
+/**
+ * @brief   STM32 GPIO static initialization data.
+ */
+static const gpio_config_t gpio_default_config = {
+#if STM32_HAS_GPIOA
     {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#    endif
-#    if STM32_HAS_GPIOB
+#endif
+#if STM32_HAS_GPIOB
     {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#    endif
-#    if STM32_HAS_GPIOC
+#endif
+#if STM32_HAS_GPIOC
     {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#    endif
-#    if STM32_HAS_GPIOD
+#endif
+#if STM32_HAS_GPIOD
     {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#    endif
-#    if STM32_HAS_GPIOE
+#endif
+#if STM32_HAS_GPIOE
     {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#    endif
-#    if STM32_HAS_GPIOF
+#endif
+#if STM32_HAS_GPIOF
     {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#    endif
-#    if STM32_HAS_GPIOG
+#endif
+#if STM32_HAS_GPIOG
     {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#    endif
-#    if STM32_HAS_GPIOH
+#endif
+#if STM32_HAS_GPIOH
     {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#    endif
-#    if STM32_HAS_GPIOI
-    {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
-#    endif
+#endif
+#if STM32_HAS_GPIOI
+    {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
+#endif
+#if STM32_HAS_GPIOJ
+    {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
+#endif
+#if STM32_HAS_GPIOK
+    {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
+#endif
 };
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
+    gpiop->OTYPER  = config->otyper;
+    gpiop->OSPEEDR = config->ospeedr;
+    gpiop->PUPDR   = config->pupdr;
+    gpiop->ODR     = config->odr;
+    gpiop->AFRL    = config->afrl;
+    gpiop->AFRH    = config->afrh;
+    gpiop->MODER   = config->moder;
+}
+
+static void stm32_gpio_init(void) {
+    /* Enabling GPIO-related clocks, the mask comes from the
+       registry header file.*/
+    rccResetAHB(STM32_GPIO_EN_MASK);
+    rccEnableAHB(STM32_GPIO_EN_MASK, true);
+
+    /* Initializing all the defined GPIO ports.*/
+#if STM32_HAS_GPIOA
+    gpio_init(GPIOA, &gpio_default_config.PAData);
+#endif
+#if STM32_HAS_GPIOB
+    gpio_init(GPIOB, &gpio_default_config.PBData);
+#endif
+#if STM32_HAS_GPIOC
+    gpio_init(GPIOC, &gpio_default_config.PCData);
+#endif
+#if STM32_HAS_GPIOD
+    gpio_init(GPIOD, &gpio_default_config.PDData);
 #endif
+#if STM32_HAS_GPIOE
+    gpio_init(GPIOE, &gpio_default_config.PEData);
+#endif
+#if STM32_HAS_GPIOF
+    gpio_init(GPIOF, &gpio_default_config.PFData);
+#endif
+#if STM32_HAS_GPIOG
+    gpio_init(GPIOG, &gpio_default_config.PGData);
+#endif
+#if STM32_HAS_GPIOH
+    gpio_init(GPIOH, &gpio_default_config.PHData);
+#endif
+#if STM32_HAS_GPIOI
+    gpio_init(GPIOI, &gpio_default_config.PIData);
+#endif
+#if STM32_HAS_GPIOJ
+    gpio_init(GPIOJ, &gpio_default_config.PJData);
+#endif
+#if STM32_HAS_GPIOK
+    gpio_init(GPIOK, &gpio_default_config.PKData);
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
 
 __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
 
 /**
  * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
+ * @details GPIO ports and system clocks are initialized before everything
+ *          else.
  */
 void __early_init(void) {
     enter_bootloader_mode_if_requested();
+
+    stm32_gpio_init();
     stm32_clock_init();
 }
 
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+/**
+ * @brief   SDC card detection.
+ */
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+    (void)sdcp;
+    /* TODO: Fill the implementation.*/
+    return true;
+}
+
+/**
+ * @brief   SDC card write protection detection.
+ */
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
+    (void)sdcp;
+    /* TODO: Fill the implementation.*/
+    return false;
+}
+#endif /* HAL_USE_SDC */
+
 #if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
 /**
  * @brief   MMC_SPI card detection.
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.h b/drivers/boards/GENERIC_STM32_F072XB/board.h
index c625a4330a..87570e62d2 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/board.h
+++ b/drivers/boards/GENERIC_STM32_F072XB/board.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -22,6 +22,10 @@
 #ifndef BOARD_H
 #define BOARD_H
 
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
 /*
  * Setup for Generic STM32_F072 Board
  */
@@ -167,11 +171,9 @@
 #define LINE_USB_DP PAL_LINE(GPIOA, 12U)
 #define LINE_SWDIO PAL_LINE(GPIOA, 13U)
 #define LINE_SWCLK PAL_LINE(GPIOA, 14U)
-
 #define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
 #define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
 #define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
-
 #define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
 #define LINE_LED_RED PAL_LINE(GPIOC, 6U)
 #define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
@@ -179,10 +181,25 @@
 #define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
 #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
 #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
-
 #define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
 #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
 
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
 /*
  * I/O ports initial setup, this configuration is established soon after reset
  * in the initialization code.
@@ -373,6 +390,10 @@
 #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U))
 #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U))
 
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
 #if !defined(_FROM_ASM_)
 #    ifdef __cplusplus
 extern "C" {
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.mk b/drivers/boards/GENERIC_STM32_F072XB/board.mk
index c136f705a6..bd6f878269 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/board.mk
+++ b/drivers/boards/GENERIC_STM32_F072XB/board.mk
@@ -3,3 +3,7 @@ BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB/board.c
 
 # Required include directories
 BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB
+
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC  += $(BOARDINC)
diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg
index 9c7cf4fd76..e6ceecb62e 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg
+++ b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg
@@ -6,7 +6,7 @@
   <configuration_settings>
     <templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
     <output_path>..</output_path>
-    <hal_version>3.0.x</hal_version>
+    <hal_version>5.0.x</hal_version>
   </configuration_settings>
   <board_name>ST STM32F072B-Discovery</board_name>
   <board_id>ST_STM32F072B_DISCOVERY</board_id>
diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp
new file mode 100644
index 0000000000..55cd396e41
--- /dev/null
+++ b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp
@@ -0,0 +1,15 @@
+sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates
+outputRoot: ..
+dataRoot: .
+
+freemarkerLinks: {
+    lib: ../../../../../tools/ftl/libs
+}
+
+data : {
+  doc1:xml (
+    board.chcfg
+    {
+    }
+  )
+}
diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.c b/drivers/boards/GENERIC_STM32_F303XC/board.c
index 60c191d9b1..9b0fc1b6b9 100644
--- a/drivers/boards/GENERIC_STM32_F303XC/board.c
+++ b/drivers/boards/GENERIC_STM32_F303XC/board.c
@@ -14,44 +14,172 @@
     limitations under the License.
 */
 
+/*
+ * This file has been automatically generated using ChibiStudio board
+ * generator plugin. Do not edit manually.
+ */
+
 #include "hal.h"
+#include "stm32_gpio.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   Type of STM32 GPIO port setup.
+ */
+typedef struct {
+    uint32_t moder;
+    uint32_t otyper;
+    uint32_t ospeedr;
+    uint32_t pupdr;
+    uint32_t odr;
+    uint32_t afrl;
+    uint32_t afrh;
+} gpio_setup_t;
+
+/**
+ * @brief   Type of STM32 GPIO initialization data.
+ */
+typedef struct {
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
+    gpio_setup_t PAData;
+#endif
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
+    gpio_setup_t PBData;
+#endif
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
+    gpio_setup_t PCData;
+#endif
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
+    gpio_setup_t PDData;
+#endif
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
+    gpio_setup_t PEData;
+#endif
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
+    gpio_setup_t PFData;
+#endif
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
+    gpio_setup_t PGData;
+#endif
+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
+    gpio_setup_t PHData;
+#endif
+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
+    gpio_setup_t PIData;
+#endif
+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
+    gpio_setup_t PJData;
+#endif
+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
+    gpio_setup_t PKData;
+#endif
+} gpio_config_t;
 
-#if HAL_USE_PAL || defined(__DOXYGEN__)
 /**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
+ * @brief   STM32 GPIO static initialization data.
  */
-const PALConfig pal_default_config = {
-#    if STM32_HAS_GPIOA
+static const gpio_config_t gpio_default_config = {
+#if STM32_HAS_GPIOA
     {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#    endif
-#    if STM32_HAS_GPIOB
+#endif
+#if STM32_HAS_GPIOB
     {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#    endif
-#    if STM32_HAS_GPIOC
+#endif
+#if STM32_HAS_GPIOC
     {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#    endif
-#    if STM32_HAS_GPIOD
+#endif
+#if STM32_HAS_GPIOD
     {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#    endif
-#    if STM32_HAS_GPIOE
+#endif
+#if STM32_HAS_GPIOE
     {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#    endif
-#    if STM32_HAS_GPIOF
+#endif
+#if STM32_HAS_GPIOF
     {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#    endif
-#    if STM32_HAS_GPIOG
+#endif
+#if STM32_HAS_GPIOG
     {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#    endif
-#    if STM32_HAS_GPIOH
+#endif
+#if STM32_HAS_GPIOH
     {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#    endif
-#    if STM32_HAS_GPIOI
-    {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
-#    endif
+#endif
+#if STM32_HAS_GPIOI
+    {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
+#endif
+#if STM32_HAS_GPIOJ
+    {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
+#endif
+#if STM32_HAS_GPIOK
+    {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
+#endif
 };
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
+    gpiop->OTYPER  = config->otyper;
+    gpiop->OSPEEDR = config->ospeedr;
+    gpiop->PUPDR   = config->pupdr;
+    gpiop->ODR     = config->odr;
+    gpiop->AFRL    = config->afrl;
+    gpiop->AFRH    = config->afrh;
+    gpiop->MODER   = config->moder;
+}
+
+static void stm32_gpio_init(void) {
+    /* Enabling GPIO-related clocks, the mask comes from the
+       registry header file.*/
+    rccResetAHB(STM32_GPIO_EN_MASK);
+    rccEnableAHB(STM32_GPIO_EN_MASK, true);
+
+    /* Initializing all the defined GPIO ports.*/
+#if STM32_HAS_GPIOA
+    gpio_init(GPIOA, &gpio_default_config.PAData);
 #endif
+#if STM32_HAS_GPIOB
+    gpio_init(GPIOB, &gpio_default_config.PBData);
+#endif
+#if STM32_HAS_GPIOC
+    gpio_init(GPIOC, &gpio_default_config.PCData);
+#endif
+#if STM32_HAS_GPIOD
+    gpio_init(GPIOD, &gpio_default_config.PDData);
+#endif
+#if STM32_HAS_GPIOE
+    gpio_init(GPIOE, &gpio_default_config.PEData);
+#endif
+#if STM32_HAS_GPIOF
+    gpio_init(GPIOF, &gpio_default_config.PFData);
+#endif
+#if STM32_HAS_GPIOG
+    gpio_init(GPIOG, &gpio_default_config.PGData);
+#endif
+#if STM32_HAS_GPIOH
+    gpio_init(GPIOH, &gpio_default_config.PHData);
+#endif
+#if STM32_HAS_GPIOI
+    gpio_init(GPIOI, &gpio_default_config.PIData);
+#endif
+#if STM32_HAS_GPIOJ
+    gpio_init(GPIOJ, &gpio_default_config.PJData);
+#endif
+#if STM32_HAS_GPIOK
+    gpio_init(GPIOK, &gpio_default_config.PKData);
+#endif
+}
 
 void enter_bootloader_mode_if_requested(void);
 
@@ -62,6 +190,8 @@ void enter_bootloader_mode_if_requested(void);
  */
 void __early_init(void) {
     enter_bootloader_mode_if_requested();
+
+    stm32_gpio_init();
     stm32_clock_init();
 }