[Core] Add support for RISC-V builds and GD32VF103 MCU (#12508)

* Add support for RISC-V builds and GD32VF103 MCU

* Add toolchain selection in chibios.mk based on the mcu selected in
mcu_selection.mk
* Reorder and added comments to chibios.mk to have a streamlined makefile
* Add GD32VF103 mcu to possible targets for QMK.
* Add STM32 compatibility for GD32VF103 MCU, this is hacky but more efficent
  then rewriting every driver.
* Add GigaDevice DFU bootloader as flash target, please note that
  dfu-util of at least version 0.10 is needed.
* Add analog driver compatibility
* Add apa102 bitbang driver compatibility
* Add ws2812 bitbang driver compatibility
* Add eeprom in flash emulation compatibility
* Allow faster re-builds with ccache

* Add SiPeed Longan Nano to platform files

* Add SiPeed Longan Nano Onekeys

* Make quine compatible with other bootloaders

* Support builds with picolibc

* Add risc-v toolchain to arch and debian/ubuntu scripts

31 files changed, 904 insertions, 126 deletions

diff --git a/bootloader.mk b/bootloader.mk
index 5ba118fb44..ccb92392d9 100644
--- a/bootloader.mk
+++ b/bootloader.mk
@@ -34,6 +34,8 @@
 #     stm32duino   STM32Duino (STM32F103x8)
 #     stm32-dfu    STM32 USB DFU in ROM
 #     apm32-dfu    APM32 USB DFU in ROM
+# RISC-V:
+#     gd32v-dfu    GD32V USB DFU in ROM
 #
 # BOOTLOADER_SIZE can still be defined manually, but it's recommended
 # you add any possible configuration to this list
@@ -125,6 +127,13 @@ ifeq ($(strip $(BOOTLOADER)), apm32-dfu)
     DFU_ARGS ?= -d 314B:0106 -a 0 -s 0x08000000:leave
     DFU_SUFFIX_ARGS ?= -v 314B -p 0106
 endif
+ifeq ($(strip $(BOOTLOADER)), gd32v-dfu)
+    OPT_DEFS += -DBOOTLOADER_GD32V_DFU
+
+    # Options to pass to dfu-util when flashing
+    DFU_ARGS ?= -d 28E9:0189 -a 0 -s 0x08000000:leave
+    DFU_SUFFIX_ARGS ?= -v 28E9 -p 0189
+endif
 ifeq ($(strip $(BOOTLOADER)), kiibohd)
     OPT_DEFS += -DBOOTLOADER_KIIBOHD
     ifeq ($(strip $(MCU_ORIG)), MK20DX128)
diff --git a/common_features.mk b/common_features.mk
index aff91641e4..7dd63be5be 100644
--- a/common_features.mk
+++ b/common_features.mk
@@ -142,7 +142,7 @@ else
     ifeq ($(PLATFORM),AVR)
       # Automatically provided by avr-libc, nothing required
     else ifeq ($(PLATFORM),CHIBIOS)
-      ifneq ($(filter STM32F3xx_% STM32F1xx_% %_STM32F401xC %_STM32F401xE %_STM32F405xG %_STM32F411xE %_STM32F072xB %_STM32F042x6, $(MCU_SERIES)_$(MCU_LDSCRIPT)),)
+      ifneq ($(filter STM32F3xx_% STM32F1xx_% %_STM32F401xC %_STM32F401xE %_STM32F405xG %_STM32F411xE %_STM32F072xB %_STM32F042x6 %_GD32VF103xB %_GD32VF103x8, $(MCU_SERIES)_$(MCU_LDSCRIPT)),)
         OPT_DEFS += -DEEPROM_DRIVER
         COMMON_VPATH += $(DRIVER_PATH)/eeprom
         SRC += eeprom_driver.c
diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema
index b6b5e411fe..65d44c94d2 100644
--- a/data/schemas/keyboard.jsonschema
+++ b/data/schemas/keyboard.jsonschema
@@ -13,7 +13,7 @@
         },
         "processor": {
             "type": "string",
-            "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
+            "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "GD32VF103", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
         },
         "audio": {
             "type": "object",
@@ -56,7 +56,7 @@
         },
         "bootloader": {
             "type": "string",
-            "enum": ["atmel-dfu", "bootloadhid", "bootloadHID", "caterina", "halfkay", "kiibohd", "lufa-dfu", "lufa-ms", "micronucleus", "qmk-dfu", "qmk-hid", "stm32-dfu", "stm32duino", "unknown", "usbasploader", "USBasp", "tinyuf2"],
+            "enum": ["atmel-dfu", "bootloadhid", "bootloadHID", "caterina", "halfkay", "kiibohd", "lufa-dfu", "lufa-ms", "micronucleus", "qmk-dfu", "qmk-hid", "stm32-dfu", "stm32duino", "gd32v-dfu", "unknown", "usbasploader", "USBasp", "tinyuf2"],
         },
         "bootloader_instructions": {
             "type": "string",
diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md
index f4aab5f5bd..39e9061c20 100644
--- a/docs/compatible_microcontrollers.md
+++ b/docs/compatible_microcontrollers.md
@@ -48,3 +48,9 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
 ## Atmel ATSAM
 
 There is limited support for one of Atmel's ATSAM microcontrollers, that being the [ATSAMD51J18A](https://www.microchip.com/wwwproducts/en/ATSAMD51J18A) used by the [Massdrop keyboards](https://github.com/qmk/qmk_firmware/tree/master/keyboards/massdrop).
+
+## RISC-V
+
+### GigaDevice
+
+[ChibiOS-Contrib](https://github.com/ChibiOS/ChibiOS-Contrib) has support for the GigaDevice [GD32VF103 series](https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/mainstream-line/gd32vf103-series/) microcontrollers and provides configurations for the [SiPeed Longan Nano](https://longan.sipeed.com/en/) development board that uses this microcontroller. It is largely pin and feature compatible with STM32F103 and STM32F303 microcontrollers.
\ No newline at end of file
diff --git a/docs/driver_installation_zadig.md b/docs/driver_installation_zadig.md
index 9155e56e37..003629ba9a 100644
--- a/docs/driver_installation_zadig.md
+++ b/docs/driver_installation_zadig.md
@@ -93,6 +93,7 @@ The device name here is the name that appears in Zadig, and may not be what the
 |`usbasploader`|USBasp                        |`16C0:05DC`   |libusbK|
 |`apm32-dfu`   |APM32 DFU ISP Mode            |`314B:0106`   |WinUSB |
 |`stm32-dfu`   |STM32 BOOTLOADER              |`0483:DF11`   |WinUSB |
+|`gd32v-dfu`   |GD32V BOOTLOADER              |`28E9:0189`   |WinUSB |
 |`kiibohd`     |Kiibohd DFU Bootloader        |`1C11:B007`   |WinUSB |
 |`stm32duino`  |Maple 003                     |`1EAF:0003`   |WinUSB |
 |`qmk-hid`     |(keyboard name) Bootloader    |`03EB:2067`   |HidUsb |
diff --git a/drivers/led/apa102.c b/drivers/led/apa102.c
index 19e0bfc189..00e7eb4505 100644
--- a/drivers/led/apa102.c
+++ b/drivers/led/apa102.c
@@ -24,7 +24,7 @@
 #    elif defined(PROTOCOL_CHIBIOS)
 
 #        include "hal.h"
-#        if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX)
+#        if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(GD32VF103)
 #            define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4)))  // This calculates how many loops of 4 nops to run to delay 100 ns
 #        else
 #            error("APA102_NOPS configuration required")
diff --git a/keyboards/handwired/onekey/keymaps/quine/rules.mk b/keyboards/handwired/onekey/keymaps/quine/rules.mk
deleted file mode 100644
index 4c2b0289a2..0000000000
--- a/keyboards/handwired/onekey/keymaps/quine/rules.mk
+++ /dev/null
@@ -1 +0,0 @@
-BOOTLOADER = atmel-dfu
diff --git a/keyboards/handwired/onekey/readme.md b/keyboards/handwired/onekey/readme.md
index b630b11748..2973b7d873 100644
--- a/keyboards/handwired/onekey/readme.md
+++ b/keyboards/handwired/onekey/readme.md
@@ -3,7 +3,7 @@
 Custom handwired one key keyboard. **See each individual board for pin information.**
 
 * Keyboard Maintainer: QMK Community
-* Hardware Supported: bluepill, Elite-C, Pro Micro, Proton C, Teensy 2.0, Teensy++ 2.0, Teensy LC, Teensy 3.2
+* Hardware Supported: Blackpill F401/F411, Bluepill, Elite-C, Pro Micro, Proton C, Sipeed Longan Nano, STM32F0 Disco, Teensy 2.0, Teensy++ 2.0, Teensy LC, Teensy 3.2
 * Hardware Availability: *n/a*
 
 Make example for this keyboard (after setting up your build environment):
diff --git a/keyboards/handwired/onekey/sipeed_longan_nano/chconf.h b/keyboards/handwired/onekey/sipeed_longan_nano/chconf.h
new file mode 100644
index 0000000000..b1eb18de78
--- /dev/null
+++ b/keyboards/handwired/onekey/sipeed_longan_nano/chconf.h
@@ -0,0 +1,23 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#pragma once
+
+#define CH_CFG_ST_RESOLUTION 16
+
+#define CH_CFG_ST_FREQUENCY 10000
+
+#include_next <chconf.h>
diff --git a/keyboards/handwired/onekey/sipeed_longan_nano/config.h b/keyboards/handwired/onekey/sipeed_longan_nano/config.h
new file mode 100644
index 0000000000..1825b936d8
--- /dev/null
+++ b/keyboards/handwired/onekey/sipeed_longan_nano/config.h
@@ -0,0 +1,37 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#pragma once
+
+#include "config_common.h"
+
+#define MATRIX_COL_PINS \
+    { B0 }
+#define MATRIX_ROW_PINS \
+    { A7 }
+#define UNUSED_PINS
+
+#define BACKLIGHT_PIN A1           /* Green LED. */
+#define BACKLIGHT_PWM_DRIVER PWMD5 /* GD32 numbering scheme starts from 0, TIMER4 on GD32 boards is TIMER5 on STM32 boards. */
+#define BACKLIGHT_PWM_CHANNEL 2    /* GD32 numbering scheme starts from 0, Channel 1 on GD32 boards is Channel 2 on STM32 boards. */
+
+#define RGB_DI_PIN A2
+#define RGB_CI_PIN B13
+
+#define ADC_PIN A0
+
+#define I2C1_CLOCK_SPEED 1000000 /* GD32VF103 supports fast mode plus. */
+#define I2C1_DUTY_CYCLE FAST_DUTY_CYCLE_2
diff --git a/keyboards/handwired/onekey/sipeed_longan_nano/halconf.h b/keyboards/handwired/onekey/sipeed_longan_nano/halconf.h
new file mode 100644
index 0000000000..2579c58747
--- /dev/null
+++ b/keyboards/handwired/onekey/sipeed_longan_nano/halconf.h
@@ -0,0 +1,23 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#pragma once
+
+#define HAL_USE_PWM TRUE
+#define HAL_USE_ADC TRUE
+#define HAL_USE_I2C TRUE
+
+#include_next <halconf.h>
diff --git a/keyboards/handwired/onekey/sipeed_longan_nano/mcuconf.h b/keyboards/handwired/onekey/sipeed_longan_nano/mcuconf.h
new file mode 100644
index 0000000000..eba0dd9eeb
--- /dev/null
+++ b/keyboards/handwired/onekey/sipeed_longan_nano/mcuconf.h
@@ -0,0 +1,29 @@
+/*
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2021 Stefan Kerkmann
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#pragma once
+
+#include_next <mcuconf.h>
+
+#undef GD32_ADC_USE_ADC0
+#define GD32_ADC_USE_ADC0 TRUE
+
+#undef GD32_I2C_USE_I2C0
+#define GD32_I2C_USE_I2C0 TRUE
+
+#undef GD32_PWM_USE_TIM4
+#define GD32_PWM_USE_TIM4 TRUE
diff --git a/keyboards/handwired/onekey/sipeed_longan_nano/readme.md b/keyboards/handwired/onekey/sipeed_longan_nano/readme.md
new file mode 100644
index 0000000000..0a3a291576
--- /dev/null
+++ b/keyboards/handwired/onekey/sipeed_longan_nano/readme.md
@@ -0,0 +1,5 @@
+# Sipeed Longan Nano onekey
+
+Supported Hardware: *GD32VF103CB Sipeed Longan Nano*.
+
+To trigger keypress, short together pins *B0* and *A7*.
\ No newline at end of file
diff --git a/keyboards/handwired/onekey/sipeed_longan_nano/rules.mk b/keyboards/handwired/onekey/sipeed_longan_nano/rules.mk
new file mode 100644
index 0000000000..aef4fee6b2
--- /dev/null
+++ b/keyboards/handwired/onekey/sipeed_longan_nano/rules.mk
@@ -0,0 +1,11 @@
+# MCU name
+MCU   = GD32VF103
+BOARD = SIPEED_LONGAN_NANO
+
+# Bootloader selection
+BOOTLOADER = gd32v-dfu
+
+# Build Options
+#   change yes to no to disable
+#
+KEYBOARD_SHARED_EP = yes
diff --git a/lib/python/qmk/constants.py b/lib/python/qmk/constants.py
index bfcd4064ac..73f596ba2c 100644
--- a/lib/python/qmk/constants.py
+++ b/lib/python/qmk/constants.py
@@ -13,7 +13,7 @@ QMK_FIRMWARE_UPSTREAM = 'qmk/qmk_firmware'
 MAX_KEYBOARD_SUBFOLDERS = 5
 
 # Supported processor types
-CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L433', 'STM32L443'
+CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L433', 'STM32L443', 'GD32VF103'
 LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None
 VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'
 
diff --git a/platforms/chibios/boards/SIPEED_LONGAN_NANO/board/board.mk b/platforms/chibios/boards/SIPEED_LONGAN_NANO/board/board.mk
new file mode 100644
index 0000000000..960fc26786
--- /dev/null
+++ b/platforms/chibios/boards/SIPEED_LONGAN_NANO/board/board.mk
@@ -0,0 +1,9 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/SIPEED_LONGAN_NANO/board.c
+
+# Required include directories
+BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/SIPEED_LONGAN_NANO
+
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC  += $(BOARDINC)
diff --git a/platforms/chibios/boards/SIPEED_LONGAN_NANO/configs/chconf.h b/platforms/chibios/boards/SIPEED_LONGAN_NANO/configs/chconf.h
new file mode 100644
index 0000000000..6e5adb0fe1
--- /dev/null
+++ b/platforms/chibios/boards/SIPEED_LONGAN_NANO/configs/chconf.h
@@ -0,0 +1,23 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* To compile the ChibiOS syscall stubs with picolibc
+ * the _reent struct has to be defined. */
+#if !defined(_FROM_ASM_) && defined(USE_PICOLIBC)
+struct _reent;
+#endif
+
+#include_next <chconf.h>
\ No newline at end of file
diff --git a/platforms/chibios/boards/SIPEED_LONGAN_NANO/configs/mcuconf.h b/platforms/chibios/boards/SIPEED_LONGAN_NANO/configs/mcuconf.h
new file mode 100644
index 0000000000..ab086567e5
--- /dev/null
+++ b/platforms/chibios/boards/SIPEED_LONGAN_NANO/configs/mcuconf.h
@@ -0,0 +1,302 @@
+/*
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2021 Stefan Kerkmann
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#pragma once
+
+#define GD32VF103_MCUCONF
+#define GD32VF103CB
+
+/*
+ * GD32VF103 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 0...15       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+*/
+
+#if defined(OVERCLOCK_120MHZ)
+/* (8MHz / 2) * 30 = 120MHz Sysclock */
+#define GD32_ALLOW_120MHZ_SYSCLK
+#define GD32_PLLMF_VALUE                     30
+#define GD32_USBFSPSC                        GD32_USBFSPSC_DIV2P5
+#else
+/* (8MHz / 2) * 24 = 96MHz Sysclock */
+#define GD32_PLLMF_VALUE                     24
+#define GD32_USBFSPSC                        GD32_USBFSPSC_DIV2
+#endif
+
+#define GD32_NO_INIT                         FALSE
+#define GD32_IRC8M_ENABLED                   TRUE
+#define GD32_IRC40K_ENABLED                  FALSE
+#define GD32_HXTAL_ENABLED                   TRUE
+#define GD32_LXTAL_ENABLED                   FALSE
+#define GD32_SCS                             GD32_SCS_PLL
+#define GD32_PLLSEL                          GD32_PLLSEL_PREDV0
+#define GD32_PREDV0SEL                       GD32_PREDV0SEL_HXTAL
+#define GD32_PREDV0_VALUE                    2
+#define GD32_PREDV1_VALUE                    2
+#define GD32_PLL1MF_VALUE                    14
+#define GD32_PLL2MF_VALUE                    13
+#define GD32_AHBPSC                          GD32_AHBPSC_DIV1
+#define GD32_APB1PSC                         GD32_APB1PSC_DIV2
+#define GD32_APB2PSC                         GD32_APB2PSC_DIV1
+#define GD32_ADCPSC                          GD32_ADCPSC_DIV16
+#define GD32_USB_CLOCK_REQUIRED              TRUE
+#define GD32_I2S_CLOCK_REQUIRED              FALSE
+#define GD32_CKOUT0SEL                       GD32_CKOUT0SEL_NOCLOCK
+#define GD32_RTCSRC                          GD32_RTCSRC_NOCLOCK
+#define GD32_PVD_ENABLE                      FALSE
+#define GD32_LVDT                            GD32_LVDT_LEV0
+
+/*
+ * ECLIC system settings.
+ */
+#define ECLIC_TRIGGER_DEFAULT                ECLIC_POSTIVE_EDGE_TRIGGER
+#define ECLIC_DMA_TRIGGER                    ECLIC_TRIGGER_DEFAULT
+
+/*
+ * IRQ system settings.
+ */
+#define GD32_IRQ_EXTI0_PRIORITY              6
+#define GD32_IRQ_EXTI1_PRIORITY              6
+#define GD32_IRQ_EXTI2_PRIORITY              6
+#define GD32_IRQ_EXTI3_PRIORITY              6
+#define GD32_IRQ_EXTI4_PRIORITY              6
+#define GD32_IRQ_EXTI5_9_PRIORITY            6
+#define GD32_IRQ_EXTI10_15_PRIORITY          6
+#define GD32_IRQ_EXTI0_TRIGGER               ECLIC_TRIGGER_DEFAULT
+#define GD32_IRQ_EXTI1_TRIGGER               ECLIC_TRIGGER_DEFAULT
+#define GD32_IRQ_EXTI2_TRIGGER               ECLIC_TRIGGER_DEFAULT
+#define GD32_IRQ_EXTI3_TRIGGER               ECLIC_TRIGGER_DEFAULT
+#define GD32_IRQ_EXTI4_TRIGGER               ECLIC_TRIGGER_DEFAULT
+#define GD32_IRQ_EXTI5_9_TRIGGER             ECLIC_TRIGGER_DEFAULT
+#define GD32_IRQ_EXTI10_15_TRIGGER           ECLIC_TRIGGER_DEFAULT
+
+/*
+ * ADC driver system settings.
+ */
+#define GD32_ADC_USE_ADC0                    FALSE
+#define GD32_ADC_ADC0_DMA_PRIORITY           2
+#define GD32_ADC_ADC0_IRQ_PRIORITY           6
+
+/*
+ * CAN driver system settings.
+ */
+#define GD32_CAN_USE_CAN0                    FALSE
+#define GD32_CAN_CAN0_IRQ_PRIORITY           11
+#define GD32_CAN_USE_CAN1                    FALSE
+#define GD32_CAN_CAN1_IRQ_PRIORITY           11
+#define GD32_CAN_CAN0_IRQ_TRIGGER            ECLIC_TRIGGER_DEFAULT
+#define GD32_CAN_CAN1_IRQ_TRIGGER            ECLIC_TRIGGER_DEFAULT
+
+/*
+ * CRC driver system settings.
+ */
+#define GD32_CRC_USE_CRC0                   FALSE
+#define GD32_CRC_CRC0_DMA_IRQ_PRIORITY      14
+#define GD32_CRC_CRC0_DMA_PRIORITY          2
+#define GD32_CRC_CRC0_DMA_STREAM            GD32_DMA_STREAM_ID(0, 0)
+#define CRC_USE_DMA                         FALSE
+#define CRCSW_USE_CRC1                      FALSE
+#define CRCSW_CRC32_TABLE                   FALSE
+#define CRCSW_CRC16_TABLE                   FALSE
+#define CRCSW_PROGRAMMABLE                  FALSE
+
+/*
+ * DAC driver system settings.
+ */
+#define GD32_DAC_USE_DAC_CH1                FALSE
+#define GD32_DAC_USE_DAC_CH2                FALSE
+
+/*
+ * GPT driver system settings.
+ */
+#define GD32_GPT_USE_TIM0                   FALSE
+#define GD32_GPT_USE_TIM1                   FALSE
+#define GD32_GPT_USE_TIM2                   FALSE
+#define GD32_GPT_USE_TIM3                   FALSE
+#define GD32_GPT_USE_TIM4                   FALSE
+#define GD32_GPT_TIM0_IRQ_PRIORITY          7
+#define GD32_GPT_TIM1_IRQ_PRIORITY          7
+#define GD32_GPT_TIM2_IRQ_PRIORITY          7
+#define GD32_GPT_TIM3_IRQ_PRIORITY          7
+#define GD32_GPT_TIM4_IRQ_PRIORITY          7
+#define GD32_GPT_TIM0_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_GPT_TIM1_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_GPT_TIM2_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_GPT_TIM3_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_GPT_TIM4_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_GPT_TIM5_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_GPT_TIM6_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+
+/*
+ * I2S driver system settings.
+ */
+#define GD32_I2S_USE_SPI1                   FALSE
+#define GD32_I2S_USE_SPI2                   FALSE
+#define GD32_I2S_SPI1_IRQ_PRIORITY          10
+#define GD32_I2S_SPI2_IRQ_PRIORITY          10
+#define GD32_I2S_SPI1_DMA_PRIORITY          1
+#define GD32_I2S_SPI2_DMA_PRIORITY          1
+#define GD32_I2S_DMA_ERROR_HOOK(i2sp)       osalSysHalt("DMA failure")
+
+/*
+ * I2C driver system settings.
+ */
+#define GD32_I2C_USE_I2C0                   FALSE
+#define GD32_I2C_USE_I2C1                   FALSE
+#define GD32_I2C_BUSY_TIMEOUT               50
+#define GD32_I2C_I2C0_IRQ_PRIORITY          10
+#define GD32_I2C_I2C1_IRQ_PRIORITY          5
+#define GD32_I2C_I2C0_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_I2C_I2C1_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_I2C_I2C0_DMA_PRIORITY          2
+#define GD32_I2C_I2C1_DMA_PRIORITY          2
+#define GD32_I2C_DMA_ERROR_HOOK(i2cp)       osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define GD32_ICU_USE_TIM0                   FALSE
+#define GD32_ICU_USE_TIM1                   FALSE
+#define GD32_ICU_USE_TIM2                   FALSE
+#define GD32_ICU_USE_TIM3                   FALSE
+#define GD32_ICU_USE_TIM4                   FALSE
+#define GD32_ICU_TIM0_IRQ_PRIORITY          7
+#define GD32_ICU_TIM1_IRQ_PRIORITY          7
+#define GD32_ICU_TIM2_IRQ_PRIORITY          7
+#define GD32_ICU_TIM3_IRQ_PRIORITY          7
+#define GD32_ICU_TIM4_IRQ_PRIORITY          7
+#define GD32_ICU_TIM0_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_ICU_TIM1_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_ICU_TIM2_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_ICU_TIM3_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_ICU_TIM4_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+
+/*
+ * PWM driver system settings.
+ */
+#define GD32_PWM_USE_ADVANCED               FALSE
+#define GD32_PWM_USE_TIM0                   FALSE
+#define GD32_PWM_USE_TIM1                   FALSE
+#define GD32_PWM_USE_TIM2                   FALSE
+#define GD32_PWM_USE_TIM3                   FALSE
+#define GD32_PWM_USE_TIM4                   FALSE
+#define GD32_PWM_TIM0_IRQ_PRIORITY          10
+#define GD32_PWM_TIM1_IRQ_PRIORITY          10
+#define GD32_PWM_TIM2_IRQ_PRIORITY          10
+#define GD32_PWM_TIM3_IRQ_PRIORITY          10
+#define GD32_PWM_TIM4_IRQ_PRIORITY          10
+#define GD32_PWM_TIM0_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_PWM_TIM1_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_PWM_TIM2_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_PWM_TIM3_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_PWM_TIM4_IRQ_TRIGGER           ECLIC_TRIGGER_DEFAULT
+
+/*
+ * RTC driver system settings.
+ */
+#define GD32_RTC_IRQ_PRIORITY               15
+#define GD32_RTC_IRQ_TRIGGER                ECLIC_TRIGGER_DEFAULT
+
+/*
+ * SERIAL driver system settings.
+ */
+#define GD32_SERIAL_USE_USART0              FALSE
+#define GD32_SERIAL_USE_USART1              FALSE
+#define GD32_SERIAL_USE_USART2              FALSE
+#define GD32_SERIAL_USE_UART3               FALSE
+#define GD32_SERIAL_USE_UART4               FALSE
+#define GD32_SERIAL_USART0_PRIORITY         10
+#define GD32_SERIAL_USART1_PRIORITY         10
+#define GD32_SERIAL_USART2_PRIORITY         10
+#define GD32_SERIAL_UART3_PRIORITY          10
+#define GD32_SERIAL_UART4_PRIORITY          10
+#define GD32_SERIAL_USART0_TRIGGER          ECLIC_TRIGGER_DEFAULT
+#define GD32_SERIAL_USART1_TRIGGER          ECLIC_TRIGGER_DEFAULT
+#define GD32_SERIAL_USART2_TRIGGER          ECLIC_TRIGGER_DEFAULT
+#define GD32_SERIAL_UART3_TRIGGER           ECLIC_TRIGGER_DEFAULT
+#define GD32_SERIAL_UART4_TRIGGER           ECLIC_TRIGGER_DEFAULT
+
+/*
+ * SPI driver system settings.
+ */
+#define GD32_SPI_USE_SPI0                   FALSE
+#define GD32_SPI_USE_SPI1                   FALSE
+#define GD32_SPI_USE_SPI2                   FALSE
+#define GD32_SPI_SPI0_DMA_PRIORITY          1
+#define GD32_SPI_SPI1_DMA_PRIORITY          1
+#define GD32_SPI_SPI2_DMA_PRIORITY          1
+#define GD32_SPI_SPI0_IRQ_PRIORITY          10
+#define GD32_SPI_SPI1_IRQ_PRIORITY          10
+#define GD32_SPI_SPI2_IRQ_PRIORITY          10
+#define GD32_SPI_DMA_ERROR_HOOK(spip)       osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define GD32_ST_IRQ_PRIORITY                10
+#define GD32_ST_IRQ_TRIGGER                 ECLIC_TRIGGER_DEFAULT
+#define GD32_ST_USE_TIMER                   1
+
+/*
+ * UART driver system settings.
+ */
+#define GD32_UART_USE_USART0                FALSE
+#define GD32_UART_USE_USART1                FALSE
+#define GD32_UART_USE_USART2                FALSE
+#define GD32_UART_USE_UART3                 FALSE
+#define GD32_UART_USE_UART4                 FALSE
+#define GD32_UART_USART0_IRQ_PRIORITY       10
+#define GD32_UART_USART1_IRQ_PRIORITY       10
+#define GD32_UART_USART2_IRQ_PRIORITY       10
+#define GD32_UART_UART3_IRQ_PRIORITY        10
+#define GD32_UART_UART4_IRQ_PRIORITY        10
+#define GD32_UART_USART0_IRQ_TRIGGER        ECLIC_TRIGGER_DEFAULT
+#define GD32_UART_USART1_IRQ_TRIGGER        ECLIC_TRIGGER_DEFAULT
+#define GD32_UART_USART2_IRQ_TRIGGER        ECLIC_TRIGGER_DEFAULT
+#define GD32_UART_UART3_IRQ_TRIGGER         ECLIC_TRIGGER_DEFAULT
+#define GD32_UART_UART4_IRQ_TRIGGER         ECLIC_TRIGGER_DEFAULT
+#define GD32_UART_USART0_DMA_PRIORITY       3
+#define GD32_UART_USART1_DMA_PRIORITY       3
+#define GD32_UART_USART2_DMA_PRIORITY       3
+#define GD32_UART_UART3_DMA_PRIORITY        3
+#define GD32_UART_UART4_DMA_PRIORITY        3
+#define GD32_UART_DMA_ERROR_HOOK(uartp)     osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define GD32_USB_USE_USBFS                  TRUE
+#define GD32_USB_USBFS_IRQ_PRIORITY         10
+#define GD32_USB_USBFS_IRQ_TRIGGER          ECLIC_TRIGGER_DEFAULT
+#define GD32_USB_USBFS_RX_FIFO_SIZE         256
+
+/*
+ * WDG driver system settings.
+ */
+#define GD32_WDG_USE_FWDGT                  FALSE
diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c
index 8c476fcac2..eb437665f1 100644
--- a/platforms/chibios/drivers/analog.c
+++ b/platforms/chibios/drivers/analog.c
@@ -38,7 +38,7 @@
 // Otherwise assume V3
 #if defined(STM32F0XX) || defined(STM32L0XX)
 #    define USE_ADCV1
-#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX)
+#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103)
 #    define USE_ADC