adds support for preonic rev 3

21 files changed, 3223 insertions, 16 deletions

diff --git a/keyboards/preonic/config.h b/keyboards/preonic/config.h
index 172fd645c2..739e38555b 100644
--- a/keyboards/preonic/config.h
+++ b/keyboards/preonic/config.h
@@ -68,14 +68,6 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
     keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
 )
 
-/* ws2812 RGB LED */
-#define RGB_DI_PIN D1
-#define RGBLIGHT_ANIMATIONS
-#define RGBLED_NUM 28     // Number of LEDs
-#define RGBLIGHT_HUE_STEP 10
-#define RGBLIGHT_SAT_STEP 17
-#define RGBLIGHT_VAL_STEP 17
-
 /*
  * Feature disable options
  *  These options are also useful to firmware size reduction.
diff --git a/keyboards/preonic/keymaps/default/keymap.c b/keyboards/preonic/keymaps/default/keymap.c
index de3eb2298f..33ca90f99b 100644
--- a/keyboards/preonic/keymaps/default/keymap.c
+++ b/keyboards/preonic/keymaps/default/keymap.c
@@ -15,6 +15,7 @@
  */
 
 #include QMK_KEYBOARD_H
+#include "muse.h"
 
 enum preonic_layers {
   _QWERTY,
@@ -211,13 +212,96 @@ bool process_record_user(uint16_t keycode, keyrecord_t *record) {
             #ifdef BACKLIGHT_ENABLE
               backlight_step();
             #endif
+            #ifdef __AVR__
             PORTE &= ~(1<<6);
+            #endif
           } else {
             unregister_code(KC_RSFT);
+            #ifdef __AVR__
             PORTE |= (1<<6);
+            #endif
           }
           return false;
           break;
       }
     return true;
 };
+
+bool muse_mode = false;
+uint8_t last_muse_note = 0;
+uint16_t muse_counter = 0;
+uint8_t muse_offset = 70;
+uint16_t muse_tempo = 50;
+
+void encoder_update(bool clockwise) {
+  if (muse_mode) {
+    if (IS_LAYER_ON(_RAISE)) {
+      if (clockwise) {
+        muse_offset++;
+      } else {
+        muse_offset--;
+      }
+    } else {
+      if (clockwise) {
+        muse_tempo+=1;
+      } else {
+        muse_tempo-=1;
+      }
+    }
+  } else {
+    if (clockwise) {
+      register_code(KC_PGDN);
+      unregister_code(KC_PGDN);
+    } else {
+      register_code(KC_PGUP);
+      unregister_code(KC_PGUP);
+    }
+  }
+}
+
+void dip_update(uint8_t index, bool active) {
+  switch (index) {
+    case 0:
+      if (active) {
+        layer_on(_ADJUST);
+      } else {
+        layer_off(_ADJUST);
+      }
+      break;
+    case 1:
+      if (active) {
+        muse_mode = true;
+      } else {
+        muse_mode = false;
+        #ifdef AUDIO_ENABLE
+          stop_all_notes();
+        #endif
+      }
+   }
+}
+
+void matrix_scan_user(void) {
+  #ifdef AUDIO_ENABLE
+    if (muse_mode) {
+      if (muse_counter == 0) {
+        uint8_t muse_note = muse_offset + SCALE[muse_clock_pulse()];
+        if (muse_note != last_muse_note) {
+          stop_note(compute_freq_for_midi_note(last_muse_note));
+          play_note(compute_freq_for_midi_note(muse_note), 0xF);
+          last_muse_note = muse_note;
+        }
+      }
+      muse_counter = (muse_counter + 1) % muse_tempo;
+    }
+  #endif
+}
+
+bool music_mask_user(uint16_t keycode) {
+  switch (keycode) {
+    case RAISE:
+    case LOWER:
+      return false;
+    default:
+      return true;
+  }
+}
diff --git a/keyboards/preonic/keymaps/default/rules.mk b/keyboards/preonic/keymaps/default/rules.mk
index e69de29bb2..dcf16bef39 100644
--- a/keyboards/preonic/keymaps/default/rules.mk
+++ b/keyboards/preonic/keymaps/default/rules.mk
@@ -0,0 +1 @@
+SRC += muse.c
diff --git a/keyboards/preonic/preonic.c b/keyboards/preonic/preonic.c
index 637a73ab8b..ff07f961f2 100644
--- a/keyboards/preonic/preonic.c
+++ b/keyboards/preonic/preonic.c
@@ -11,11 +11,10 @@ const keypos_t hand_swap_config[MATRIX_ROWS][MATRIX_COLS] = {
 };
 #endif
 
-void matrix_init_kb(void) {
-
-    // Turn status LED on
-    DDRE |= (1<<6);
-    PORTE |= (1<<6);
-
-	matrix_init_user();
-};
\ No newline at end of file
+const uint8_t music_map[MATRIX_ROWS][MATRIX_COLS] = LAYOUT_preonic_grid(
+  48, 49, 50, 51, 52, 53, 53, 55, 56, 57, 58, 59,
+  36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+  24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
+  12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+   0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11
+);
diff --git a/keyboards/preonic/preonic.h b/keyboards/preonic/preonic.h
index 1977bde697..b75c4990ba 100644
--- a/keyboards/preonic/preonic.h
+++ b/keyboards/preonic/preonic.h
@@ -3,6 +3,8 @@
 
 #include "quantum.h"
 
+#ifdef __AVR__
+
 #define LAYOUT_preonic_mit( \
 	k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
 	k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
@@ -36,4 +38,112 @@
 #define KEYMAP LAYOUT_preonic_mit
 #define LAYOUT_ortho_5x12 LAYOUT_preonic_grid
 
+#else
+
+#define LAYOUT_preonic_1x2uC( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, \
+    k40, k41, k42, k43, k44,    k45,   k47, k48, k49, k4a, k4b \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k33, k34, k35 }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k39, k3a, k3b }, \
+    { k40, k41, k42, k49, k4a, k4b }, \
+    { k46, k47, k48, k43, k44, k45 } \
+}
+
+#define LAYOUT_preonic_1x2uR( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, \
+    k40, k41, k42, k43, k44, k45,   k47,    k48, k49, k4a, k4b \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k33, k34, k35 }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k39, k3a, k3b }, \
+    { k40, k41, k42, k49, k4a, k4b }, \
+    { k46, k47, k48, k43, k44, k45 } \
+}
+#define LAYOUT_preonic_1x2uL( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, \
+    k40, k41, k42, k43,   k44,    k46, k47, k48, k49, k4a, k4b \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k33, k34, k35 }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k39, k3a, k3b }, \
+    { k40, k41, k42, k49, k4a, k4b }, \
+    { k46, k47, k48, k43, k44, k45 } \
+}
+
+#define LAYOUT_preonic_2x2u( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, \
+    k40, k41, k42, k43,   k44,      k46,    k48, k49, k4a, k4b \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k33, k34, k35 }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k39, k3a, k3b }, \
+    { k40, k41, k42, k49, k4a, k4b }, \
+    { k46, k47, k48, k43, k44, k45 } \
+}
+
+#define LAYOUT_preonic_grid( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, \
+    k40, k41, k42, k43, k44, k45, k46, k47, k48, k49, k4a, k4b \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k33, k34, k35 }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k39, k3a, k3b }, \
+    { k40, k41, k42, k49, k4a, k4b }, \
+    { k46, k47, k48, k43, k44, k45 } \
+}
+
+#define KEYMAP LAYOUT_preonic_grid
+#define LAYOUT_ortho_4x12 LAYOUT_preonic_grid
+#define KC_LAYOUT_ortho_4x12 KC_KEYMAP
+
+
+#endif
+
 #endif
diff --git a/keyboards/preonic/rev1/rev1.c b/keyboards/preonic/rev1/rev1.c
new file mode 100644
index 0000000000..4e87796081
--- /dev/null
+++ b/keyboards/preonic/rev1/rev1.c
@@ -0,0 +1,25 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "rev1.h"
+
+void matrix_init_kb(void) {
+
+    // Turn status LED on
+    DDRE |= (1<<6);
+    PORTE |= (1<<6);
+
+  matrix_init_user();
+};
diff --git a/keyboards/preonic/rev1/rev1.h b/keyboards/preonic/rev1/rev1.h
new file mode 100644
index 0000000000..6705b72591
--- /dev/null
+++ b/keyboards/preonic/rev1/rev1.h
@@ -0,0 +1,16 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "preonic.h"
\ No newline at end of file
diff --git a/keyboards/preonic/rev2/rev2.c b/keyboards/preonic/rev2/rev2.c
new file mode 100644
index 0000000000..30e3110e46
--- /dev/null
+++ b/keyboards/preonic/rev2/rev2.c
@@ -0,0 +1,25 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "rev2.h"
+
+void matrix_init_kb(void) {
+
+    // Turn status LED on
+    DDRE |= (1<<6);
+    PORTE |= (1<<6);
+
+  matrix_init_user();
+};
diff --git a/keyboards/preonic/rev2/rev2.h b/keyboards/preonic/rev2/rev2.h
new file mode 100644
index 0000000000..5117214598
--- /dev/null
+++ b/keyboards/preonic/rev2/rev2.h
@@ -0,0 +1,17 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "preonic.h"
diff --git a/keyboards/preonic/rev3/boards/GENERIC_STM32_F303XC/board.c b/keyboards/preonic/rev3/boards/GENERIC_STM32_F303XC/board.c
new file mode 100644
index 0000000000..4331155df4
--- /dev/null
+++ b/keyboards/preonic/rev3/boards/GENERIC_STM32_F303XC/board.c
@@ -0,0 +1,126 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "hal.h"
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
+#endif
+};
+#endif
+
+void enter_bootloader_mode_if_requested(void);
+
+/**
+ * @brief   Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ *          and before any other initialization.
+ */
+void __early_init(void) {
+  enter_bootloader_mode_if_requested();
+  stm32_clock_init();
+}
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+/**
+ * @brief   SDC card detection.
+ */
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+
+  (void)sdcp;
+  /* TODO: Fill the implementation.*/
+  return true;
+}
+
+/**
+ * @brief   SDC card write protection detection.
+ */
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
+
+  (void)sdcp;
+  /* TODO: Fill the implementation.*/
+  return false;
+}
+#endif /* HAL_USE_SDC */
+
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
+/**
+ * @brief   MMC_SPI card detection.
+ */
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  /* TODO: Fill the implementation.*/
+  return true;
+}
+
+/**
+ * @brief   MMC_SPI card write protection detection.
+ */
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  /* TODO: Fill the implementation.*/
+  return false;
+}
+#endif
+
+/**
+ * @brief   Board-specific initialization code.
+ * @todo    Add your board-specific code, if any.
+ */
+void boardInit(void) {
+}
diff --git a/keyboards/preonic/rev3/boards/GENERIC_STM32_F303XC/board.h b/keyboards/preonic/rev3/boards/GENERIC_STM32_F303XC/board.h
new file mode 100644
index 0000000000..ec26557f3a
--- /dev/null
+++ b/keyboards/preonic/rev3/boards/GENERIC_STM32_F303XC/board.h
@@ -0,0 +1,1187 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for Clueboard 60% Keyboard
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_GENERIC_STM32_F303XC
+#define BOARD_NAME                  "Planck PCB"
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK                0U
+#endif
+
+#define STM32_LSEDRV                (3U << 3U)
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK                8000000U
+#endif
+
+// #define STM32_HSE_BYPASS
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32F303xC
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_PIN0       0U
+#define GPIOA_PIN1       1U
+#define GPIOA_PIN2       2U
+#define GPIOA_PIN3       3U
+#define GPIOA_PIN4       4U
+#define GPIOA_PIN5       5U
+#define GPIOA_PIN6       6U
+#define GPIOA_PIN7       7U
+#define GPIOA_PIN8       8U
+#define GPIOA_PIN9       9U
+#define GPIOA_PIN10      10U
+#define GPIOA_USB_DM     11U
+#define GPIOA_USB_DP     12U
+#define GPIOA_SWDIO      13U
+#define GPIOA_SWCLK      14U
+#define GPIOA_PIN15      15U
+
+#define GPIOB_PIN0       0U
+#define GPIOB_PIN1       1U
+#define GPIOB_PIN2       2U
+#define GPIOB_PIN3       3U
+#define GPIOB_PIN4       4U
+#define GPIOB_PIN5       5U
+#define GPIOB_PIN6       6U
+#define GPIOB_PIN7       7U
+#define GPIOB_PIN8       8U
+#define GPIOB_PIN9       9U
+#define GPIOB_PIN10      10U
+#define GPIOB_PIN11      11U
+#define GPIOB_PIN12      12U
+#define GPIOB_PIN13      13U
+#define GPIOB_PIN14      14U
+#define GPIOB_PIN15      15U
+
+#define GPIOC_PIN0       0U
+#define GPIOC_PIN1       1U
+#define GPIOC_PIN2       2U
+#define GPIOC_PIN3       3U
+#define GPIOC_PIN4       4U
+#define GPIOC_PIN5       5U
+#define GPIOC_PIN6       6U
+#define GPIOC_PIN7       7U
+#define GPIOC_PIN8       8U
+#define GPIOC_PIN9       9U
+#define GPIOC_PIN10      10U
+#define GPIOC_PIN11      11U
+#define GPIOC_PIN12      12U
+#define GPIOC_PIN13      13U
+#define GPIOC_PIN14      14U
+#define GPIOC_PIN15      15U
+
+#define GPIOD_PIN0       0U
+#define GPIOD_PIN1       1U
+#define GPIOD_PIN2       2U
+#define GPIOD_PIN3       3U
+#define GPIOD_PIN4       4U
+#define GPIOD_PIN5       5U
+#define GPIOD_PIN6       6U
+#define GPIOD_PIN7       7U
+#define GPIOD_PIN8       8U
+#define GPIOD_PIN9       9U
+#define GPIOD_PIN10      10U
+#define GPIOD_PIN11      11U
+#define GPIOD_PIN12      12U
+#define GPIOD_PIN13      13U
+#define GPIOD_PIN14      14U
+#define GPIOD_PIN15      15U
+
+#define GPIOE_PIN0       0U
+#define GPIOE_PIN1       1U
+#define GPIOE_PIN2       2U
+#define GPIOE_PIN3       3U
+#define GPIOE_PIN4       4U
+#define GPIOE_PIN5       5U
+#define GPIOE_PIN6       6U
+#define GPIOE_PIN7       7U
+#define GPIOE_PIN8       8U
+#define GPIOE_PIN9       9U
+#define GPIOE_PIN10      10U
+#define GPIOE_PIN11      11U
+#define GPIOE_PIN12      12U
+#define GPIOE_PIN13      13U
+#define GPIOE_PIN14      14U
+#define GPIOE_PIN15      15U
+
+#define GPIOF_I2C2_SDA   0U
+#define GPIOF_I2C2_SCL   1U
+#define GPIOF_PIN2       2U
+#define GPIOF_PIN3       3U
+#define GPIOF_PIN4       4U
+#define GPIOF_PIN5       5U
+#define GPIOF_PIN6       6U
+#define GPIOF_PIN7       7U
+#define GPIOF_PIN8       8U
+#define GPIOF_PIN9       9U
+#define GPIOF_PIN10      10U
+#define GPIOF_PIN11      11U
+#define GPIOF_PIN12      12U
+#define GPIOF_PIN13      13U
+#define GPIOF_PIN14      14U
+#define GPIOF_PIN15      15U
+
+#define GPIOG_PIN0       0U
+#define GPIOG_PIN1       1U
+#define GPIOG_PIN2       2U
+#define GPIOG_PIN3       3U
+#define GPIOG_PIN4       4U
+#define GPIOG_PIN5       5U
+#define GPIOG_PIN6       6U
+#define GPIOG_PIN7       7U
+#define GPIOG_PIN8       8U
+#define GPIOG_PIN9       9U
+#define GPIOG_PIN10      10U
+#define GPIOG_PIN11      11U
+#define GPIOG_PIN12      12U
+#define GPIOG_PIN13      13U
+#define GPIOG_PIN14      14U
+#define GPIOG_PIN15      15U
+
+#define GPIOH_PIN0       0U
+#define GPIOH_PIN1       1U
+#define GPIOH_PIN2       2U
+#define GPIOH_PIN3       3U
+#define GPIOH_PIN4       4U
+#define GPIOH_PIN5       5U
+#define GPIOH_PIN6       6U
+#define GPIOH_PIN7       7U
+#define GPIOH_PIN8       8U
+#define GPIOH_PIN9       9U
+#define GPIOH_PIN10      10U
+#define GPIOH_PIN11      11U
+#define GPIOH_PIN12      12U
+#define GPIOH_PIN13      13U
+#define GPIOH_PIN14      14U
+#define GPIOH_PIN15      15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_L3GD20_SDI             PAL_LINE(GPIOA, 7U)
+#define LINE_USB_DM                 PAL_LINE(GPIOA, 11U)
+#define LINE_USB_DP                 PAL_LINE(GPIOA, 12U)
+#define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)
+#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)
+
+#define LINE_PIN6               PAL_LINE(GPIOF, 0U)
+#define LINE_PIN7               PAL_LINE(GPIOF, 1U)
+
+#define LINE_CAPS_LOCK               PAL_LINE(GPIOB, 7U)
+
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
+#define PIN_ODR_LOW(n)              (0U << (n))
+#define PIN_ODR_HIGH(n)             (1U << (n))
+#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
+#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))
+#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))
+#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))
+#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0  - NC
+ * PA1  - NC
+ * PA2  - COL1
+ * PA3  - COL2
+ * PA4  - SPEAKER1
+ * PA5  - SPEAKER2
+ * PA6  - COL3
+ * PA7  - COL8
+ * PA8  - COL6
+ * PA9  - COL7
+ * PA10 - ROW5
+ * PA11 - USB_DM                    (alternate 14).
+ * PA12 - USB_DP                    (alternate 14).
+ * PA13 - SWDIO                     (alternate 0).
+ * PA14 - SWCLK                     (alternate 0).
+ * PA15 - ROW4
+ */
+#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_PIN0) |         \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN1) |           \
+                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \
+                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \
+                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \
+                                     PIN_MODE_INPUT(GPIOA_PIN5) |   \
+                                     PIN_MODE_INPUT(GPIOA_PIN6) |  \
+                                     PIN_MODE_INPUT(GPIOA_PIN7) |  \
+                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
+                                     PIN_MODE_INPUT(GPIOA_PIN9) |           \
+                                     PIN_MODE_INPUT(GPIOA_PIN10) |          \
+                                     PIN_MODE_ALTERNATE(GPIOA_USB_DM) |     \
+                                     PIN_MODE_ALTERNATE(GPIOA_USB_DP) |     \
+                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \
+                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
+                                     PIN_MODE_INPUT(GPIOA_PIN15))
+#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) |     \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |   \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |  \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN7) |  \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN9) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN10) |      \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) |     \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) |     \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |      \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
+#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOA_PIN0) |     \
+                                     PIN_OSPEED_HIGH(GPIOA_PIN1) |       \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN2) |       \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN3) |       \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN4) |       \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN5) |      \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN6) |     \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN7) |     \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN8) |       \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN9) |       \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN10) |      \
+                                     PIN_OSPEED_HIGH(GPIOA_USB_DM) |        \
+                                     PIN_OSPEED_VERYLOW(GPIOA_USB_DP) |     \
+                                     PIN_OSPEED_HIGH(GPIOA_SWDIO) |         \
+                                     PIN_OSPEED_HIGH(GPIOA_SWCLK) |         \
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN15))
+#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_PIN0) |     \
+                                     PIN_PUPDR_FLOATING(GPIOA_PIN1) |         \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |   \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |    \
+                                     PIN_PUPDR_FLOATING(GPIOA_PIN7) |  \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN9) |         \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN10) |        \
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_DM) |     \
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_DP) |     \
+                                     PIN_PUPDR_PULLUP(GPIOA_SWDIO) |        \
+                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
+#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_PIN0) |           \
+                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
+                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
+                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
+                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \
+                                     PIN_ODR_HIGH(GPIOA_PIN5) |         \
+                                     PIN_ODR_HIGH(GPIOA_PIN6) |        \
+                                     PIN_ODR_HIGH(GPIOA_PIN7) |        \
+                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
+                                     PIN_ODR_HIGH(GPIOA_PIN9) |             \
+                                     PIN_ODR_HIGH(GPIOA_PIN10) |            \
+                                     PIN_ODR_HIGH(GPIOA_USB_DM) |           \
+                                     PIN_ODR_HIGH(GPIOA_USB_DP) |           \
+                                     PIN_ODR_HIGH(GPIOA_SWDIO) |            \
+                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
+                                     PIN_ODR_HIGH(GPIOA_PIN15))
+#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_PIN0, 0) |         \
+                                     PIN_AFIO_AF(GPIOA_PIN1, 1) |           \
+                                     PIN_AFIO_AF(GPIOA_PIN2, 0) |           \
+                                     PIN_AFIO_AF(GPIOA_PIN3, 0) |           \
+                                     PIN_AFIO_AF(GPIOA_PIN4, 0) |           \
+                                     PIN_AFIO_AF(GPIOA_PIN5, 5) |       \
+                                     PIN_AFIO_AF(GPIOA_PIN6, 5) |      \
+                                     PIN_AFIO_AF(GPIOA_PIN7, 5))
+#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0) |           \