From 1950a145c7d7c14167c8192b850e6edbadf67dc7 Mon Sep 17 00:00:00 2001 From: Shihpin Tseng Date: Mon, 20 Aug 2018 02:16:06 +0800 Subject: Fix process_combo which assign -1 to uint16_t --- quantum/process_keycode/process_combo.c | 18 +++++++++--------- quantum/process_keycode/process_combo.h | 1 + 2 files changed, 10 insertions(+), 9 deletions(-) (limited to 'quantum') diff --git a/quantum/process_keycode/process_combo.c b/quantum/process_keycode/process_combo.c index 6e9c28e4fc..13f8bbb331 100644 --- a/quantum/process_keycode/process_combo.c +++ b/quantum/process_keycode/process_combo.c @@ -18,9 +18,6 @@ #include "print.h" -#define COMBO_TIMER_ELAPSED -1 - - __attribute__ ((weak)) combo_t key_combos[COMBO_COUNT] = { @@ -65,7 +62,7 @@ static bool process_single_combo(combo_t *combo, uint16_t keycode, keyrecord_t * if (-1 == (int8_t)index) return false; /* The combos timer is used to signal whether the combo is active */ - bool is_combo_active = COMBO_TIMER_ELAPSED == combo->timer ? false : true; + bool is_combo_active = combo->is_active; if (record->event.pressed) { KEY_STATE_DOWN(index); @@ -73,9 +70,10 @@ static bool process_single_combo(combo_t *combo, uint16_t keycode, keyrecord_t * if (is_combo_active) { if (ALL_COMBO_KEYS_ARE_DOWN) { /* Combo was pressed */ send_combo(combo->keycode, true); - combo->timer = COMBO_TIMER_ELAPSED; + combo->is_active = false; } else { /* Combo key was pressed */ combo->timer = timer_read(); + combo->is_active = true; #ifdef COMBO_ALLOW_ACTION_KEYS combo->prev_record = *record; #else @@ -99,6 +97,7 @@ static bool process_single_combo(combo_t *combo, uint16_t keycode, keyrecord_t * send_keyboard_report(); unregister_code16(keycode); #endif + combo->is_active = false; combo->timer = 0; } @@ -106,6 +105,7 @@ static bool process_single_combo(combo_t *combo, uint16_t keycode, keyrecord_t * } if (NO_COMBO_KEYS_ARE_DOWN) { + combo->is_active = true; combo->timer = 0; } @@ -132,14 +132,14 @@ void matrix_scan_combo(void) #pragma GCC diagnostic ignored "-Warray-bounds" combo_t *combo = &key_combos[i]; #pragma GCC diagnostic pop - if (combo->timer && - combo->timer != COMBO_TIMER_ELAPSED && + if (combo->is_active && + combo->timer && timer_elapsed(combo->timer) > COMBO_TERM) { - + /* This disables the combo, meaning key events for this * combo will be handled by the next processors in the chain */ - combo->timer = COMBO_TIMER_ELAPSED; + combo->is_active = false; #ifdef COMBO_ALLOW_ACTION_KEYS process_action(&combo->prev_record, diff --git a/quantum/process_keycode/process_combo.h b/quantum/process_keycode/process_combo.h index a5dbd788a4..a5787c9ed3 100644 --- a/quantum/process_keycode/process_combo.h +++ b/quantum/process_keycode/process_combo.h @@ -33,6 +33,7 @@ typedef struct uint8_t state; #endif uint16_t timer; + bool is_active; #ifdef COMBO_ALLOW_ACTION_KEYS keyrecord_t prev_record; #else -- cgit v1.2.3 From cd9262d7b2dcde5d31aa34f066dd593a012d7049 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Konstantin=20=C4=90or=C4=91evi=C4=87?= Date: Mon, 7 Jan 2019 21:56:57 +0100 Subject: Improve consistency in UNICODEMAP code and docs, update docs/understanding_qmk (#4774) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Remove unused UNICODE(n) macro, update docs * Add note about max length of unicode_map to docs * QK_UNICODE_MAP → QK_UNICODEMAP * Refactor process_unicode_map * process_unicode_map → process_unicodemap This is done for consistency: UNICODEMAP is the method (hence UNICODEMAP_ENABLE, process_unicodemap), whereas unicode_map is the mapping table itself. * Update references and ordering in docs/understanding_qmk * Add additional note to docs/understanding_qmk * &unicode_map[index] → unicode_map + index This avoids the issue of the compiler sometimes complaining about the array index being out of range * Update docs/getting_started_make_guide * Update method sections in docs/feature_unicode --- quantum/process_keycode/process_unicode_common.c | 2 +- quantum/process_keycode/process_unicodemap.c | 33 ++++++++++++------------ quantum/process_keycode/process_unicodemap.h | 4 +-- quantum/quantum_keycodes.h | 15 +++++------ 4 files changed, 25 insertions(+), 29 deletions(-) (limited to 'quantum') diff --git a/quantum/process_keycode/process_unicode_common.c b/quantum/process_keycode/process_unicode_common.c index 3286f45b5d..b64feb7003 100644 --- a/quantum/process_keycode/process_unicode_common.c +++ b/quantum/process_keycode/process_unicode_common.c @@ -216,7 +216,7 @@ bool process_unicode_common(uint16_t keycode, keyrecord_t *record) { #if defined(UNICODE_ENABLE) return process_unicode(keycode, record); #elif defined(UNICODEMAP_ENABLE) - return process_unicode_map(keycode, record); + return process_unicodemap(keycode, record); #elif defined(UCIS_ENABLE) return process_ucis(keycode, record); #else diff --git a/quantum/process_keycode/process_unicodemap.c b/quantum/process_keycode/process_unicodemap.c index 75f35112b1..cee9acb5fc 100644 --- a/quantum/process_keycode/process_unicodemap.c +++ b/quantum/process_keycode/process_unicodemap.c @@ -18,8 +18,7 @@ #include "process_unicode_common.h" __attribute__((weak)) -const uint32_t PROGMEM unicode_map[] = { -}; +const uint32_t PROGMEM unicode_map[] = {}; void register_hex32(uint32_t hex) { bool onzerostart = true; @@ -42,26 +41,26 @@ void register_hex32(uint32_t hex) { } __attribute__((weak)) -void unicode_map_input_error() {} +void unicodemap_input_error() {} -bool process_unicode_map(uint16_t keycode, keyrecord_t *record) { - uint8_t input_mode = get_unicode_input_mode(); - if ((keycode & QK_UNICODE_MAP) == QK_UNICODE_MAP && record->event.pressed) { - const uint32_t* map = unicode_map; - uint16_t index = keycode - QK_UNICODE_MAP; - uint32_t code = pgm_read_dword(&map[index]); - if (code > 0xFFFF && code <= 0x10ffff && input_mode == UC_OSX) { +bool process_unicodemap(uint16_t keycode, keyrecord_t *record) { + if ((keycode & QK_UNICODEMAP) == QK_UNICODEMAP && record->event.pressed) { + uint16_t index = keycode - QK_UNICODEMAP; + uint32_t code = pgm_read_dword(unicode_map + index); + uint8_t input_mode = get_unicode_input_mode(); + + if (code > 0xFFFF && code <= 0x10FFFF && input_mode == UC_OSX) { // Convert to UTF-16 surrogate pair code -= 0x10000; - uint32_t lo = code & 0x3ff; - uint32_t hi = (code & 0xffc00) >> 10; + uint32_t lo = code & 0x3FF, hi = (code & 0xFFC00) >> 10; + unicode_input_start(); - register_hex32(hi + 0xd800); - register_hex32(lo + 0xdc00); + register_hex32(hi + 0xD800); + register_hex32(lo + 0xDC00); unicode_input_finish(); - } else if ((code > 0x10ffff && input_mode == UC_OSX) || (code > 0xFFFFF && input_mode == UC_LNX)) { - // when character is out of range supported by the OS - unicode_map_input_error(); + } else if ((code > 0x10FFFF && input_mode == UC_OSX) || (code > 0xFFFFF && input_mode == UC_LNX)) { + // Character is out of range supported by the OS + unicodemap_input_error(); } else { unicode_input_start(); register_hex32(code); diff --git a/quantum/process_keycode/process_unicodemap.h b/quantum/process_keycode/process_unicodemap.h index f6d64bb86b..5764697f84 100644 --- a/quantum/process_keycode/process_unicodemap.h +++ b/quantum/process_keycode/process_unicodemap.h @@ -19,5 +19,5 @@ #include "quantum.h" #include "process_unicode_common.h" -void unicode_map_input_error(void); -bool process_unicode_map(uint16_t keycode, keyrecord_t *record); +void unicodemap_input_error(void); +bool process_unicodemap(uint16_t keycode, keyrecord_t *record); diff --git a/quantum/quantum_keycodes.h b/quantum/quantum_keycodes.h index 2b309f4d52..ccf5371f0e 100644 --- a/quantum/quantum_keycodes.h +++ b/quantum/quantum_keycodes.h @@ -86,8 +86,8 @@ enum quantum_keycodes { QK_UNICODE_MAX = 0xFFFF, #endif #ifdef UNICODEMAP_ENABLE - QK_UNICODE_MAP = 0x8000, - QK_UNICODE_MAP_MAX = 0x83FF, + QK_UNICODEMAP = 0x8000, + QK_UNICODEMAP_MAX = 0x83FF, #endif // Loose keycodes - to be used directly @@ -679,15 +679,12 @@ enum quantum_keycodes { #define KC_MEH MEH(KC_NO) #ifdef UNICODE_ENABLE - // For sending unicode codes. - // You may not send codes over 7FFF -- this supports most of UTF8. - // To have a key that sends out Œ, go UC(0x0152) - #define UNICODE(n) (QK_UNICODE | (n)) - #define UC(n) UNICODE(n) + // Allows Unicode input up to 0x7FFF + #define UC(c) (QK_UNICODE | (c)) #endif - #ifdef UNICODEMAP_ENABLE - #define X(n) (QK_UNICODE_MAP | (n)) + // Allows Unicode input up to 0x10FFFF, requires unicode_map + #define X(i) (QK_UNICODEMAP | (i)) #endif #define UC_MOD UNICODE_MODE_FORWARD -- cgit v1.2.3 From 64c957d907fc7476eca3c26c977ca55cf8a56b38 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Konstantin=20=C4=90or=C4=91evi=C4=87?= Date: Wed, 9 Jan 2019 00:08:17 +0100 Subject: Add missing parentheses to some important macros (#4775) * Add missing parentheses to quantum_keycodes macros * Add missing parentheses to progmem macros --- quantum/quantum_keycodes.h | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) (limited to 'quantum') diff --git a/quantum/quantum_keycodes.h b/quantum/quantum_keycodes.h index ccf5371f0e..583ba82646 100644 --- a/quantum/quantum_keycodes.h +++ b/quantum/quantum_keycodes.h @@ -489,9 +489,8 @@ enum quantum_keycodes { #define SWIN(kc) SGUI(kc) #define LCA(kc) (QK_LCTL | QK_LALT | (kc)) -#define MOD_HYPR 0xf -#define MOD_MEH 0x7 - +#define MOD_HYPR 0xF +#define MOD_MEH 0x7 // Aliases for shifted symbols // Each key has a 4-letter code, and some have longer aliases too. @@ -601,7 +600,7 @@ enum quantum_keycodes { #define RGB_M_T RGB_MODE_RGBTEST // L-ayer, T-ap - 256 keycode max, 16 layer max -#define LT(layer, kc) (QK_LAYER_TAP | ((layer & 0xF) << 8) | ((kc) & 0xFF)) +#define LT(layer, kc) (QK_LAYER_TAP | (((layer) & 0xF) << 8) | ((kc) & 0xFF)) #define AG_SWAP MAGIC_SWAP_ALT_GUI #define AG_NORM MAGIC_UNSWAP_ALT_GUI @@ -615,28 +614,28 @@ enum quantum_keycodes { // In fact, we changed it to assume ON_PRESS for sanity/simplicity. If needed, you can add your own // keycode modeled after the old version, kept below for this. /* #define TO(layer, when) (QK_TO | (when << 0x4) | (layer & 0xFF)) */ -#define TO(layer) (QK_TO | (ON_PRESS << 0x4) | (layer & 0xFF)) +#define TO(layer) (QK_TO | (ON_PRESS << 0x4) | ((layer) & 0xFF)) // Momentary switch layer - 256 layer max -#define MO(layer) (QK_MOMENTARY | (layer & 0xFF)) +#define MO(layer) (QK_MOMENTARY | ((layer) & 0xFF)) // Set default layer - 256 layer max -#define DF(layer) (QK_DEF_LAYER | (layer & 0xFF)) +#define DF(layer) (QK_DEF_LAYER | ((layer) & 0xFF)) // Toggle to layer - 256 layer max -#define TG(layer) (QK_TOGGLE_LAYER | (layer & 0xFF)) +#define TG(layer) (QK_TOGGLE_LAYER | ((layer) & 0xFF)) // One-shot layer - 256 layer max -#define OSL(layer) (QK_ONE_SHOT_LAYER | (layer & 0xFF)) +#define OSL(layer) (QK_ONE_SHOT_LAYER | ((layer) & 0xFF)) // L-ayer M-od: Momentary switch layer with modifiers active - 16 layer max, left mods only -#define LM(layer, mod) (QK_LAYER_MOD | ((layer & 0xF) << 4) | ((mod) & 0xF)) +#define LM(layer, mod) (QK_LAYER_MOD | (((layer) & 0xF) << 4) | ((mod) & 0xF)) // One-shot mod #define OSM(mod) (QK_ONE_SHOT_MOD | ((mod) & 0xFF)) // Layer tap-toggle -#define TT(layer) (QK_LAYER_TAP_TOGGLE | (layer & 0xFF)) +#define TT(layer) (QK_LAYER_TAP_TOGGLE | ((layer) & 0xFF)) // M-od, T-ap - 256 keycode max #define MT(mod, kc) (QK_MOD_TAP | (((mod) & 0x1F) << 8) | ((kc) & 0xFF)) -- cgit v1.2.3 From 3bd30085d891ee28aa1a26babd0de2d26a9e59be Mon Sep 17 00:00:00 2001 From: fauxpark Date: Wed, 9 Jan 2019 11:22:09 +1100 Subject: Tidy up Mod-Tap shortcuts (#4806) --- quantum/quantum_keycodes.h | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) (limited to 'quantum') diff --git a/quantum/quantum_keycodes.h b/quantum/quantum_keycodes.h index 583ba82646..9f9d35b1c0 100644 --- a/quantum/quantum_keycodes.h +++ b/quantum/quantum_keycodes.h @@ -640,38 +640,39 @@ enum quantum_keycodes { // M-od, T-ap - 256 keycode max #define MT(mod, kc) (QK_MOD_TAP | (((mod) & 0x1F) << 8) | ((kc) & 0xFF)) -#define CTL_T(kc) MT(MOD_LCTL, kc) #define LCTL_T(kc) MT(MOD_LCTL, kc) #define RCTL_T(kc) MT(MOD_RCTL, kc) +#define CTL_T(kc) LCTL_T(kc) -#define SFT_T(kc) MT(MOD_LSFT, kc) #define LSFT_T(kc) MT(MOD_LSFT, kc) #define RSFT_T(kc) MT(MOD_RSFT, kc) +#define SFT_T(kc) LSFT_T(kc) -#define ALT_T(kc) MT(MOD_LALT, kc) #define LALT_T(kc) MT(MOD_LALT, kc) #define RALT_T(kc) MT(MOD_RALT, kc) +#define ALT_T(kc) LALT_T(kc) #define ALGR_T(kc) RALT_T(kc) -#define GUI_T(kc) MT(MOD_LGUI, kc) -#define CMD_T(kc) GUI_T(kc) -#define WIN_T(kc) GUI_T(kc) #define LGUI_T(kc) MT(MOD_LGUI, kc) +#define RGUI_T(kc) MT(MOD_RGUI, kc) #define LCMD_T(kc) LGUI_T(kc) #define LWIN_T(kc) LGUI_T(kc) -#define RGUI_T(kc) MT(MOD_RGUI, kc) #define RCMD_T(kc) RGUI_T(kc) #define RWIN_T(kc) RGUI_T(kc) - -#define C_S_T(kc) MT(MOD_LCTL | MOD_LSFT, kc) // Control + Shift e.g. for gnome-terminal -#define MEH_T(kc) MT(MOD_LCTL | MOD_LSFT | MOD_LALT, kc) // Meh is a less hyper version of the Hyper key -- doesn't include Win or Cmd, so just alt+shift+ctrl -#define LCAG_T(kc) MT(MOD_LCTL | MOD_LALT | MOD_LGUI, kc) // Left control alt and gui -#define RCAG_T(kc) MT(MOD_RCTL | MOD_RALT | MOD_RGUI, kc) // Right control alt and gui -#define ALL_T(kc) MT(MOD_LCTL | MOD_LSFT | MOD_LALT | MOD_LGUI, kc) // see http://brettterpstra.com/2012/12/08/a-useful-caps-lock-key/ -#define SGUI_T(kc) MT(MOD_LGUI | MOD_LSFT, kc) +#define GUI_T(kc) LGUI_T(kc) +#define CMD_T(kc) LCMD_T(kc) +#define WIN_T(kc) LWIN_T(kc) + +#define C_S_T(kc) MT(MOD_LCTL | MOD_LSFT, kc) // Left Control + Shift e.g. for gnome-terminal +#define MEH_T(kc) MT(MOD_LCTL | MOD_LSFT | MOD_LALT, kc) // Meh is a less hyper version of the Hyper key -- doesn't include GUI, so just Left Control + Shift + Alt +#define LCAG_T(kc) MT(MOD_LCTL | MOD_LALT | MOD_LGUI, kc) // Left Control + Alt + GUI +#define RCAG_T(kc) MT(MOD_RCTL | MOD_RALT | MOD_RGUI, kc) // Right Control + Alt + GUI +#define HYPR_T(kc) MT(MOD_LCTL | MOD_LSFT | MOD_LALT | MOD_LGUI, kc) // see http://brettterpstra.com/2012/12/08/a-useful-caps-lock-key/ +#define SGUI_T(kc) MT(MOD_LGUI | MOD_LSFT, kc) // Left Shift + GUI #define SCMD_T(kc) SGUI_T(kc) #define SWIN_T(kc) SGUI_T(kc) -#define LCA_T(kc) MT(MOD_LCTL | MOD_LALT, kc) // Left control and left alt +#define LCA_T(kc) MT(MOD_LCTL | MOD_LALT, kc) // Left Control + Alt +#define ALL_T(kc) HYPR_T(kc) // Dedicated keycode versions for Hyper and Meh, if you want to use them as standalone keys rather than mod-tap #define KC_HYPR HYPR(KC_NO) -- cgit v1.2.3 From 3cf179be61a10860b2b66aecf2ec5ca6f0e30605 Mon Sep 17 00:00:00 2001 From: Jack Humbert Date: Thu, 10 Jan 2019 11:22:57 -0500 Subject: Adds Proton C Conversion (#4661) * adds proton c base * fixes custom matrix include * adds readme.md * initial proton coversion, no pin mapping * start of mcu selection * add pin mapping and sweet16 test * add at90 to list * disable backlight, fix d7 * update flag names * doc updates * proton c update for mcu selection --- quantum/config_common.h | 40 ++++ quantum/mcu_selection.mk | 70 +++++++ quantum/stm32/chconf.h | 520 ++++++++++++++++++++++++++++++++++++++++++++++ quantum/stm32/halconf.h | 388 ++++++++++++++++++++++++++++++++++ quantum/stm32/mcuconf.h | 257 +++++++++++++++++++++++ quantum/stm32/proton_c.mk | 44 ++++ 6 files changed, 1319 insertions(+) create mode 100644 quantum/mcu_selection.mk create mode 100644 quantum/stm32/chconf.h create mode 100644 quantum/stm32/halconf.h create mode 100644 quantum/stm32/mcuconf.h create mode 100644 quantum/stm32/proton_c.mk (limited to 'quantum') diff --git a/quantum/config_common.h b/quantum/config_common.h index cbff372eaf..606cd9381a 100644 --- a/quantum/config_common.h +++ b/quantum/config_common.h @@ -125,6 +125,45 @@ #endif #elif defined(PROTOCOL_CHIBIOS) + // Defines mapping for Proton C replacement + #ifdef CONVERT_TO_PROTON_C + // Left side (front) + #define D3 PAL_LINE(GPIOA, 9) + #define D2 PAL_LINE(GPIOA, 10) + // GND + // GND + #define D1 PAL_LINE(GPIOB, 7) + #define D0 PAL_LINE(GPIOB, 6) + #define D4 PAL_LINE(GPIOB, 5) + #define C6 PAL_LINE(GPIOB, 4) + #define D7 PAL_LINE(GPIOB, 3) + #define E6 PAL_LINE(GPIOB, 2) + #define B4 PAL_LINE(GPIOB, 1) + #define B5 PAL_LINE(GPIOB, 0) + + // Right side (front) + // RAW + // GND + // RESET + // VCC + #define F4 PAL_LINE(GPIOA, 2) + #define F5 PAL_LINE(GPIOA, 1) + #define F6 PAL_LINE(GPIOA, 0) + #define F7 PAL_LINE(GPIOB, 8) + #define B1 PAL_LINE(GPIOB, 13) + #define B3 PAL_LINE(GPIOB, 14) + #define B2 PAL_LINE(GPIOB, 15) + #define B6 PAL_LINE(GPIOB, 9) + + // LEDs (only D5/C13 uses an actual LED) + #ifdef CONVERT_TO_PROTON_C_RXLED + #define D5 PAL_LINE(GPIOC, 13) + #define B0 PAL_LINE(GPIOC, 13) + #else + #define D5 PAL_LINE(GPIOC, 13) + #define B0 PAL_LINE(GPIOC, 14) + #endif + #else #define A0 PAL_LINE(GPIOA, 0) #define A1 PAL_LINE(GPIOA, 1) #define A2 PAL_LINE(GPIOA, 2) @@ -221,6 +260,7 @@ #define F13 PAL_LINE(GPIOF, 13) #define F14 PAL_LINE(GPIOF, 14) #define F15 PAL_LINE(GPIOF, 15) + #endif #endif /* USART configuration */ diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk new file mode 100644 index 0000000000..209b578ea5 --- /dev/null +++ b/quantum/mcu_selection.mk @@ -0,0 +1,70 @@ + +ifneq ($(findstring STM32F303, $(MCU)),) + ## chip/board settings + # - the next two should match the directories in + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + MCU_FAMILY ?= STM32 + MCU_SERIES ?= STM32F3xx + + # Linker script to use + # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ + # or /ld/ + MCU_LDSCRIPT ?= STM32F303xC + + # Startup code to use + # - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ + MCU_STARTUP ?= stm32f3xx + + # Board: it should exist either in /os/hal/boards/ + # or /boards + BOARD ?= GENERIC_STM32_F303XC + + # Cortex version + MCU = cortex-m4 + + # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 + ARMV ?= 7 + + USE_FPU = yes + + # Vector table for application + # 0x00000000-0x00001000 area is occupied by bootlaoder.*/ + # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB + # OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 0483:df11 -a 0 -s 0x08000000:leave +endif + +ifneq (,$(filter $(MCU),atmega32u4 at90usb1286)) + # Processor frequency. + # This will define a symbol, F_CPU, in all source code files equal to the + # processor frequency in Hz. You can then use this symbol in your source code to + # calculate timings. Do NOT tack on a 'UL' at the end, this will be done + # automatically to create a 32-bit value in your source code. + # + # This will be an integer division of F_USB below, as it is sourced by + # F_USB after it has run through any CPU prescalers. Note that this value + # does not *change* the processor frequency - it should merely be updated to + # reflect the processor speed set externally so that the code can use accurate + # software delays. + F_CPU ?= 16000000 + + # LUFA specific + # + # Target architecture (see library "Board Types" documentation). + ARCH ?= AVR8 + + # Input clock frequency. + # This will define a symbol, F_USB, in all source code files equal to the + # input clock frequency (before any prescaling is performed) in Hz. This value may + # differ from F_CPU if prescaling is used on the latter, and is required as the + # raw input clock is fed directly to the PLL sections of the AVR for high speed + # clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL' + # at the end, this will be done automatically to create a 32-bit value in your + # source code. + # + # If no clock division is performed on the input clock inside the AVR (via the + # CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU. + F_USB ?= $(F_CPU) +endif diff --git a/quantum/stm32/chconf.h b/quantum/stm32/chconf.h new file mode 100644 index 0000000000..1d9f12ff1f --- /dev/null +++ b/quantum/stm32/chconf.h @@ -0,0 +1,520 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 32 + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#define CH_CFG_ST_FREQUENCY 100000 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#define CH_CFG_TIME_QUANTUM 0 + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#define CH_CFG_NO_IDLE_THREAD FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#define CH_CFG_OPTIMIZE_SPEED TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_TM TRUE + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_REGISTRY TRUE + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_WAITEXIT TRUE + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MUTEXES TRUE + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_CONDVARS TRUE + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MESSAGES TRUE + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#define CH_CFG_USE_MESSAGES_PRIORITY TRUE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#define CH_CFG_USE_DYNAMIC TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK FALSE + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS FALSE + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS FALSE + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_BUFFER_SIZE 128 + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#define CH_DBG_ENABLE_STACK_CHECK TRUE + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_FILL_THREADS FALSE + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#define CH_DBG_THREADS_PROFILING FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/quantum/stm32/halconf.h b/quantum/stm32/halconf.h new file mode 100644 index 0000000000..8fe8e0c6f5 --- /dev/null +++ b/quantum/stm32/halconf.h @@ -0,0 +1,388 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 1 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/quantum/stm32/mcuconf.h b/quantum/stm32/mcuconf.h new file mode 100644 index 0000000000..7c3c6e570c --- /dev/null +++ b/quantum/stm32/mcuconf.h @@ -0,0 +1,257 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F3xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F3xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +#undef STM32_HSE_BYPASS +// #error "oh no" +// #endif + +/* + * ADC driver system settings. + */ +#define STM32_ADC_DUAL_MODE FALSE +#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_USE_ADC4 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_ADC4_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 TRUE +#define STM32_DAC_USE_DAC1_CH2 TRUE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 TRUE +#define STM32_GPT_USE_TIM7 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_USE_DMA TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/quantum/stm32/proton_c.mk b/quantum/stm32/proton_c.mk new file mode 100644 index 0000000000..a0fa013736 --- /dev/null +++ b/quantum/stm32/proton_c.mk @@ -0,0 +1,44 @@ +# Proton C MCU settings for converting AVR projects + +# These are defaults based on what has been implemented for ARM boards +AUDIO_ENABLE = yes +RGBLIGHT_ENABLE = no +BACKLIGHT_ENABLE = no + +# The rest of these settings shouldn't change + +## chip/board settings +# - the next two should match the directories in +# /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) +MCU_FAMILY = STM32 +MCU_SERIES = STM32F3xx + +# Linker script to use +# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ +# or /ld/ +MCU_LDSCRIPT = STM32F303xC + +# Startup code to use +# - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ +MCU_STARTUP = stm32f3xx + +# Board: it should exist either in /os/hal/boards/ +# or /boards +BOARD = GENERIC_STM32_F303XC + +# Cortex version +MCU = cortex-m4 + +# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 +ARMV = 7 + +USE_FPU = yes + +# Vector table for application +# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ +# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB +# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 +OPT_DEFS = + +# Options to pass to dfu-util when flashing +DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -- cgit v1.2.3 From 246c3e4ef434d95dd1ac58fd390893cd0a460328 Mon Sep 17 00:00:00 2001 From: Jeremy Bernhardt Date: Sun, 13 Jan 2019 10:50:23 -0600 Subject: Changed rest note (#4837) * Changed rest term * Update quantum/audio/musical_notes.h Co-Authored-By: germ --- quantum/audio/musical_notes.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'quantum') diff --git a/quantum/audio/musical_notes.h b/quantum/audio/musical_notes.h index 065608ccce..ce8d47d1c1 100644 --- a/quantum/audio/musical_notes.h +++ b/quantum/audio/musical_notes.h @@ -61,7 +61,11 @@ // Notes - # = Octave +#ifdef __arm__ +#define NOTE_REST 1.00f +#else #define NOTE_REST 0.00f +#endif /* These notes are currently bugged #define NOTE_C0 16.35f -- cgit v1.2.3 From 28929ad0174bdcb38e09f6d272a23b9be6aa430c Mon Sep 17 00:00:00 2001 From: James Churchill Date: Fri, 18 Jan 2019 04:08:14 +1000 Subject: Simplify split_common Code significantly (#4772) * Eliminate separate slave loop Both master and slave run the standard keyboard_task main loop now. * Refactor i2c/serial specific code Simplify some of the preprocessor mess by using common function names. * Fix missing #endif * Move direct pin mapping support from miniaxe to split_common For boards with more pins than sense--sorry, switches. * Reordering and reformatting only * Don't run matrix_scan_quantum on slave side * Clean up the offset/slaveOffset calculations * Cut undebounced matrix size in half * Refactor debouncing * Minor fixups * Split split_common transport and debounce code into their own files Can now be replaced with custom versions per keyboard using CUSTOM_TRANSPORT = yes and CUSTOM_DEBOUNCE = yes * Refactor debounce for non-split keyboards too * Update handwired/xealous to build using new split_common * Fix debounce breaking basic test * Dodgy method to allow a split kb to only include one of i2c/serial SPLIT_TRANSPORT = serial or SPLIT_TRANSPORT = i2c will include only that driver code in the binary. SPLIT_TRANSPORT = custom (or anything else) will include neither, the keyboard must supply it's own code if SPLIT_TRANSPORT is not defined then the original behaviour (include both avr i2c and serial code) is maintained. This could be better but it would require explicitly updating all the existing split keyboards. * Enable LTO to get lets_split/sockets under the line * Add docs for SPLIT_TRANSPORT, CUSTOM_MATRIX, CUSTOM_DEBOUNCE * Remove avr-specific sei() from split matrix_setup Not needed now that slave doesn't have a separate main loop. Both sides (on avr) call sei() in lufa's main() after exiting keyboard_setup(). * Fix QUANTUM_LIB_SRC references and simplify SPLIT_TRANSPORT. * Add comments and fix formatting. --- quantum/config_common.h | 3 + quantum/debounce.c | 52 +++ quantum/debounce.h | 11 + quantum/matrix.c | 79 ++--- quantum/split_common/i2c.h | 5 +- q