From d7173967087e022d20d1f9c812b1b668e9d3f71b Mon Sep 17 00:00:00 2001
From: Stefan Kerkmann <karlk90@pm.me>
Date: Thu, 30 Jun 2022 13:19:27 +0200
Subject: [Core] Add Raspberry Pi RP2040 support (#14877)

* Disable RESET keycode because of naming conflicts

* Add Pico SDK as submodule

* Add RP2040 build support to QMK

* Adjust USB endpoint structs for RP2040

* Add RP2040 bootloader and double-tap reset routine

* Add generic and pro micro RP2040 boards

* Add RP2040 onekey keyboard

* Add WS2812 PIO DMA enabled driver and documentation

Supports regular and open-drain output configuration. RP2040 GPIOs are
sadly not 5V tolerant, so this is a bit use-less or needs extra hardware
or you take the risk to fry your hardware.

* Adjust SIO Driver for RP2040

* Adjust I2C Driver for RP2040

* Adjust SPI Driver for RP2040

* Add PIO serial driver and documentation

* Add general RP2040 documentation

* Apply suggestions from code review

Co-authored-by: Nick Brassel <nick@tzarc.org>

Co-authored-by: Nick Brassel <nick@tzarc.org>
---
 platforms/chibios/vendors/RP/RP2040.mk            | 285 ++++++++++++++++++++++
 platforms/chibios/vendors/RP/_pin_defs.h          |  37 +++
 platforms/chibios/vendors/RP/pico_sdk_shims.c     |   9 +
 platforms/chibios/vendors/RP/stage2_bootloaders.c | 174 +++++++++++++
 4 files changed, 505 insertions(+)
 create mode 100644 platforms/chibios/vendors/RP/RP2040.mk
 create mode 100644 platforms/chibios/vendors/RP/_pin_defs.h
 create mode 100644 platforms/chibios/vendors/RP/pico_sdk_shims.c
 create mode 100644 platforms/chibios/vendors/RP/stage2_bootloaders.c

(limited to 'platforms/chibios/vendors')

diff --git a/platforms/chibios/vendors/RP/RP2040.mk b/platforms/chibios/vendors/RP/RP2040.mk
new file mode 100644
index 0000000000..1aa925cb15
--- /dev/null
+++ b/platforms/chibios/vendors/RP/RP2040.mk
@@ -0,0 +1,285 @@
+#
+# Raspberry Pi RP2040 specific drivers
+##############################################################################
+COMMON_VPATH += $(PLATFORM_PATH)/$(PLATFORM_KEY)/$(DRIVER_DIR)/vendor/$(MCU_FAMILY)/$(MCU_SERIES)
+
+ifeq ($(strip $(WS2812_DRIVER)), vendor)
+    OPT_DEFS += -DRP_DMA_REQUIRED=TRUE
+endif
+
+#
+# Raspberry Pi Pico SDK Support
+##############################################################################
+ADEFS  += -DCRT0_VTOR_INIT=1 \
+		  -DCRT0_EXTRA_CORES_NUMBER=0
+
+CFLAGS += -DPICO_NO_FPGA_CHECK \
+          -DNDEBUG
+
+#
+# Pico SDK source and header files needed by QMK and ChibiOS
+##############################################################################
+PICOSDKROOT   := $(TOP_DIR)/lib/pico-sdk
+
+PICOSDKSRC     = $(PICOSDKROOT)/src/rp2_common/hardware_clocks/clocks.c \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_pll/pll.c \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_pio/pio.c \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_gpio/gpio.c \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_claim/claim.c \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_watchdog/watchdog.c \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_xosc/xosc.c \
+                 $(PICOSDKROOT)/src/rp2_common/pico_bootrom/bootrom.c
+
+PICOSDKINC     = $(CHIBIOS)//os/various/pico_bindings/dumb/include \
+                 $(PICOSDKROOT)/src/common/pico_base/include \
+                 $(PICOSDKROOT)/src/rp2_common/pico_platform/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_base/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_clocks/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_claim/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_gpio/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_irq/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_pll/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_pio/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_sync/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_resets/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_watchdog/include \
+                 $(PICOSDKROOT)/src/rp2_common/hardware_xosc/include \
+                 $(PICOSDKROOT)/src/rp2040/hardware_regs/include \
+                 $(PICOSDKROOT)/src/rp2040/hardware_structs/include \
+                 $(PICOSDKROOT)/src/boards/include \
+                 $(PICOSDKROOT)/src/rp2_common/pico_bootrom/include
+
+PLATFORM_SRC += $(PICOSDKSRC)
+EXTRAINCDIRS += $(PICOSDKINC)
+
+PLATFORM_RP2040_PATH := $(PLATFORM_PATH)/$(PLATFORM_KEY)/vendors/$(MCU_FAMILY)
+
+PLATFORM_SRC +=	$(PLATFORM_RP2040_PATH)/stage2_bootloaders.c \
+				$(PLATFORM_RP2040_PATH)/pico_sdk_shims.c
+
+EXTRAINCDIRS += $(PLATFORM_RP2040_PATH)
+
+#
+# RP2040 optimized compiler intrinsics
+##############################################################################
+
+# Enables optimized Compiler intrinsics which are located in the RP2040
+# bootrom. This needs startup code and linker script support from ChibiOS,
+# which is WIP. Therefore disabled by default for now.
+RP2040_INTRINSICS_ENABLED ?= no
+ifeq ($(strip $(RP2040_INTRINSICS_ENABLED)), yes)
+    PICOSDKINTRINSICSSRC =  $(PICOSDKROOT)/src/rp2_common/pico_float/float_aeabi.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_float/float_math.c \
+                            $(PICOSDKROOT)/src/rp2_common/pico_float/float_init_rom.c \
+                            $(PICOSDKROOT)/src/rp2_common/pico_float/float_v1_rom_shim.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_double/double_aeabi.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_double/double_math.c \
+                            $(PICOSDKROOT)/src/rp2_common/pico_double/double_init_rom.c \
+                            $(PICOSDKROOT)/src/rp2_common/pico_double/double_v1_rom_shim.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_divider/divider.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_int64_ops/pico_int64_ops_aeabi.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_mem_ops/mem_ops_aeabi.S \
+                            $(PICOSDKROOT)/src/rp2_common/pico_malloc/pico_malloc.c \
+                            $(PICOSDKROOT)/src/rp2_common/pico_bit_ops/bit_ops_aeabi.S
+
+    PICOSDKINTRINSICSINC =  $(PICOSDKROOT)/src/common/pico_base/include \
+                            $(PICOSDKROOT)/src/rp2_common/pico_platfrom/include \
+                            $(PICOSDKROOT)/src/rp2_common/pico_bootrom/include \
+                            $(PICOSDKROOT)/src/rp2_common/hardware_divider/include \
+                            $(PICOSDKROOT)/src/rp2_common/pico_float/include \
+                            $(PICOSDKROOT)/src/rp2_common/pico_double/include \
+                            $(PICOSDKROOT)/src/rp2_common/pico_malloc/include
+
+    OPT_DEFS += -DPICO_FLOAT_SUPPORT_ROM_V1=0 -DPICO_DOUBLE_SUPPORT_ROM_V1=0
+
+    CFLAGS += -Wl,--defsym=__StackLimit=__heap_end__
+    CFLAGS += -Wl,--defsym=__unhandled_user_irq=_unhandled_exception
+    CFLAGS += -Wl,--build-id=none
+
+    # single precision floating point intrinsics
+    OPT_DEFS += -DPICO_FLOAT_IN_RAM=1
+    OPT_DEFS += -DPICO_FLOAT_PROPAGATE_NANS=0
+
+    CFLAGS += -Wl,--wrap=__aeabi_fdiv
+    CFLAGS += -Wl,--wrap=__aeabi_fmul
+    CFLAGS += -Wl,--wrap=__aeabi_frsub
+    CFLAGS += -Wl,--wrap=__aeabi_fsub
+    CFLAGS += -Wl,--wrap=__aeabi_cfcmpeq
+    CFLAGS += -Wl,--wrap=__aeabi_cfrcmple
+    CFLAGS += -Wl,--wrap=__aeabi_cfcmple
+    CFLAGS += -Wl,--wrap=__aeabi_fcmpeq
+    CFLAGS += -Wl,--wrap=__aeabi_fcmplt
+    CFLAGS += -Wl,--wrap=__aeabi_fcmple
+    CFLAGS += -Wl,--wrap=__aeabi_fcmpge
+    CFLAGS += -Wl,--wrap=__aeabi_fcmpgt
+    CFLAGS += -Wl,--wrap=__aeabi_fcmpun
+    CFLAGS += -Wl,--wrap=__aeabi_i2f
+    CFLAGS += -Wl,--wrap=__aeabi_l2f
+    CFLAGS += -Wl,--wrap=__aeabi_ui2f
+    CFLAGS += -Wl,--wrap=__aeabi_ul2f
+    CFLAGS += -Wl,--wrap=__aeabi_i2f
+    CFLAGS += -Wl,--wrap=__aeabi_f2iz
+    CFLAGS += -Wl,--wrap=__aeabi_f2lz
+    CFLAGS += -Wl,--wrap=__aeabi_f2uiz
+    CFLAGS += -Wl,--wrap=__aeabi_f2ulz
+    CFLAGS += -Wl,--wrap=__aeabi_f2d
+    CFLAGS += -Wl,--wrap=sqrtf
+    CFLAGS += -Wl,--wrap=cosf
+    CFLAGS += -Wl,--wrap=sinf
+    CFLAGS += -Wl,--wrap=tanf
+    CFLAGS += -Wl,--wrap=atan2f
+    CFLAGS += -Wl,--wrap=expf
+    CFLAGS += -Wl,--wrap=logf
+    CFLAGS += -Wl,--wrap=ldexpf
+    CFLAGS += -Wl,--wrap=copysignf
+    CFLAGS += -Wl,--wrap=truncf
+    CFLAGS += -Wl,--wrap=floorf
+    CFLAGS += -Wl,--wrap=ceilf
+    CFLAGS += -Wl,--wrap=roundf
+    CFLAGS += -Wl,--wrap=sincosf
+    CFLAGS += -Wl,--wrap=asinf
+    CFLAGS += -Wl,--wrap=acosf
+    CFLAGS += -Wl,--wrap=atanf
+    CFLAGS += -Wl,--wrap=sinhf
+    CFLAGS += -Wl,--wrap=coshf
+    CFLAGS += -Wl,--wrap=tanhf
+    CFLAGS += -Wl,--wrap=asinhf
+    CFLAGS += -Wl,--wrap=acoshf
+    CFLAGS += -Wl,--wrap=atanhf
+    CFLAGS += -Wl,--wrap=exp2f
+    CFLAGS += -Wl,--wrap=log2f
+    CFLAGS += -Wl,--wrap=exp10f
+    CFLAGS += -Wl,--wrap=log10f
+    CFLAGS += -Wl,--wrap=powf
+    CFLAGS += -Wl,--wrap=powintf
+    CFLAGS += -Wl,--wrap=hypotf
+    CFLAGS += -Wl,--wrap=cbrtf
+    CFLAGS += -Wl,--wrap=fmodf
+    CFLAGS += -Wl,--wrap=dremf
+    CFLAGS += -Wl,--wrap=remainderf
+    CFLAGS += -Wl,--wrap=remquof
+    CFLAGS += -Wl,--wrap=expm1f
+    CFLAGS += -Wl,--wrap=log1pf
+    CFLAGS += -Wl,--wrap=fmaf
+
+    # double precision floating point intrinsics
+    OPT_DEFS += -DPICO_DOUBLE_IN_RAM=1
+    OPT_DEFS += -DPICO_DOUBLE_PROPAGATE_NANS=0
+
+    CFLAGS += -Wl,--wrap=__aeabi_dadd
+    CFLAGS += -Wl,--wrap=__aeabi_ddiv
+    CFLAGS += -Wl,--wrap=__aeabi_dmul
+    CFLAGS += -Wl,--wrap=__aeabi_drsub
+    CFLAGS += -Wl,--wrap=__aeabi_dsub
+    CFLAGS += -Wl,--wrap=__aeabi_cdcmpeq
+    CFLAGS += -Wl,--wrap=__aeabi_cdrcmple
+    CFLAGS += -Wl,--wrap=__aeabi_cdcmple
+    CFLAGS += -Wl,--wrap=__aeabi_dcmpeq
+    CFLAGS += -Wl,--wrap=__aeabi_dcmplt
+    CFLAGS += -Wl,--wrap=__aeabi_dcmple
+    CFLAGS += -Wl,--wrap=__aeabi_dcmpge
+    CFLAGS += -Wl,--wrap=__aeabi_dcmpgt
+    CFLAGS += -Wl,--wrap=__aeabi_dcmpun
+    CFLAGS += -Wl,--wrap=__aeabi_i2d
+    CFLAGS += -Wl,--wrap=__aeabi_l2d
+    CFLAGS += -Wl,--wrap=__aeabi_ui2d
+    CFLAGS += -Wl,--wrap=__aeabi_ul2d
+    CFLAGS += -Wl,--wrap=__aeabi_d2iz
+    CFLAGS += -Wl,--wrap=__aeabi_d2lz
+    CFLAGS += -Wl,--wrap=__aeabi_d2uiz
+    CFLAGS += -Wl,--wrap=__aeabi_d2ulz
+    CFLAGS += -Wl,--wrap=__aeabi_d2f
+    CFLAGS += -Wl,--wrap=sqrt
+    CFLAGS += -Wl,--wrap=cos
+    CFLAGS += -Wl,--wrap=sin
+    CFLAGS += -Wl,--wrap=tan
+    CFLAGS += -Wl,--wrap=atan2
+    CFLAGS += -Wl,--wrap=exp
+    CFLAGS += -Wl,--wrap=log
+    CFLAGS += -Wl,--wrap=ldexp
+    CFLAGS += -Wl,--wrap=copysign
+    CFLAGS += -Wl,--wrap=trunc
+    CFLAGS += -Wl,--wrap=floor
+    CFLAGS += -Wl,--wrap=ceil
+    CFLAGS += -Wl,--wrap=round
+    CFLAGS += -Wl,--wrap=sincos
+    CFLAGS += -Wl,--wrap=asin
+    CFLAGS += -Wl,--wrap=acos
+    CFLAGS += -Wl,--wrap=atan
+    CFLAGS += -Wl,--wrap=sinh
+    CFLAGS += -Wl,--wrap=cosh
+    CFLAGS += -Wl,--wrap=tanh
+    CFLAGS += -Wl,--wrap=asinh
+    CFLAGS += -Wl,--wrap=acosh
+    CFLAGS += -Wl,--wrap=atanh
+    CFLAGS += -Wl,--wrap=exp2
+    CFLAGS += -Wl,--wrap=log2
+    CFLAGS += -Wl,--wrap=exp10
+    CFLAGS += -Wl,--wrap=log10
+    CFLAGS += -Wl,--wrap=pow
+    CFLAGS += -Wl,--wrap=powint
+    CFLAGS += -Wl,--wrap=hypot
+    CFLAGS += -Wl,--wrap=cbrt
+    CFLAGS += -Wl,--wrap=fmod
+    CFLAGS += -Wl,--wrap=drem
+    CFLAGS += -Wl,--wrap=remainder
+    CFLAGS += -Wl,--wrap=remquo
+    CFLAGS += -Wl,--wrap=expm1
+    CFLAGS += -Wl,--wrap=log1p
+    CFLAGS += -Wl,--wrap=fma
+
+    # bit operation intrinsics
+    OPT_DEFS += -DPICO_BITS_IN_RAM=1
+
+    CFLAGS += -Wl,--wrap=__clzsi2
+    CFLAGS += -Wl,--wrap=__clzsi2
+    CFLAGS += -Wl,--wrap=__clzdi2
+    CFLAGS += -Wl,--wrap=__ctzsi2
+    CFLAGS += -Wl,--wrap=__ctzdi2
+    CFLAGS += -Wl,--wrap=__popcountsi2
+    CFLAGS += -Wl,--wrap=__popcountdi2
+    CFLAGS += -Wl,--wrap=__clz
+    CFLAGS += -Wl,--wrap=__clzl
+    CFLAGS += -Wl,--wrap=__clzsi2
+    CFLAGS += -Wl,--wrap=__clzll
+
+    # integer division intrinsics
+    OPT_DEFS += -DPICO_DIVIDER_IN_RAM=1
+    OPT_DEFS += -DPICO_DIVIDER_DISABLE_INTERRUPTS=1
+
+    CFLAGS += -Wl,--wrap=__aeabi_idiv
+    CFLAGS += -Wl,--wrap=__aeabi_idivmod
+    CFLAGS += -Wl,--wrap=__aeabi_ldivmod
+    CFLAGS += -Wl,--wrap=__aeabi_uidiv
+    CFLAGS += -Wl,--wrap=__aeabi_uidivmod
+    CFLAGS += -Wl,--wrap=__aeabi_uldivmod
+
+    # 64bit integer intrinsics
+    OPT_DEFS += -DPICO_INT64_OPS_IN_RAM=1
+
+    CFLAGS += -Wl,--wrap=__aeabi_lmul
+
+    # malloc and friends functions
+    OPT_DEFS += -DPICO_USE_MALLOC_MUTEX=0
+    OPT_DEFS += -DPICO_DEBUG_MALLOC=0
+    OPT_DEFS ?= -DPICO_MALLOC_PANIC=0
+
+    CFLAGS += -Wl,--wrap=malloc
+    CFLAGS += -Wl,--wrap=calloc
+    CFLAGS += -Wl,--wrap=free
+
+    # memory operation intrinsics
+    OPT_DEFS += -DPICO_MEM_IN_RAM=1
+
+    CFLAGS += -Wl,--wrap=memcpy
+    CFLAGS += -Wl,--wrap=memset
+    CFLAGS += -Wl,--wrap=__aeabi_memcpy
+    CFLAGS += -Wl,--wrap=__aeabi_memset
+    CFLAGS += -Wl,--wrap=__aeabi_memcpy4
+    CFLAGS += -Wl,--wrap=__aeabi_memset4
+    CFLAGS += -Wl,--wrap=__aeabi_memcpy8
+    CFLAGS += -Wl,--wrap=__aeabi_memset8
+
+    PLATFORM_SRC += $(PICOSDKINTRINSICSSRC)
+    EXTRAINCDIRS += $(PICOSDKINTRINSICSINC)
+endif
diff --git a/platforms/chibios/vendors/RP/_pin_defs.h b/platforms/chibios/vendors/RP/_pin_defs.h
new file mode 100644
index 0000000000..4241845369
--- /dev/null
+++ b/platforms/chibios/vendors/RP/_pin_defs.h
@@ -0,0 +1,37 @@
+// Copyright 2022 Stefan Kerkmann
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#pragma once
+
+/* RP2040 GPIO Numbering */
+#define GP0 0U
+#define GP1 1U
+#define GP2 2U
+#define GP3 3U
+#define GP4 4U
+#define GP5 5U
+#define GP6 6U
+#define GP7 7U
+#define GP8 8U
+#define GP9 9U
+#define GP10 10U
+#define GP11 11U
+#define GP12 12U
+#define GP13 13U
+#define GP14 14U
+#define GP15 15U
+#define GP16 16U
+#define GP17 17U
+#define GP18 18U
+#define GP19 19U
+#define GP20 20U
+#define GP21 21U
+#define GP22 22U
+#define GP23 23U
+#define GP24 24U
+#define GP25 25U
+#define GP26 26U
+#define GP27 27U
+#define GP28 28U
+#define GP29 29U
+#define GP30 30U
diff --git a/platforms/chibios/vendors/RP/pico_sdk_shims.c b/platforms/chibios/vendors/RP/pico_sdk_shims.c
new file mode 100644
index 0000000000..f6e3943928
--- /dev/null
+++ b/platforms/chibios/vendors/RP/pico_sdk_shims.c
@@ -0,0 +1,9 @@
+// Copyright 2022 Stefan Kerkmann
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <stdbool.h>
+#include <ch.h>
+
+void panic(const char *fmt, ...) {
+    chSysHalt(fmt);
+}
diff --git a/platforms/chibios/vendors/RP/stage2_bootloaders.c b/platforms/chibios/vendors/RP/stage2_bootloaders.c
new file mode 100644
index 0000000000..f22112fca9
--- /dev/null
+++ b/platforms/chibios/vendors/RP/stage2_bootloaders.c
@@ -0,0 +1,174 @@
+// ----------------------------------------------------------------------------
+// Pre-compiled second stage boot code for RP2040.
+//
+// Copyright (c) 2019-2021 Raspberry Pi (Trading) Ltd.
+// SPDX-License-Identifier: BSD-3-Clause
+// ----------------------------------------------------------------------------
+
+#include <stdint.h>
+
+#define BOOTLOADER_SECTION __attribute__ ((used, section (".boot2")))
+
+#if defined(RP2040_FLASH_AT25SF128A)
+
+uint8_t BOOTLOADER_SECTION BOOT2_AT25SF128A[256] = {
+  0x00, 0xb5, 0x31, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21,
+  0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2d, 0x4b,
+  0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x01, 0x21, 0xf0, 0x22,
+  0x99, 0x50, 0x2a, 0x49, 0x19, 0x60, 0x01, 0x21, 0x99, 0x60, 0x35, 0x20,
+  0x00, 0xf0, 0x42, 0xf8, 0x02, 0x22, 0x90, 0x42, 0x12, 0xd0, 0x06, 0x21,
+  0x19, 0x66, 0x00, 0xf0, 0x32, 0xf8, 0x19, 0x6e, 0x31, 0x21, 0x19, 0x66,
+  0x1a, 0x66, 0x00, 0xf0, 0x2c, 0xf8, 0x19, 0x6e, 0x19, 0x6e, 0x19, 0x6e,
+  0x05, 0x20, 0x00, 0xf0, 0x2f, 0xf8, 0x01, 0x21, 0x08, 0x42, 0xf9, 0xd1,
+  0x00, 0x21, 0x99, 0x60, 0x1b, 0x49, 0x19, 0x60, 0x00, 0x21, 0x59, 0x60,
+  0x1a, 0x49, 0x1b, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0xeb, 0x21,
+  0x19, 0x66, 0x20, 0x21, 0x19, 0x66, 0x00, 0xf0, 0x12, 0xf8, 0x00, 0x21,
+  0x99, 0x60, 0x16, 0x49, 0x14, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60,
+  0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, 0x00, 0x47, 0x12, 0x48, 0x13, 0x49,
+  0x08, 0x60, 0x03, 0xc8, 0x80, 0xf3, 0x08, 0x88, 0x08, 0x47, 0x03, 0xb5,
+  0x99, 0x6a, 0x04, 0x20, 0x01, 0x42, 0xfb, 0xd0, 0x01, 0x20, 0x01, 0x42,
+  0xf8, 0xd1, 0x03, 0xbd, 0x02, 0xb5, 0x18, 0x66, 0x18, 0x66, 0xff, 0xf7,
+  0xf2, 0xff, 0x18, 0x6e, 0x18, 0x6e, 0x02, 0xbd, 0x00, 0x00, 0x02, 0x40,
+  0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x07, 0x00, 0x00, 0x03, 0x5f, 0x00,
+  0x21, 0x22, 0x00, 0x00, 0xf4, 0x00, 0x00, 0x18, 0x22, 0x20, 0x00, 0x20,
+  0x00, 0x01, 0x00, 0x10, 0x08, 0xed, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0xc0, 0xdd, 0xc0, 0xb5
+};
+
+#elif defined(RP2040_FLASH_GD25Q64CS)
+
+uint8_t BOOTLOADER_SECTION BOOT2_GD25Q64CS[256] = {
+  0x00, 0xb5, 0x31, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21,
+  0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2d, 0x4b,
+  0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x01, 0x21, 0xf0, 0x22,
+  0x99, 0x50, 0x2a, 0x49, 0x19, 0x60, 0x01, 0x21, 0x99, 0x60, 0x35, 0x20,
+  0x00, 0xf0, 0x42, 0xf8, 0x02, 0x22, 0x90, 0x42, 0x12, 0xd0, 0x06, 0x21,
+  0x19, 0x66, 0x00, 0xf0, 0x32, 0xf8, 0x19, 0x6e, 0x31, 0x21, 0x19, 0x66,
+  0x1a, 0x66, 0x00, 0xf0, 0x2c, 0xf8, 0x19, 0x6e, 0x19, 0x6e, 0x19, 0x6e,
+  0x05, 0x20, 0x00, 0xf0, 0x2f, 0xf8, 0x01, 0x21, 0x08, 0x42, 0xf9, 0xd1,
+  0x00, 0x21, 0x99, 0x60, 0x1b, 0x49, 0x19, 0x60, 0x00, 0x21, 0x59, 0x60,
+  0x1a, 0x49, 0x1b, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0xe7, 0x21,
+  0x19, 0x66, 0xa0, 0x21, 0x19, 0x66, 0x00, 0xf0, 0x12, 0xf8, 0x00, 0x21,
+  0x99, 0x60, 0x16, 0x49, 0x14, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60,
+  0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, 0x00, 0x47, 0x12, 0x48, 0x13, 0x49,
+  0x08, 0x60, 0x03, 0xc8, 0x80, 0xf3, 0x08, 0x88, 0x08, 0x47, 0x03, 0xb5,
+  0x99, 0x6a, 0x04, 0x20, 0x01, 0x42, 0xfb, 0xd0, 0x01, 0x20, 0x01, 0x42,
+  0xf8, 0xd1, 0x03, 0xbd, 0x02, 0xb5, 0x18, 0x66, 0x18, 0x66, 0xff, 0xf7,
+  0xf2, 0xff, 0x18, 0x6e, 0x18, 0x6e, 0x02, 0xbd, 0x00, 0x00, 0x02, 0x40,
+  0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x07, 0x00, 0x00, 0x03, 0x5f, 0x00,
+  0x21, 0x12, 0x00, 0x00, 0xf4, 0x00, 0x00, 0x18, 0x22, 0x10, 0x00, 0xa0,
+  0x00, 0x01, 0x00, 0x10, 0x08, 0xed, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0xe2, 0xd9, 0xa2, 0xb5
+};
+
+#elif defined(RP2040_FLASH_W25X10CL)
+
+uint8_t BOOTLOADER_SECTION BOOT2_W25X10CL[256] = {
+  0x00, 0xb5, 0x14, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61,
+  0x12, 0x49, 0x19, 0x60, 0x00, 0x21, 0x59, 0x60, 0x11, 0x49, 0x12, 0x48,
+  0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0xbb, 0x21, 0x19, 0x66, 0x02, 0x21,
+  0x19, 0x66, 0x08, 0x21, 0x98, 0x6a, 0x08, 0x42, 0xfc, 0xd0, 0x00, 0x21,
+  0x99, 0x60, 0x0c, 0x49, 0x0a, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60,
+  0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, 0x00, 0x47, 0x08, 0x48, 0x09, 0x49,
+  0x08, 0x60, 0x03, 0xc8, 0x80, 0xf3, 0x08, 0x88, 0x08, 0x47, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x18, 0x00, 0x03, 0x3f, 0x00, 0x1d, 0x12, 0x00, 0x00,
+  0xf4, 0x00, 0x00, 0x18, 0x1e, 0x10, 0x00, 0x20, 0x00, 0x01, 0x00, 0x10,
+  0x08, 0xed, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x7c, 0x81, 0x53, 0x9a
+};
+
+#elif defined(RP2040_FLASH_IS25LP080)
+
+uint8_t BOOTLOADER_SECTION BOOT2_IS25LP080[256] = {
+  0x00, 0xb5, 0x2b, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61,
+  0x29, 0x49, 0x19, 0x60, 0x01, 0x21, 0x99, 0x60, 0x28, 0x48, 0x00, 0xf0,
+  0x42, 0xf8, 0x28, 0x4a, 0x90, 0x42, 0x12, 0xd0, 0x06, 0x21, 0x19, 0x66,
+  0x00, 0xf0, 0x32, 0xf8, 0x19, 0x6e, 0x01, 0x21, 0x19, 0x66, 0x00, 0x20,
+  0x1a, 0x66, 0x00, 0xf0, 0x2b, 0xf8, 0x19, 0x6e, 0x19, 0x6e, 0x1f, 0x48,
+  0x00, 0xf0, 0x2f, 0xf8, 0x01, 0x21, 0x08, 0x42, 0xf9, 0xd1, 0x00, 0x21,
+  0x99, 0x60, 0x1d, 0x49, 0x19, 0x60, 0x00, 0x21, 0x59, 0x60, 0x1c, 0x49,
+  0x1c, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0xeb, 0x21, 0x19, 0x66,
+  0xa0, 0x21, 0x19, 0x66, 0x00, 0xf0, 0x12, 0xf8, 0x00, 0x21, 0x99, 0x60,
+  0x17, 0x49, 0x16, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0x01, 0xbc,
+  0x00, 0x28, 0x00, 0xd0, 0x00, 0x47, 0x14, 0x48, 0x14, 0x49, 0x08, 0x60,
+  0x03, 0xc8, 0x80, 0xf3, 0x08, 0x88, 0x08, 0x47, 0x03, 0xb5, 0x99, 0x6a,
+  0x04, 0x20, 0x01, 0x42, 0xfb, 0xd0, 0x01, 0x20, 0x01, 0x42, 0xf8, 0xd1,
+  0x03, 0xbd, 0x02, 0xb5, 0x18, 0x66, 0x18, 0x66, 0xff, 0xf7, 0xf2, 0xff,
+  0x18, 0x6e, 0x18, 0x6e, 0x02, 0xbd, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
+  0x00, 0x00, 0x07, 0x00, 0x05, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+  0x00, 0x03, 0x5f, 0x00, 0x21, 0x22, 0x00, 0x00, 0xf4, 0x00, 0x00, 0x18,
+  0x22, 0x20, 0x00, 0xa0, 0x00, 0x01, 0x00, 0x10, 0x08, 0xed, 0x00, 0xe0,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x28, 0x33, 0x43, 0xb2
+};
+
+#elif defined(RP2040_FLASH_GENERIC_03H)
+
+uint8_t BOOTLOADER_SECTION BOOT2_GENERIC_03H[256] = {
+  0x00, 0xb5, 0x0c, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61,
+  0x0a, 0x49, 0x19, 0x60, 0x0a, 0x49, 0x0b, 0x48, 0x01, 0x60, 0x00, 0x21,
+  0x59, 0x60, 0x01, 0x21, 0x99, 0x60, 0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0,
+  0x00, 0x47, 0x07, 0x48, 0x07, 0x49, 0x08, 0x60, 0x03, 0xc8, 0x80, 0xf3,
+  0x08, 0x88, 0x08, 0x47, 0x00, 0x00, 0x00, 0x18, 0x00, 0x03, 0x1f, 0x00,
+  0x18, 0x02, 0x00, 0x03, 0xf4, 0x00, 0x00, 0x18, 0x00, 0x01, 0x00, 0x10,
+  0x08, 0xed, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x2c, 0xec, 0x21, 0x0d
+};
+
+#else
+
+uint8_t BOOTLOADER_SECTION BOOT2_W25Q080[256] = {
+  0x00, 0xb5, 0x32, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21,
+  0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2e, 0x4b,
+  0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x01, 0x21, 0xf0, 0x22,
+  0x99, 0x50, 0x2b, 0x49, 0x19, 0x60, 0x01, 0x21, 0x99, 0x60, 0x35, 0x20,
+  0x00, 0xf0, 0x44, 0xf8, 0x02, 0x22, 0x90, 0x42, 0x14, 0xd0, 0x06, 0x21,
+  0x19, 0x66, 0x00, 0xf0, 0x34, 0xf8, 0x19, 0x6e, 0x01, 0x21, 0x19, 0x66,
+  0x00, 0x20, 0x18, 0x66, 0x1a, 0x66, 0x00, 0xf0, 0x2c, 0xf8, 0x19, 0x6e,
+  0x19, 0x6e, 0x19, 0x6e, 0x05, 0x20, 0x00, 0xf0, 0x2f, 0xf8, 0x01, 0x21,
+  0x08, 0x42, 0xf9, 0xd1, 0x00, 0x21, 0x99, 0x60, 0x1b, 0x49, 0x19, 0x60,
+  0x00, 0x21, 0x59, 0x60, 0x1a, 0x49, 0x1b, 0x48, 0x01, 0x60, 0x01, 0x21,
+  0x99, 0x60, 0xeb, 0x21, 0x19, 0x66, 0xa0, 0x21, 0x19, 0x66, 0x00, 0xf0,
+  0x12, 0xf8, 0x00, 0x21, 0x99, 0x60, 0x16, 0x49, 0x14, 0x48, 0x01, 0x60,
+  0x01, 0x21, 0x99, 0x60, 0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, 0x00, 0x47,
+  0x12, 0x48, 0x13, 0x49, 0x08, 0x60, 0x03, 0xc8, 0x80, 0xf3, 0x08, 0x88,
+  0x08, 0x47, 0x03, 0xb5, 0x99, 0x6a, 0x04, 0x20, 0x01, 0x42, 0xfb, 0xd0,
+  0x01, 0x20, 0x01, 0x42, 0xf8, 0xd1, 0x03, 0xbd, 0x02, 0xb5, 0x18, 0x66,
+  0x18, 0x66, 0xff, 0xf7, 0xf2, 0xff, 0x18, 0x6e, 0x18, 0x6e, 0x02, 0xbd,
+  0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x07, 0x00,
+  0x00, 0x03, 0x5f, 0x00, 0x21, 0x22, 0x00, 0x00, 0xf4, 0x00, 0x00, 0x18,
+  0x22, 0x20, 0x00, 0xa0, 0x00, 0x01, 0x00, 0x10, 0x08, 0xed, 0x00, 0xe0,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x07, 0x0b, 0x8f, 0xd5
+};
+
+#endif
-- 
cgit v1.2.3