From 30680c6eb396a2bb06928afd69edae9908ac84fb Mon Sep 17 00:00:00 2001
From: patrickmt <40182064+patrickmt@users.noreply.github.com>
Date: Wed, 29 Aug 2018 15:07:52 -0400
Subject: Massdrop keyboard support (#3780)
* Massdrop SAMD51
Massdrop SAMD51 keyboards initial project upload
* Removing relocated files
Removing files that were relocated and not deleted from previous location
* LED queue fix and cleaning
Cleaned some white space or comments.
Fix for LED I2C command queue.
Cleaned up interrupts.
Added debug function for printing numbers to scope through m15 line.
* Factory programmed serial usage
Ability to use factory programmed serial in hub and keyboard usb descriptors
* USB serial number and bugfix
Added support for factory programmed serial and usage.
Incorporated bootloader's conditional compiling to align project closer.
Fixed issue when USB device attempted to send before enabled.
General white space and comment cleanup.
* Project cleanup
Cleaned up project in terms of white space, commented code, and unecessary files.
NKRO keyboard is now using correct setreport although KBD was fine to use.
Fixed broken linkage to __xprintf for serial debug statements.
* Fix for extra keys
Fixed possible USB hang on extra keys report set missing
* I2C cleanup
I2C cleanup and file renames necessary for master branch merge
* Boot tracing and clocks cleanup
Added optional boot debug trace mode through debug LED codes.
General clock code cleanup.
* Relocate ARM/Atmel headers
Moved ARM/Atmel header folder from drivers to lib and made necessary makefile changes.
* Pull request changes
Pull request changes
* Keymap and compile flag fix
Keymap fix for momentary layer.
Potential compile flag fix for Travis CI failure.
* va_list include fix
Fix for va_list compile failure
* Include file case fixes
Fixes for include files with incorrect case
* ctrl and alt67 keyboard readme
Added ctrl and alt67 keyboard readme files
---
.../packs/arm/cmsis/5.0.1/CMSIS/Include/arm_math.h | 7226 ++++++++++++++++++++
.../arm/cmsis/5.0.1/CMSIS/Include/cmsis_compiler.h | 223 +
.../arm/cmsis/5.0.1/CMSIS/Include/cmsis_gcc.h | 1899 +++++
.../packs/arm/cmsis/5.0.1/CMSIS/Include/core_cm4.h | 2103 ++++++
lib/arm_atsam/packs/arm/cmsis/5.0.1/LICENSE.txt | 201 +
.../SAMD51_DFP/1.0.70/gcc/gcc/samd51j18a_flash.ld | 168 +
.../SAMD51_DFP/1.0.70/include/component-version.h | 65 +
.../atmel/SAMD51_DFP/1.0.70/include/component/ac.h | 598 ++
.../SAMD51_DFP/1.0.70/include/component/adc.h | 871 +++
.../SAMD51_DFP/1.0.70/include/component/aes.h | 375 +
.../SAMD51_DFP/1.0.70/include/component/can.h | 3207 +++++++++
.../SAMD51_DFP/1.0.70/include/component/ccl.h | 228 +
.../SAMD51_DFP/1.0.70/include/component/cmcc.h | 357 +
.../SAMD51_DFP/1.0.70/include/component/dac.h | 544 ++
.../SAMD51_DFP/1.0.70/include/component/dmac.h | 1416 ++++
.../SAMD51_DFP/1.0.70/include/component/dsu.h | 1244 ++++
.../SAMD51_DFP/1.0.70/include/component/eic.h | 497 ++
.../SAMD51_DFP/1.0.70/include/component/evsys.h | 587 ++
.../SAMD51_DFP/1.0.70/include/component/freqm.h | 233 +
.../SAMD51_DFP/1.0.70/include/component/gclk.h | 272 +
.../SAMD51_DFP/1.0.70/include/component/hmatrixb.h | 84 +
.../SAMD51_DFP/1.0.70/include/component/i2s.h | 747 ++
.../SAMD51_DFP/1.0.70/include/component/icm.h | 582 ++
.../SAMD51_DFP/1.0.70/include/component/mclk.h | 474 ++
.../SAMD51_DFP/1.0.70/include/component/nvmctrl.h | 861 +++
.../1.0.70/include/component/osc32kctrl.h | 303 +
.../SAMD51_DFP/1.0.70/include/component/oscctrl.h | 793 +++
.../SAMD51_DFP/1.0.70/include/component/pac.h | 674 ++
.../SAMD51_DFP/1.0.70/include/component/pcc.h | 251 +
.../SAMD51_DFP/1.0.70/include/component/pdec.h | 726 ++
.../atmel/SAMD51_DFP/1.0.70/include/component/pm.h | 261 +
.../SAMD51_DFP/1.0.70/include/component/port.h | 414 ++
.../SAMD51_DFP/1.0.70/include/component/qspi.h | 528 ++
.../SAMD51_DFP/1.0.70/include/component/ramecc.h | 178 +
.../SAMD51_DFP/1.0.70/include/component/rstc.h | 115 +
.../SAMD51_DFP/1.0.70/include/component/rtc.h | 2098 ++++++
.../SAMD51_DFP/1.0.70/include/component/sdhc.h | 2599 +++++++
.../SAMD51_DFP/1.0.70/include/component/sercom.h | 1680 +++++
.../SAMD51_DFP/1.0.70/include/component/supc.h | 554 ++
.../SAMD51_DFP/1.0.70/include/component/tal.h | 1842 +++++
.../atmel/SAMD51_DFP/1.0.70/include/component/tc.h | 851 +++
.../SAMD51_DFP/1.0.70/include/component/tcc.h | 1762 +++++
.../SAMD51_DFP/1.0.70/include/component/trng.h | 172 +
.../SAMD51_DFP/1.0.70/include/component/usb.h | 1777 +++++
.../SAMD51_DFP/1.0.70/include/component/wdt.h | 300 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/ac.h | 79 +
.../SAMD51_DFP/1.0.70/include/instance/adc0.h | 99 +
.../SAMD51_DFP/1.0.70/include/instance/adc1.h | 100 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/aes.h | 105 +
.../SAMD51_DFP/1.0.70/include/instance/can0.h | 153 +
.../SAMD51_DFP/1.0.70/include/instance/can1.h | 151 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/ccl.h | 57 +
.../SAMD51_DFP/1.0.70/include/instance/cmcc.h | 61 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/dac.h | 88 +
.../SAMD51_DFP/1.0.70/include/instance/dmac.h | 596 ++
.../atmel/SAMD51_DFP/1.0.70/include/instance/dsu.h | 121 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/eic.h | 73 +
.../SAMD51_DFP/1.0.70/include/instance/evsys.h | 722 ++
.../SAMD51_DFP/1.0.70/include/instance/freqm.h | 59 +
.../SAMD51_DFP/1.0.70/include/instance/gclk.h | 191 +
.../SAMD51_DFP/1.0.70/include/instance/hmatrix.h | 133 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/i2s.h | 81 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/icm.h | 77 +
.../SAMD51_DFP/1.0.70/include/instance/mclk.h | 61 +
.../SAMD51_DFP/1.0.70/include/instance/nvmctrl.h | 75 +
.../1.0.70/include/instance/osc32kctrl.h | 59 +
.../SAMD51_DFP/1.0.70/include/instance/oscctrl.h | 130 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/pac.h | 69 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/pcc.h | 58 +
.../SAMD51_DFP/1.0.70/include/instance/pdec.h | 80 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/pm.h | 59 +
.../SAMD51_DFP/1.0.70/include/instance/port.h | 184 +
.../SAMD51_DFP/1.0.70/include/instance/pukcc.h | 57 +
.../SAMD51_DFP/1.0.70/include/instance/qspi.h | 72 +
.../SAMD51_DFP/1.0.70/include/instance/ramecc.h | 54 +
.../SAMD51_DFP/1.0.70/include/instance/rstc.h | 48 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/rtc.h | 156 +
.../SAMD51_DFP/1.0.70/include/instance/sdhc0.h | 147 +
.../SAMD51_DFP/1.0.70/include/instance/sdhc1.h | 147 +
.../SAMD51_DFP/1.0.70/include/instance/sercom0.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom1.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom2.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom3.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom4.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom5.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom6.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/sercom7.h | 181 +
.../SAMD51_DFP/1.0.70/include/instance/supc.h | 64 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tal.h | 541 ++
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc0.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc1.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc2.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc3.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc4.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc5.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc6.h | 109 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/tc7.h | 109 +
.../SAMD51_DFP/1.0.70/include/instance/tcc0.h | 125 +
.../SAMD51_DFP/1.0.70/include/instance/tcc1.h | 115 +
.../SAMD51_DFP/1.0.70/include/instance/tcc2.h | 106 +
.../SAMD51_DFP/1.0.70/include/instance/tcc3.h | 99 +
.../SAMD51_DFP/1.0.70/include/instance/tcc4.h | 99 +
.../SAMD51_DFP/1.0.70/include/instance/trng.h | 51 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/usb.h | 343 +
.../atmel/SAMD51_DFP/1.0.70/include/instance/wdt.h | 55 +
.../SAMD51_DFP/1.0.70/include/pio/samd51j18a.h | 1863 +++++
.../packs/atmel/SAMD51_DFP/1.0.70/include/sam.h | 54 +
.../packs/atmel/SAMD51_DFP/1.0.70/include/samd51.h | 60 +
.../atmel/SAMD51_DFP/1.0.70/include/samd51j18a.h | 1079 +++
.../SAMD51_DFP/1.0.70/include/system_samd51.h | 48 +
110 files changed, 54364 insertions(+)
create mode 100644 lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/arm_math.h
create mode 100644 lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/cmsis_compiler.h
create mode 100644 lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/cmsis_gcc.h
create mode 100644 lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/core_cm4.h
create mode 100644 lib/arm_atsam/packs/arm/cmsis/5.0.1/LICENSE.txt
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/gcc/gcc/samd51j18a_flash.ld
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component-version.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/ac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/adc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/aes.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/can.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/ccl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/cmcc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/dac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/dmac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/dsu.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/eic.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/evsys.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/freqm.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/gclk.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/hmatrixb.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/i2s.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/icm.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/mclk.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/nvmctrl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/osc32kctrl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/oscctrl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/pac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/pcc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/pdec.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/pm.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/port.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/qspi.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/ramecc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/rstc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/rtc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/sdhc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/sercom.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/supc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/tal.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/tc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/tcc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/trng.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/usb.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/component/wdt.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/ac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/adc0.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/adc1.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/aes.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/can0.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/can1.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/ccl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/cmcc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/dac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/dmac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/dsu.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/eic.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/evsys.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/freqm.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/gclk.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/hmatrix.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/i2s.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/icm.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/mclk.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/nvmctrl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/osc32kctrl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/oscctrl.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/pac.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/pcc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/pdec.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/pm.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/port.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/pukcc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/qspi.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/ramecc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/rstc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/rtc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sdhc0.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sdhc1.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom0.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom1.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom2.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom3.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom4.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom5.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom6.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/sercom7.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/supc.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tal.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc0.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc1.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc2.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc3.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc4.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc5.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc6.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tc7.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tcc0.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tcc1.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tcc2.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tcc3.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/tcc4.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/trng.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/usb.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/instance/wdt.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/pio/samd51j18a.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/sam.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/samd51.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/samd51j18a.h
create mode 100644 lib/arm_atsam/packs/atmel/SAMD51_DFP/1.0.70/include/system_samd51.h
(limited to 'lib/arm_atsam')
diff --git a/lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/arm_math.h b/lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/arm_math.h
new file mode 100644
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+++ b/lib/arm_atsam/packs/arm/cmsis/5.0.1/CMSIS/Include/arm_math.h
@@ -0,0 +1,7226 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_math.h
+ * Description: Public header file for CMSIS DSP Library
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ \mainpage CMSIS DSP Software Library
+ *
+ * Introduction
+ * ------------
+ *
+ * This user manual describes the CMSIS DSP software library,
+ * a suite of common signal processing functions for use on Cortex-M processor based devices.
+ *
+ * The library is divided into a number of functions each covering a specific category:
+ * - Basic math functions
+ * - Fast math functions
+ * - Complex math functions
+ * - Filters
+ * - Matrix functions
+ * - Transforms
+ * - Motor control functions
+ * - Statistical functions
+ * - Support functions
+ * - Interpolation functions
+ *
+ * The library has separate functions for operating on 8-bit integers, 16-bit integers,
+ * 32-bit integer and 32-bit floating-point values.
+ *
+ * Using the Library
+ * ------------
+ *
+ * The library installer contains prebuilt versions of the libraries in the Lib folder.
+ * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)
+ * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)
+ * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)
+ * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on)
+ * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)
+ * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)
+ * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)
+ * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)
+ * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)
+ * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)
+ * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)
+ * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)
+ * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)
+ * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)
+ * - arm_ARMv8MBLl_math.lib (ARMv8M Baseline, Little endian)
+ * - arm_ARMv8MMLl_math.lib (ARMv8M Mainline, Little endian)
+ * - arm_ARMv8MMLlfsp_math.lib (ARMv8M Mainline, Little endian, Single Precision Floating Point Unit)
+ * - arm_ARMv8MMLld_math.lib (ARMv8M Mainline, Little endian, DSP instructions)
+ * - arm_ARMv8MMLldfsp_math.lib (ARMv8M Mainline, Little endian, DSP instructions, Single Precision Floating Point Unit)
+ *
+ * The library functions are declared in the public file arm_math.h which is placed in the Include folder.
+ * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
+ * public header file arm_math.h for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+ * Define the appropriate pre processor MACRO ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or
+ * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
+ * For ARMv8M cores define pre processor MACRO ARM_MATH_ARMV8MBL or ARM_MATH_ARMV8MML.
+ * Set Pre processor MACRO __DSP_PRESENT if ARMv8M Mainline core supports DSP instructions.
+ *
+ *
+ * Examples
+ * --------
+ *
+ * The library ships with a number of examples which demonstrate how to use the library functions.
+ *
+ * Toolchain Support
+ * ------------
+ *
+ * The library has been developed and tested with MDK-ARM version 5.14.0.0
+ * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
+ *
+ * Building the Library
+ * ------------
+ *
+ * The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the CMSIS\\DSP_Lib\\Source\\ARM folder.
+ * - arm_cortexM_math.uvprojx
+ *
+ *
+ * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above.
+ *
+ * Pre-processor Macros
+ * ------------
+ *
+ * Each library project have differant pre-processor macros.
+ *
+ * - UNALIGNED_SUPPORT_DISABLE:
+ *
+ * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
+ *
+ * - ARM_MATH_BIG_ENDIAN:
+ *
+ * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+ *
+ * - ARM_MATH_MATRIX_CHECK:
+ *
+ * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+ *
+ * - ARM_MATH_ROUNDING:
+ *
+ * Define macro ARM_MATH_ROUNDING for rounding on support functions
+ *
+ * - ARM_MATH_CMx:
+ *
+ * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
+ * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and
+ * ARM_MATH_CM7 for building the library on cortex-M7.
+ *
+ * - ARM_MATH_ARMV8MxL:
+ *
+ * Define macro ARM_MATH_ARMV8MBL for building the library on ARMv8M Baseline target, ARM_MATH_ARMV8MBL for building library
+ * on ARMv8M Mainline target.
+ *
+ * - __FPU_PRESENT:
+ *
+ * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for floating point libraries.
+ *
+ * - __DSP_PRESENT:
+ *
+ * Initialize macro __DSP_PRESENT = 1 when ARMv8M Mainline core supports DSP instructions.
+ *
+ *
+ * CMSIS-DSP in ARM::CMSIS Pack
+ * -----------------------------
+ *
+ * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories:
+ * |File/Folder |Content |
+ * |------------------------------|------------------------------------------------------------------------|
+ * |\b CMSIS\\Documentation\\DSP | This documentation |
+ * |\b CMSIS\\DSP_Lib | Software license agreement (license.txt) |
+ * |\b CMSIS\\DSP_Lib\\Examples | Example projects demonstrating the usage of the library functions |
+ * |\b CMSIS\\DSP_Lib\\Source | Source files for rebuilding the library |
+ *
+ *
+ * Revision History of CMSIS-DSP
+ * ------------
+ * Please refer to \ref ChangeLog_pg.
+ *
+ * Copyright Notice
+ * ------------
+ *
+ * Copyright (C) 2010-2015 ARM Limited. All rights reserved.
+ */
+
+
+/**
+ * @defgroup groupMath Basic Math Functions
+ */
+
+/**
+ * @defgroup groupFastMath Fast Math Functions
+ * This set of functions provides a fast approximation to sine, cosine, and square root.
+ * As compared to most of the other functions in the CMSIS math library, the fast math functions
+ * operate on individual values and not arrays.
+ * There are separate functions for Q15, Q31, and floating-point data.
+ *
+ */
+
+/**
+ * @defgroup groupCmplxMath Complex Math Functions
+ * This set of functions operates on complex data vectors.
+ * The data in the complex arrays is stored in an interleaved fashion
+ * (real, imag, real, imag, ...).
+ * In the API functions, the number of samples in a complex array refers
+ * to the number of complex values; the array contains twice this number of
+ * real values.
+ */
+
+/**
+ * @defgroup groupFilters Filtering Functions
+ */
+
+/**
+ * @defgroup groupMatrix Matrix Functions
+ *
+ * This set of functions provides basic matrix math operations.
+ * The functions operate on matrix data structures. For example,
+ * the type
+ * definition for the floating-point matrix structure is shown
+ * below:
+ *
+ * typedef struct
+ * {
+ * uint16_t numRows; // number of rows of the matrix.
+ * uint16_t numCols; // number of columns of the matrix.
+ * float32_t *pData; // points to the data of the matrix.
+ * } arm_matrix_instance_f32;
+ *
+ * There are similar definitions for Q15 and Q31 data types.
+ *
+ * The structure specifies the size of the matrix and then points to
+ * an array of data. The array is of size numRows X numCols
+ * and the values are arranged in row order. That is, the
+ * matrix element (i, j) is stored at:
+ *
+ * pData[i*numCols + j]
+ *
+ *
+ * \par Init Functions
+ * There is an associated initialization function for each type of matrix
+ * data structure.
+ * The initialization function sets the values of the internal structure fields.
+ * Refer to the function arm_mat_init_f32(), arm_mat_init_q31()
+ * and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively.
+ *
+ * \par
+ * Use of the initialization function is optional. However, if initialization function is used
+ * then the instance structure cannot be placed into a const data section.
+ * To place the instance structure in a const data
+ * section, manually initialize the data structure. For example:
+ *
+ * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
+ * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
+ * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
+ *
+ * where nRows specifies the number of rows, nColumns
+ * specifies the number of columns, and pData points to the
+ * data array.
+ *
+ * \par Size Checking
+ * By default all of the matrix functions perform size checking on the input and
+ * output matrices. For example, the matrix addition function verifies that the
+ * two input matrices and the output matrix all have the same number of rows and
+ * columns. If the size check fails the functions return:
+ *
+ * ARM_MATH_SIZE_MISMATCH
+ *
+ * Otherwise the functions return
+ *
+ * ARM_MATH_SUCCESS
+ *
+ * There is some overhead associated with this matrix size checking.
+ * The matrix size checking is enabled via the \#define
+ *
+ * ARM_MATH_MATRIX_CHECK
+ *
+ * within the library project settings. By default this macro is defined
+ * and size checking is enabled. By changing the project settings and
+ * undefining this macro size checking is eliminated and the functions
+ * run a bit faster. With size checking disabled the functions always
+ * return ARM_MATH_SUCCESS.
+ */
+
+/**
+ * @defgroup groupTransforms Transform Functions
+ */
+
+/**
+ * @defgroup groupController Controller Functions
+ */
+
+/**
+ * @defgroup groupStats Statistics Functions
+ */
+/**
+ * @defgroup groupSupport Support Functions
+ */
+
+/**
+ * @defgroup groupInterpolation Interpolation Functions
+ * These functions perform 1- and 2-dimensional interpolation of data.
+ * Linear interpolation is used for 1-dimensional data and
+ * bilinear interpolation is used for 2-dimensional data.
+ */
+
+/**
+ * @defgroup groupExamples Examples
+ */
+#ifndef _ARM_MATH_H
+#define _ARM_MATH_H
+
+/* ignore some GCC warnings */
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
+
+#if defined(ARM_MATH_CM7)
+ #include "core_cm7.h"
+ #define ARM_MATH_DSP
+#elif defined (ARM_MATH_CM4)
+ #include "core_cm4.h"
+ #define ARM_MATH_DSP
+#elif defined (ARM_MATH_CM3)
+ #include "core_cm3.h"
+#elif defined (ARM_MATH_CM0)
+ #include "core_cm0.h"
+ #define ARM_MATH_CM0_FAMILY
+#elif defined (ARM_MATH_CM0PLUS)
+ #include "core_cm0plus.h"
+ #define ARM_MATH_CM0_FAMILY
+#elif defined (ARM_MATH_ARMV8MBL)
+ #include "core_armv8mbl.h"
+ #define ARM_MATH_CM0_FAMILY
+#elif defined (ARM_MATH_ARMV8MML)
+ #include "core_armv8mml.h"
+ #if (defined (__DSP_PRESENT) && (__DSP_PRESENT == 1))
+ #define ARM_MATH_DSP
+ #endif
+#else
+ #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS, ARM_MATH_CM0, ARM_MATH_ARMV8MBL, ARM_MATH_ARMV8MML"
+#endif
+
+#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
+#include "string.h"
+#include "math.h"
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+ /**
+ * @brief Macros required for reciprocal calculation in Normalized LMS
+ */
+
+#define DELTA_Q31 (0x100)
+#define DELTA_Q15 0x5
+#define INDEX_MASK 0x0000003F
+#ifndef PI
+ #define PI 3.14159265358979f
+#endif
+
+ /**
+ * @brief Macros required for SINE and COSINE Fast math approximations
+ */
+
+#define FAST_MATH_TABLE_SIZE 512
+#define FAST_MATH_Q31_SHIFT (32 - 10)
+#define FAST_MATH_Q15_SHIFT (16 - 10)
+#define CONTROLLER_Q31_SHIFT (32 - 9)
+#define TABLE_SPACING_Q31 0x400000
+#define TABLE_SPACING_Q15 0x80
+
+ /**
+ * @brief Macros required for SINE and COSINE Controller functions
+ */
+ /* 1.31(q31) Fixed value of 2/360 */
+ /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
+#define INPUT_SPACING 0xB60B61
+
+ /**
+ * @brief Macro for Unaligned Support
+ */
+#ifndef UNALIGNED_SUPPORT_DISABLE
+ #define ALIGN4
+#else
+ #if defined (__GNUC__)
+ #define ALIGN4 __attribute__((aligned(4)))
+ #else
+ #define ALIGN4 __align(4)
+ #endif
+#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+
+ /**
+ * @brief Error status returned by some functions in the library.
+ */
+
+ typedef enum
+ {
+ ARM_MATH_SUCCESS = 0, /**< No error */
+ ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
+ ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
+ ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */
+ ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
+ ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
+ ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
+ } arm_status;
+
+ /**
+ * @brief 8-bit fractional data type in 1.7 format.
+ */
+ typedef int8_t q7_t;
+
+ /**
+ * @brief 16-bit fractional data type in 1.15 format.
+ */
+ typedef int16_t q15_t;
+
+ /**
+ * @brief 32-bit fractional data type in 1.31 format.
+ */
+ typedef int32_t q31_t;
+
+ /**
+ * @brief 64-bit fractional data type in 1.63 format.
+ */
+ typedef int64_t q63_t;
+
+ /**
+ * @brief 32-bit floating-point type definition.
+ */
+ typedef float float32_t;
+
+ /**
+ * @brief 64-bit floating-point type definition.
+ */
+ typedef double float64_t;
+
+ /**
+ * @brief definition to read/write two 16 bit values.
+ */
+#if defined ( __CC_ARM )
+ #define __SIMD32_TYPE int32_t __packed
+ #define CMSIS_UNUSED __attribute__((unused))
+ #define CMSIS_INLINE __attribute__((always_inline))
+
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED __attribute__((unused))
+ #define CMSIS_INLINE __attribute__((always_inline))
+
+#elif defined ( __GNUC__ )
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED __attribute__((unused))
+ #define CMSIS_INLINE __attribute__((always_inline))
+
+#elif defined ( __ICCARM__ )
+ #define __SIMD32_TYPE int32_t __packed
+ #define CMSIS_UNUSED
+ #define CMSIS_INLINE
+
+#elif defined ( __TI_ARM__ )
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED __attribute__((unused))
+ #define CMSIS_INLINE
+
+#elif defined ( __CSMC__ )
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED
+ #define CMSIS_INLINE
+
+#elif defined ( __TASKING__ )
+ #define __SIMD32_TYPE __unaligned int32_t
+ #define CMSIS_UNUSED
+ #define CMSIS_INLINE
+
+#else
+ #error Unknown compiler
+#endif
+
+#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
+#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr))
+#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr))
+#define __SIMD64(addr) (*(int64_t **) & (addr))
+
+/* #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
+#if !defined (ARM_MATH_DSP)
+ /**
+ * @brief definition to pack two 16 bit values.
+ */
+#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
+ (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
+#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
+ (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
+
+/* #endif // defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
+#endif /* !defined (ARM_MATH_DSP) */
+
+ /**
+ * @brief definition to pack four 8 bit values.
+ */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
+ (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
+ (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+ (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
+#else
+
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
+ (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
+ (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+ (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
+
+#endif
+
+
+ /**
+ * @brief Clips Q63 to Q31 values.
+ */
+ CMSIS_INLINE __STATIC_INLINE q31_t clip_q63_to_q31(
+ q63_t x)
+ {
+ return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+ ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
+ }
+
+ /**
+ * @brief Clips Q63 to Q15 values.
+ */
+ CMSIS_INLINE __STATIC_INLINE q15_t clip_q63_to_q15(
+ q63_t x)
+ {
+ return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+ ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
+ }
+
+ /**
+ * @brief Clips Q31 to Q7 values.
+ */
+ CMSIS_INLINE __STATIC_INLINE q7_t clip_q31_to_q7(
+ q31_t x)
+ {
+ return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
+ ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
+ }
+
+ /**
+ * @brief Clips Q31 to Q15 values.
+ */
+ CMSIS_INLINE __STATIC_INLINE q15_t clip_q31_to_q15(
+ q31_t x)
+ {
+ return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
+ ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
+ }
+
+ /**
+ * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
+ */
+
+ CMSIS_INLINE __STATIC_INLINE q63_t mult32x64(
+ q63_t x,
+ q31_t y)
+ {
+ return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
+ (((q63_t) (x >> 32) * y)));
+ }
+
+/*
+ #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM )
+ #define __CLZ __clz
+ #endif
+ */
+/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */
+#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) )
+ CMSIS_INLINE __STATIC_INLINE uint32_t __CLZ(
+ q31_t data);
+
+ CMSIS_INLINE __STATIC_INLINE uint32_t __CLZ(
+ q31_t data)
+ {
+ uint32_t count = 0;
+ uint32_t mask = 0x80000000;
+
+ while ((data & mask) == 0)
+ {
+ count += 1u;
+ mask = mask >> 1u;
+ }
+
+ return (count);
+ }
+#endif
+
+ /**
+ * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
+ */
+
+ CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q31(
+ q31_t in,
+ q31_t * dst,
+ q31_t * pRecipTable)
+ {
+ q31_t out;
+ uint32_t tempVal;
+ uint32_t index, i;
+ uint32_t signBits;
+
+ if (in > 0)
+ {
+ signBits = ((uint32_t) (__CLZ( in) - 1));
+ }
+ else
+ {
+ signBits = ((uint32_t) (__CLZ(-in) - 1));
+ }
+
+ /* Convert input sample to 1.31 format */
+ in = (in << signBits);
+
+ /* calculation of index for initial approximated Val */
+ index = (uint32_t)(in >> 24);
+ index = (index & INDEX_MASK);
+
+ /* 1.31 with exp 1 */
+ out = pRecipTable[index];
+
+ /* calculation of reciprocal value */
+ /* running approximation for two iterations */
+ for (i = 0u; i < 2u; i++)
+ {
+ tempVal = (uint32_t) (((q63_t) in * out) >> 31);
+ tempVal = 0x7FFFFFFFu - tempVal;
+ /* 1.31 with exp 1 */
+ /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
+ out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
+ }
+
+ /* write output */
+ *dst = out;
+
+ /* return num of signbits of out = 1/in value */
+ return (signBits + 1u);
+ }
+
+
+ /**
+ * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q15(
+ q15_t in,
+ q15_t * dst,
+ q15_t * pRecipTable)
+ {
+ q15_t out = 0;
+ uint32_t tempVal = 0;
+ uint32_t index = 0, i = 0;
+ uint32_t signBits = 0;
+
+ if (in > 0)
+ {
+ signBits = ((uint32_t)(__CLZ( in) - 17));
+ }
+ else
+ {
+ signBits = ((uint32_t)(__CLZ(-in) - 17));
+ }
+
+ /* Convert input sample to 1.15 format */
+ in = (in << signBits);
+
+ /* calculation of index for initial approximated Val */
+ index = (uint32_t)(in >> 8);
+ index = (index & INDEX_MASK);
+
+ /* 1.15 with exp 1 */
+ out = pRecipTable[index];
+
+ /* calculation of reciprocal value */
+ /* running approximation for two iterations */
+ for (i = 0u; i < 2u; i++)
+ {
+ tempVal = (uint32_t) (((q31_t) in * out) >> 15);
+ tempVal = 0x7FFFu - tempVal;
+ /* 1.15 with exp 1 */
+ out = (q15_t) (((q31_t) out * tempVal) >> 14);
+ /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
+ }
+
+ /* write output */
+ *dst = out;
+
+ /* return num of signbits of out = 1/in value */
+ return (signBits + 1);
+ }
+
+
+ /*
+ * @brief C custom defined intrinisic function for only M0 processors
+ */
+#if defined(ARM_MATH_CM0_FAMILY)
+ CMSIS_INLINE __STATIC_INLINE q31_t __SSAT(
+ q31_t x,
+ uint32_t y)
+ {
+ int32_t posMax, negMin;
+ uint32_t i;
+
+ posMax = 1;
+ for (i = 0; i < (y - 1); i++)
+ {
+ posMax = posMax * 2;
+ }
+
+ if (x > 0)
+ {
+ posMax = (posMax - 1);
+
+ if (x > posMax)
+ {
+ x = posMax;
+ }
+ }
+ else
+ {
+ negMin = -posMax;
+
+ if (x < negMin)
+ {
+ x = negMin;
+ }
+ }
+ return (x);
+ }
+#endif /* end of ARM_MATH_CM0_FAMILY */
+
+
+ /*
+ * @brief C custom defined intrinsic function for M3 and M0 processors
+ */
+/* #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
+#if !defined (ARM_MATH_DSP)
+
+ /*
+ * @brief C custom defined QADD8 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __QADD8(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s, t, u;
+
+ r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+ s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+ t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
+ u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
+
+ return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QSUB8 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB8(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s, t, u;
+
+ r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+ s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+ t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
+ u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
+
+ return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QADD16 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __QADD16(
+ uint32_t x,
+ uint32_t y)
+ {
+/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */
+ q31_t r = 0, s = 0;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHADD16 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SHADD16(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QSUB16 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB16(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHSUB16 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SHSUB16(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QASX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __QASX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHASX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SHASX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QSAX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __QSAX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHSAX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SHSAX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SMUSDX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSDX(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
+ }
+
+ /*
+ * @brief C custom defined SMUADX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMUADX(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
+ }
+
+
+ /*
+ * @brief C custom defined QADD for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE int32_t __QADD(
+ int32_t x,
+ int32_t y)
+ {
+ return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
+ }
+
+
+ /*
+ * @brief C custom defined QSUB for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE int32_t __QSUB(
+ int32_t x,
+ int32_t y)
+ {
+ return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
+ }
+
+
+ /*
+ * @brief C custom defined SMLAD for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMLAD(
+ uint32_t x,
+ uint32_t y,
+ uint32_t sum)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
+ ( ((q31_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLADX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMLADX(
+ uint32_t x,
+ uint32_t y,
+ uint32_t sum)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ( ((q31_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLSDX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMLSDX(
+ uint32_t x,
+ uint32_t y,
+ uint32_t sum)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ( ((q31_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLALD for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALD(
+ uint32_t x,
+ uint32_t y,
+ uint64_t sum)
+ {
+/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
+ return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
+ ( ((q63_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLALDX for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALDX(
+ uint32_t x,
+ uint32_t y,
+ uint64_t sum)
+ {
+/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
+ return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ( ((q63_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMUAD for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMUAD(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMUSD for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSD(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
+ }
+
+
+ /*
+ * @brief C custom defined SXTB16 for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __SXTB16(
+ uint32_t x)
+ {
+ return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
+ ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) ));
+ }
+
+ /*
+ * @brief C custom defined SMMLA for M3 and M0 processors
+ */
+ CMSIS_INLINE __STATIC_INLINE int32_t __SMMLA(
+ int32_t x,
+ int32_t y,
+ int32_t sum)
+ {
+ return (sum + (int32_t) (((int64_t) x * y) >> 32));
+ }
+
+#if 0
+ /*
+ * @brief C custom defined PKHBT for unavailable DSP extension
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __PKHBT(
+ uint32_t x,
+ uint32_t y,
+ uint32_t leftshift)
+ {
+ return ( ((x ) & 0x0000FFFFUL) |
+ ((y << leftshift) & 0xFFFF0000UL) );
+ }
+
+ /*
+ * @brief C custom defined PKHTB for unavailable DSP extension
+ */
+ CMSIS_INLINE __STATIC_INLINE uint32_t __PKHTB(
+ uint32_t x,
+ uint32_t y,
+ uint32_t rightshift)
+ {
+ return ( ((x ) & 0xFFFF0000UL) |
+ ((y >> rightshift) & 0x0000FFFFUL) );
+ }
+#endif
+
+/* #endif // defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
+#endif /* !defined (ARM_MATH_DSP) */
+
+
+ /**
+ * @brief Instance structure for the Q7 FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ } arm_fir_instance_q7;
+
+ /**
+ * @brief Instance structure for the Q15 FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ } arm_fir_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ } arm_fir_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ } arm_fir_instance_f32;
+
+
+ /**
+ * @brief Processing function for the Q7 FIR filter.
+ * @param[in] S points to an instance of the Q7 FIR filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_q7(
+ const arm_fir_instance_q7 * S,
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q7 FIR filter.
+ * @param[in,out] S points to an instance of the Q7 FIR structure.
+ * @param[in] numTaps Number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed.
+ */
+ void arm_fir_init_q7(
+ arm_fir_instance_q7 * S,
+ uint16_t numTaps,
+ q7_t * pCoeffs,
+ q7_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q15 FIR filter.
+ * @param[in] S points to an instance of the Q15 FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_q15(
+ const arm_fir_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q15 FIR filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_fast_q15(
+ const arm_fir_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 FIR filter.
+ * @param[in,out] S points to an instance of the Q15 FIR filter structure.
+ * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed at a time.
+ * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
+ * numTaps is not a supported value.
+ */
+ arm_status arm_fir_init_q15(
+ arm_fir_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 FIR filter.
+ * @param[in] S points to an instance of the Q31 FIR filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_q31(
+ const arm_fir_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q31 FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_fast_q31(
+ const arm_fir_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 FIR filter.
+ * @param[in,out] S points to an instance of the Q31 FIR structure.
+ * @param[in] numTaps Number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed at a time.
+ */
+ void arm_fir_init_q31(
+ arm_fir_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the floating-point FIR filter.
+ * @param[in] S points to an instance of the floating-point FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_f32(
+ const arm_fir_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point FIR filter.
+ * @param[in,out] S points to an instance of the floating-point FIR filter structure.
+ * @param[in] numTaps Number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed at a time.
+ */
+ void arm_fir_init_f32(
+ arm_fir_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q15 Biquad cascade filter.
+ */
+ typedef struct
+ {
+ int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+ } arm_biquad_casd_df1_inst_q15;
+
+ /**
+ * @brief Instance structure for the Q31 Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+ } arm_biquad_casd_df1_inst_q31;
+
+ /**
+ * @brief Instance structure for the floating-point Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ } arm_biquad_casd_df1_inst_f32;
+
+
+ /**
+ * @brief Processing function for the Q15 Biquad cascade filter.
+ * @param[in] S points to an instance of the Q15 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_q15(
+ const arm_biquad_casd_df1_inst_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 Biquad cascade filter.
+ * @param[in,out] S points to an instance of the Q15 Biquad cascade structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
+ */
+ void arm_biquad_cascade_df1_init_q15(
+ arm_biquad_casd_df1_inst_q15 * S,
+ uint8_t numStages,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ int8_t postShift);
+
+
+ /**
+ * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q15 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_fast_q15(
+ const arm_biquad_casd_df1_inst_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 Biquad cascade filter
+ * @param[in] S points to an instance of the Q31 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_q31(
+ const arm_biquad_casd_df1_inst_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q31 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_fast_q31(
+ const arm_biquad_casd_df1_inst_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 Biquad cascade filter.
+ * @param[in,out] S points to an instance of the Q31 Biquad cascade structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
+ */
+ void arm_biquad_cascade_df1_init_q31