From 3afe0ea9b9f67ae33f54c1393b15d988764241a2 Mon Sep 17 00:00:00 2001 From: Ryan Date: Thu, 26 Nov 2020 23:44:17 +1100 Subject: ST7565 tidyup (#10907) --- keyboards/ergodox_infinity/board_st7565.h | 107 +++++++++++++----------------- 1 file changed, 45 insertions(+), 62 deletions(-) (limited to 'keyboards/ergodox_infinity/board_st7565.h') diff --git a/keyboards/ergodox_infinity/board_st7565.h b/keyboards/ergodox_infinity/board_st7565.h index 9ab636c95d..875ed9e65c 100644 --- a/keyboards/ergodox_infinity/board_st7565.h +++ b/keyboards/ergodox_infinity/board_st7565.h @@ -8,105 +8,88 @@ #ifndef _GDISP_LLD_BOARD_H #define _GDISP_LLD_BOARD_H -#define ST7565_LCD_BIAS ST7565_LCD_BIAS_9 // actually 6 -#define ST7565_ADC ST7565_ADC_NORMAL -#define ST7565_COM_SCAN ST7565_COM_SCAN_DEC -#define ST7565_PAGE_ORDER 0,1,2,3 +#include "quantum.h" + +#define ST7565_LCD_BIAS ST7565_LCD_BIAS_7 +#define ST7565_COM_SCAN ST7565_COM_SCAN_DEC +#define ST7565_PAGE_ORDER 0, 1, 2, 3 /* * Custom page order for several LCD boards, e.g. HEM12864-99 * #define ST7565_PAGE_ORDER 4,5,6,7,0,1,2,3 */ -#define ST7565_GPIOPORT GPIOC -#define ST7565_PORT PORTC -#define ST7565_A0_PIN 7 -#define ST7565_RST_PIN 8 -#define ST7565_MOSI_PIN 6 -#define ST7565_SLCK_PIN 5 -#define ST7565_SS_PIN 4 - -#define palSetPadModeRaw(portname, bits) \ - ST7565_PORT->PCR[ST7565_##portname##_PIN] = bits +#define ST7565_A0_PIN C7 +#define ST7565_RST_PIN C8 +#define ST7565_MOSI_PIN C6 +#define ST7565_SCLK_PIN C5 +#define ST7565_SS_PIN C4 -#define palSetPadModeNamed(portname, portmode) \ - palSetPadMode(ST7565_GPIOPORT, ST7565_##portname##_PIN, portmode) - -#define ST7565_SPI_MODE PORTx_PCRn_DSE | PORTx_PCRn_MUX(2) // DSPI Clock and Transfer Attributes // Frame Size: 8 bits // MSB First // CLK Low by default static const SPIConfig spi1config = { - // Operation complete callback or @p NULL. - .end_cb = NULL, - //The chip select line port - when not using pcs. - .ssport = ST7565_GPIOPORT, - // brief The chip select line pad number - when not using pcs. - .sspad=ST7565_SS_PIN, - // SPI initialization data. - .tar0 = - SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes - | SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns - | SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns - | SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns - | SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2 - | SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns + // Operation complete callback or @p NULL. + .end_cb = NULL, + // The chip select line port - when not using pcs. + .ssport = PAL_PORT(ST7565_SS_PIN), + // brief The chip select line pad number - when not using pcs. + .sspad = PAL_PAD(ST7565_SS_PIN), + // SPI initialization data. + .tar0 = SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes + | SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns + | SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns + | SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns + | SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2 + | SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns }; static GFXINLINE void acquire_bus(GDisplay *g) { - (void) g; + (void)g; // Only the LCD is using the SPI bus, so no need to acquire // spiAcquireBus(&SPID1); spiSelect(&SPID1); } static GFXINLINE void release_bus(GDisplay *g) { - (void) g; + (void)g; // Only the LCD is using the SPI bus, so no need to release - //spiReleaseBus(&SPID1); + // spiReleaseBus(&SPID1); spiUnselect(&SPID1); } static GFXINLINE void init_board(GDisplay *g) { - (void) g; - palSetPadModeNamed(A0, PAL_MODE_OUTPUT_PUSHPULL); - palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN); - palSetPadModeNamed(RST, PAL_MODE_OUTPUT_PUSHPULL); - palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN); - palSetPadModeRaw(MOSI, ST7565_SPI_MODE); - palSetPadModeRaw(SLCK, ST7565_SPI_MODE); - palSetPadModeNamed(SS, PAL_MODE_OUTPUT_PUSHPULL); + (void)g; + setPinOutput(ST7565_A0_PIN); + writePinHigh(ST7565_A0_PIN); + setPinOutput(ST7565_RST_PIN); + writePinHigh(ST7565_RST_PIN); + setPinOutput(ST7565_SS_PIN); + + palSetPadMode(PAL_PORT(ST7565_MOSI_PIN), PAL_PAD(ST7565_MOSI_PIN), PAL_MODE_ALTERNATIVE_2); + palSetPadMode(PAL_PORT(ST7565_SCLK_PIN), PAL_PAD(ST7565_SCLK_PIN), PAL_MODE_ALTERNATIVE_2); spiInit(); spiStart(&SPID1, &spi1config); release_bus(g); } -static GFXINLINE void post_init_board(GDisplay *g) { - (void) g; -} +static GFXINLINE void post_init_board(GDisplay *g) { (void)g; } static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) { - (void) g; - if (state) { - palClearPad(ST7565_GPIOPORT, ST7565_RST_PIN); - } - else { - palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN); - } -} - -static GFXINLINE void enter_data_mode(GDisplay *g) { - palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN); + (void)g; + writePin(ST7565_RST_PIN, !state); } -static GFXINLINE void enter_cmd_mode(GDisplay *g) { - palClearPad(ST7565_GPIOPORT, ST7565_A0_PIN); +static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) { + (void)g; + writePinLow(ST7565_A0_PIN); + spiSend(&SPID1, 1, &cmd); } - -static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) { - (void) g; +static GFXINLINE void write_data(GDisplay *g, gU8 *data, gU16 length) { + (void)g; + writePinHigh(ST7565_A0_PIN); spiSend(&SPID1, length, data); } -- cgit v1.2.3