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* Add Bonsai C4 as a platform board file (#18901)David Hoelscher2022-11-137-2/+426
| | | | | | | | | | | | | * Set up Bonsai C4 as a platform board file * corrections and improvements based on testing and feedback * Added VBUS sensing as default capability for improved split support using Bonsai C4 * Update clock divisor for SPI flash Co-authored-by: Nick Brassel <nick@tzarc.org> Co-authored-by: Nick Brassel <nick@tzarc.org>
* Move EFL wear-leveling driver to be default for F1, F3, F4, L4, G4, WB32, ↵Nick Brassel2022-11-111-1/+3
| | | | GD32V. (#19020)
* Fixup WS2812 vendor driver (#19028)jack2022-11-111-1/+1
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* [Core] Allow custom timings for WS2812 PIO driver (#18006)Stefan Kerkmann2022-11-101-71/+165
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* Merge remote-tracking branch 'origin/master' into developDrashna Jael're2022-11-061-1/+1
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| * Refactor to avoid deprecated wmic execution (#18122)Joel Challis2022-10-311-1/+1
| | | | | | | | | | | | | | * wmic deprecated? * Update platforms/avr/flash.mk * Update platforms/avr/flash.mk
* | Added analog support for WB32 MCU. (#18289)Joy Lee2022-11-011-6/+6
| | | | | | Co-authored-by: Joy <chang.li@westberrytech.com>
* | [Core] Adjust PWM hardware audio driver for RP2040 (#17723)Stefan Kerkmann2022-10-273-97/+70
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* | Generalise CTPC logic from common_features (#18803)Joel Challis2022-10-221-0/+1
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* | ws2812: replace RGBLED_NUM with driver-owned constant to decouple driver ↵Thomas Kriechbaumer2022-10-213-19/+19
| | | | | | | | from RGBLEDs/RGBMATRIX defines (#18036)
* | Merge remote-tracking branch 'origin/master' into developQMK Bot2022-10-162-4/+25
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| * Allow Fedora to update ChibiOS configs. (#18698)Nick Brassel2022-10-172-4/+25
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* | Fix some rp2040 hardware ID errors (#18617)Joel Challis2022-10-061-0/+3
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* | Update ChibiOS hardware ID (#18613)Joel Challis2022-10-051-2/+4
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* | onekey: Enable ADC for STM32F072 Discovery (#18592)Ryan2022-10-051-0/+1
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* | [Core] RP2040: use built-in integer hardware divider and optimized i64 ↵Stefan Kerkmann2022-10-041-220/+31
| | | | | | | | multiplication (#18464)
* | [Core] PWM Backlight for RP2040 (#17706)Stefan Kerkmann2022-10-045-0/+48
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* | [Bug] RP2040: only clear RX FIFO for serial pio driver clear (#18581)Stefan Kerkmann2022-10-041-3/+4
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* | [Core] Serial-protocol: always clear receive queue on main half of split ↵Stefan Kerkmann2022-10-031-8/+4
| | | | | | | | keyboard (#18419)
* | Merge remote-tracking branch 'origin/master' into developQMK Bot2022-10-033-2/+4
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| * `:flash`: print bootloader (#18569)Ryan2022-10-033-2/+4
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* | Copy RP2040 vector table to RAM on startup (#18424)Stefan Kerkmann2022-09-221-1/+2
| | | | | | | | | | ...this reduces possible latency when invoking interrupt handlers by mitigating XIP cache misses which are not existent when running code from RAM.
* | Stabilize Half-duplex PIO split comms take 2 (#18421)Stefan Kerkmann2022-09-201-15/+2
| | | | | | | | | | | | ...by moving the actually timing critical `enter_rx_state()` and `leave_rx_state()` functions to RAM in order to not be affected by XIP cache spikes. This commit also reverts the hacky USB interrupt disabling that was done in 293c53d774
* | Add Elite-C to converters (#18309)Joel Challis2022-09-184-0/+120
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* | Add UART support for Kinetis boards (#18370)Ryan2022-09-172-17/+41
| | | | | | | | | | * Add UART support for Kinetis boards * Default PAL mode for GPIOV1
* | Reboot wb32 devices after flashing (#18323)Joel Challis2022-09-101-1/+2
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* | Add Elite-Pi converter (#18236)Danny2022-09-082-0/+45
| | | | | | Co-authored-by: Joel Challis <git@zvecr.com>
* | Prevent USB peripheral fault when restarting USB on WB32 MCUs (#18058)Joy Lee2022-09-013-0/+10
| | | | | | Co-authored-by: Joy <chang.li@westberrytech.com>
* | Merge remote-tracking branch 'origin/master' into developQMK Bot2022-09-012-11/+2
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| * Remove non promicro pins from converters (#18239)Joel Challis2022-09-012-11/+2
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* | Move bootloader.mk to platforms (#18228)Ryan2022-08-313-0/+312
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* | Use a macro to compute the size of arrays at compile time (#18044)Jeff Epler2022-08-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add ARRAY_SIZE and CEILING utility macros * Apply a coccinelle patch to use ARRAY_SIZE * fix up some straggling items * Fix 'make test:secure' * Enhance ARRAY_SIZE macro to reject acting on pointers The previous definition would not produce a diagnostic for ``` int *p; size_t num_elem = ARRAY_SIZE(p) ``` but the new one will. * explicitly get definition of ARRAY_SIZE * Convert to ARRAY_SIZE when const is involved The following spatch finds additional instances where the array is const and the division is by the size of the type, not the size of the first element: ``` @ rule5a using "empty.iso" @ type T; const T[] E; @@ - (sizeof(E)/sizeof(T)) + ARRAY_SIZE(E) @ rule6a using "empty.iso" @ type T; const T[] E; @@ - sizeof(E)/sizeof(T) + ARRAY_SIZE(E) ``` * New instances of ARRAY_SIZE added since initial spatch run * Use `ARRAY_SIZE` in docs (found by grep) * Manually use ARRAY_SIZE hs_set is expected to be the same size as uint16_t, though it's made of two 8-bit integers * Just like char, sizeof(uint8_t) is guaranteed to be 1 This is at least true on any plausible system where qmk is actually used. Per my understanding it's universally true, assuming that uint8_t exists: https://stackoverflow.com/questions/48655310/can-i-assume-that-sizeofuint8-t-1 * Run qmk-format on core C files touched in this branch Co-authored-by: Stefan Kerkmann <karlk90@pm.me>
* | Remove deprecated USBasp and bootloadHID bootloader types (#18195)Ryan2022-08-281-2/+2
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* Add eeprom defaults for tinyuf2 bootloader (#18042)Joel Challis2022-08-251-4/+0
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* Use the correct bootloader definition. (#18102)Nick Brassel2022-08-191-1/+1
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* Add Bonsai C4 converter (#17711)David Hoelscher2022-08-182-0/+44
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* Fix GD32VF103 WS2812 PWM driver (#18067)Stefan Kerkmann2022-08-151-0/+2
| | | ...by adding the missing STM32 DMA defines.
* Partially revert some WB32 specific changes (#18038)Joel Challis2022-08-142-23/+10
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* [Controller] Added board config for custom controller STeMCell (#16287)Mega Mind2022-08-148-0/+382
| | | | | Co-authored-by: Mariappan Ramasamy <947300+Mariappan@users.noreply.github.com> Co-authored-by: Mariappan Ramasamy <maari@basis-ai.com> Co-authored-by: Sadek Baroudi <sadekbaroudi@gmail.com>
* Fix buffer size for WS2812 PWM driver (#17046)yiancar2022-08-131-4/+48
| | | | | Co-authored-by: Drashna Jaelre <drashna@live.com> Co-authored-by: Sergey Vlasov <sigprof@gmail.com> Co-authored-by: yiancar <yiancar@gmail.com>
* Added ws2812_pwm support for WB32 MCU. (#17142)Joy Lee2022-08-131-4/+23
| | | Co-authored-by: Joy <chang.li@westberrytech.com>
* Added ws2812_spi support for WB32 MCU (#17143)Joy Lee2022-08-132-2/+13
| | | Co-authored-by: Joy <chang.li@westberrytech.com>
* Improve avr wait_us() (#16879)Takeshi ISHII2022-08-141-9/+29
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* Add Bit-C PRO converter (#17827)Jay Greco2022-08-132-0/+51
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* Added implementation of WB32 MCU wear_leveling_efl. (#17579)Joy Lee2022-08-131-0/+2
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* Add minimal STM32F103C6 support (#17853)Sergey Vlasov2022-08-115-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, the crippled versions of “Bluepill” boards with STM32F103C6xx chips instead of STM32F103C8xx are now sold all over the place, sometimes advertised in a confusing way to make the difference not noticeable until too late. Add minimal support for these MCUs in the common “Bluepill with stm32duino” configuration, so that it could be possible to make something useful from those boards (although fitting QMK into the available 24 KiB of flash may be rather hard). (In fact, I'm not sure whether the “STM32” part of the chip name is actually correct for those boards of uncertain origin, so the onekey board name is `bluepill_f103c6`; another reason for that name is to match the existing `blackpill_f401` and `blackpill_f411`.) The EEPROM emulation support is not included on purpose, because enabling it without having a working firmware size check would be irresponsible with such flash size (the chance that someone would build a firmware where the EEPROM backing store ends up overlapping some firmware code is really high). Other than that, enabling the EEPROM emulation code is mostly trivial (the `wear_leveling` driver with the `embedded_flash` backing store even works without any custom configuration, although its code is significantly larger than the `vendor` driver, which may also be important for such flash size).
* Fix issue with #17904. (#17905)Nick Brassel2022-08-041-1/+1
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* Fixup compilation of printf-like functions with uint32_t args. (#17904)Nick Brassel2022-08-041-10/+10
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* [Core] `STM32_USB_USE_OTG1` => `USB_ENDPOINTS_ARE_REORDERABLE` (#17647)Nick Brassel2022-08-041-0/+2
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* Remove legacy AVR ssd1306 driver (#17864)Joel Challis2022-07-312-416/+0
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