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-rw-r--r--platforms/arm_atsam/_timer.h19
-rw-r--r--platforms/arm_atsam/_wait.h22
-rw-r--r--platforms/arm_atsam/atomic_util.h37
-rw-r--r--platforms/arm_atsam/bootloader.c57
-rw-r--r--platforms/arm_atsam/eeprom.c184
-rw-r--r--platforms/arm_atsam/gpio.h77
-rw-r--r--platforms/arm_atsam/pin_defs.h84
-rw-r--r--platforms/arm_atsam/platform.c21
-rw-r--r--platforms/arm_atsam/platform.mk67
-rw-r--r--platforms/arm_atsam/platform_deps.h18
-rw-r--r--platforms/arm_atsam/suspend.c77
-rw-r--r--platforms/arm_atsam/timer.c19
-rw-r--r--platforms/atomic_util.h32
-rw-r--r--platforms/avr/_print.h33
-rw-r--r--platforms/avr/_timer.h19
-rw-r--r--platforms/avr/_wait.h49
-rw-r--r--platforms/avr/atomic_util.h22
-rw-r--r--platforms/avr/bootloader.c293
-rw-r--r--platforms/avr/bootloader_size.c21
-rw-r--r--platforms/avr/gpio.h49
-rw-r--r--platforms/avr/pin_defs.h128
-rw-r--r--platforms/avr/platform.c21
-rw-r--r--platforms/avr/platform.mk179
-rw-r--r--platforms/avr/platform_deps.h20
-rw-r--r--platforms/avr/printf.c20
-rw-r--r--platforms/avr/printf.mk2
-rw-r--r--platforms/avr/sleep_led.c124
-rw-r--r--platforms/avr/suspend.c152
-rw-r--r--platforms/avr/timer.c133
-rw-r--r--platforms/avr/timer_avr.h39
-rw-r--r--platforms/avr/xprintf.S498
-rw-r--r--platforms/avr/xprintf.h103
-rw-r--r--platforms/bootloader.h21
-rw-r--r--platforms/chibios/_timer.h19
-rw-r--r--platforms/chibios/_wait.c89
-rw-r--r--platforms/chibios/_wait.h60
-rw-r--r--platforms/chibios/atomic_util.h37
-rw-r--r--platforms/chibios/bootloader.c145
-rw-r--r--platforms/chibios/chibios_config.h78
-rw-r--r--platforms/chibios/eeprom_stm32.c687
-rw-r--r--platforms/chibios/eeprom_stm32.h33
-rw-r--r--platforms/chibios/eeprom_stm32_defs.h74
-rw-r--r--platforms/chibios/eeprom_teensy.c795
-rw-r--r--platforms/chibios/flash_stm32.c208
-rw-r--r--platforms/chibios/flash_stm32.h44
-rw-r--r--platforms/chibios/gd32v_compatibility.h120
-rw-r--r--platforms/chibios/gpio.h50
-rw-r--r--platforms/chibios/pin_defs.h323
-rw-r--r--platforms/chibios/platform.c22
-rw-r--r--platforms/chibios/platform.mk436
-rw-r--r--platforms/chibios/platform_deps.h19
-rw-r--r--platforms/chibios/sleep_led.c192
-rw-r--r--platforms/chibios/suspend.c92
-rw-r--r--platforms/chibios/syscall-fallbacks.c110
-rw-r--r--platforms/chibios/timer.c47
-rw-r--r--platforms/chibios/wait.c41
-rw-r--r--platforms/common.mk12
-rw-r--r--platforms/eeprom.h21
-rw-r--r--platforms/gpio.h22
-rw-r--r--platforms/pin_defs.h23
-rw-r--r--platforms/progmem.h19
-rw-r--r--platforms/sleep_led.h17
-rw-r--r--platforms/suspend.h20
-rw-r--r--platforms/test/_wait.h22
-rw-r--r--platforms/test/bootloader.c19
-rw-r--r--platforms/test/eeprom.c95
-rw-r--r--platforms/test/eeprom_stm32_tests.cpp438
-rw-r--r--platforms/test/flash_stm32_mock.c49
-rw-r--r--platforms/test/hal.h18
-rw-r--r--platforms/test/platform.c21
-rw-r--r--platforms/test/platform.h18
-rw-r--r--platforms/test/platform.mk34
-rw-r--r--platforms/test/platform_deps.h18
-rw-r--r--platforms/test/rules.mk24
-rw-r--r--platforms/test/suspend.c15
-rw-r--r--platforms/test/testlist.mk1
-rw-r--r--platforms/test/timer.c33
-rw-r--r--platforms/timer.h67
-rw-r--r--platforms/wait.h30
79 files changed, 7397 insertions, 0 deletions
diff --git a/platforms/arm_atsam/_timer.h b/platforms/arm_atsam/_timer.h
new file mode 100644
index 0000000000..77402b612a
--- /dev/null
+++ b/platforms/arm_atsam/_timer.h
@@ -0,0 +1,19 @@
+/* Copyright 2021 Simon Arlott
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+// The platform is 32-bit, so prefer 32-bit timers to avoid overflow
+#define FAST_TIMER_T_SIZE 32
diff --git a/platforms/arm_atsam/_wait.h b/platforms/arm_atsam/_wait.h
new file mode 100644
index 0000000000..41b686b56c
--- /dev/null
+++ b/platforms/arm_atsam/_wait.h
@@ -0,0 +1,22 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "clks.h"
+
+#define wait_ms(ms) CLK_delay_ms(ms)
+#define wait_us(us) CLK_delay_us(us)
+#define waitInputPinDelay()
diff --git a/platforms/arm_atsam/atomic_util.h b/platforms/arm_atsam/atomic_util.h
new file mode 100644
index 0000000000..848542d23a
--- /dev/null
+++ b/platforms/arm_atsam/atomic_util.h
@@ -0,0 +1,37 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "samd51j18a.h"
+
+static __inline__ uint8_t __interrupt_disable__(void) {
+ __disable_irq();
+
+ return 1;
+}
+
+static __inline__ void __interrupt_enable__(const uint8_t *__s) {
+ __enable_irq();
+
+ __asm__ volatile("" ::: "memory");
+ (void)__s;
+}
+
+#define ATOMIC_BLOCK(type) for (type, __ToDo = __interrupt_disable__(); __ToDo; __ToDo = 0)
+#define ATOMIC_FORCEON uint8_t sreg_save __attribute__((__cleanup__(__interrupt_enable__))) = 0
+
+#define ATOMIC_BLOCK_RESTORESTATE _Static_assert(0, "ATOMIC_BLOCK_RESTORESTATE not implemented")
+#define ATOMIC_BLOCK_FORCEON ATOMIC_BLOCK(ATOMIC_FORCEON)
diff --git a/platforms/arm_atsam/bootloader.c b/platforms/arm_atsam/bootloader.c
new file mode 100644
index 0000000000..9015b00aab
--- /dev/null
+++ b/platforms/arm_atsam/bootloader.c
@@ -0,0 +1,57 @@
+/* Copyright 2017 Fred Sundvik
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "bootloader.h"
+#include "samd51j18a.h"
+#include "md_bootloader.h"
+
+// Set watchdog timer to reset. Directs the bootloader to stay in programming mode.
+void bootloader_jump(void) {
+#ifdef KEYBOARD_massdrop_ctrl
+ // CTRL keyboards released with bootloader version below must use RAM method. Otherwise use WDT method.
+ uint8_t ver_ram_method[] = "v2.18Jun 22 2018 17:28:08"; // The version to match (NULL terminated by compiler)
+ uint8_t *ver_check = ver_ram_method; // Pointer to version match string for traversal
+ uint8_t *ver_rom = (uint8_t *)0x21A0; // Pointer to address in ROM where this specific bootloader version would exist
+
+ while (*ver_check && *ver_rom == *ver_check) { // While there are check version characters to match and bootloader's version matches check's version
+ ver_check++; // Move check version pointer to next character
+ ver_rom++; // Move ROM version pointer to next character
+ }
+
+ if (!*ver_check) { // If check version pointer is NULL, all characters have matched
+ *MAGIC_ADDR = BOOTLOADER_MAGIC; // Set magic number into RAM
+ NVIC_SystemReset(); // Perform system reset
+ while (1) {
+ } // Won't get here
+ }
+#endif
+
+ WDT->CTRLA.bit.ENABLE = 0;
+ while (WDT->SYNCBUSY.bit.ENABLE) {
+ }
+ while (WDT->CTRLA.bit.ENABLE) {
+ }
+ WDT->CONFIG.bit.WINDOW = 0;
+ WDT->CONFIG.bit.PER = 0;
+ WDT->EWCTRL.bit.EWOFFSET = 0;
+ WDT->CTRLA.bit.ENABLE = 1;
+ while (WDT->SYNCBUSY.bit.ENABLE) {
+ }
+ while (!WDT->CTRLA.bit.ENABLE) {
+ }
+ while (1) {
+ } // Wait on timeout
+}
diff --git a/platforms/arm_atsam/eeprom.c b/platforms/arm_atsam/eeprom.c
new file mode 100644
index 0000000000..ff1a692623
--- /dev/null
+++ b/platforms/arm_atsam/eeprom.c
@@ -0,0 +1,184 @@
+/* Copyright 2017 Fred Sundvik
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "eeprom.h"
+#include "debug.h"
+#include "samd51j18a.h"
+#include "core_cm4.h"
+#include "component/nvmctrl.h"
+
+#ifndef EEPROM_SIZE
+# include "eeconfig.h"
+# define EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO
+#endif
+
+#ifndef MAX
+# define MAX(X, Y) ((X) > (Y) ? (X) : (Y))
+#endif
+
+#ifndef BUSY_RETRIES
+# define BUSY_RETRIES 10000
+#endif
+
+// #define DEBUG_EEPROM_OUTPUT
+
+/*
+ * Debug print utils
+ */
+#if defined(DEBUG_EEPROM_OUTPUT)
+# define eeprom_printf(fmt, ...) xprintf(fmt, ##__VA_ARGS__);
+#else /* NO_DEBUG */
+# define eeprom_printf(fmt, ...)
+#endif /* NO_DEBUG */
+
+__attribute__((aligned(4))) static uint8_t buffer[EEPROM_SIZE] = {0};
+volatile uint8_t * SmartEEPROM8 = (uint8_t *)SEEPROM_ADDR;
+
+static inline bool eeprom_is_busy(void) {
+ int timeout = BUSY_RETRIES;
+ while (NVMCTRL->SEESTAT.bit.BUSY && timeout-- > 0)
+ ;
+
+ return NVMCTRL->SEESTAT.bit.BUSY;
+}
+
+static uint32_t get_virtual_eeprom_size(void) {
+ // clang-format off
+ static const uint32_t VIRTUAL_EEPROM_MAP[11][8] = {
+ /* 4 8 16 32 64 128 256 512 */
+ /* 0*/ { 0, 0, 0, 0, 0, 0, 0, 0 },
+ /* 1*/ { 512, 1024, 2048, 4096, 4096, 4096, 4096, 4096 },
+ /* 2*/ { 512, 1024, 2048, 4096, 8192, 8192, 8192, 8192 },
+ /* 3*/ { 512, 1024, 2048, 4096, 8192, 16384, 16384, 16384 },
+ /* 4*/ { 512, 1024, 2048, 4096, 8192, 16384, 16384, 16384 },
+ /* 5*/ { 512, 1024, 2048, 4096, 8192, 16384, 32768, 32768 },
+ /* 6*/ { 512, 1024, 2048, 4096, 8192, 16384, 32768, 32768 },
+ /* 7*/ { 512, 1024, 2048, 4096, 8192, 16384, 32768, 32768 },
+ /* 8*/ { 512, 1024, 2048, 4096, 8192, 16384, 32768, 32768 },
+ /* 9*/ { 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536 },
+ /*10*/ { 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536 },
+ };
+ // clang-format on
+
+ static uint32_t virtual_eeprom_size = UINT32_MAX;
+ if (virtual_eeprom_size == UINT32_MAX) {
+ virtual_eeprom_size = VIRTUAL_EEPROM_MAP[NVMCTRL->SEESTAT.bit.PSZ][NVMCTRL->SEESTAT.bit.SBLK];
+ }
+ // eeprom_printf("get_virtual_eeprom_size:: %d:%d:%d\n", NVMCTRL->SEESTAT.bit.PSZ, NVMCTRL->SEESTAT.bit.SBLK, virtual_eeprom_size);
+ return virtual_eeprom_size;
+}
+
+uint8_t eeprom_read_byte(const uint8_t *addr) {
+ uintptr_t offset = (uintptr_t)addr;
+ if (offset >= MAX(EEPROM_SIZE, get_virtual_eeprom_size())) {
+ eeprom_printf("eeprom_read_byte:: out of bounds\n");
+ return 0x0;
+ }
+
+ if (get_virtual_eeprom_size() == 0) {
+ return buffer[offset];
+ }
+
+ if (eeprom_is_busy()) {
+ eeprom_printf("eeprom_write_byte:: timeout\n");
+ return 0x0;
+ }
+
+ return SmartEEPROM8[offset];
+}
+
+void eeprom_write_byte(uint8_t *addr, uint8_t value) {
+ uintptr_t offset = (uintptr_t)addr;
+ if (offset >= MAX(EEPROM_SIZE, get_virtual_eeprom_size())) {
+ eeprom_printf("eeprom_write_byte:: out of bounds\n");
+ return;
+ }
+
+ if (get_virtual_eeprom_size() == 0) {
+ buffer[offset] = value;
+ return;
+ }
+
+ if (eeprom_is_busy()) {
+ eeprom_printf("eeprom_write_byte:: timeout\n");
+ return;
+ }
+
+ SmartEEPROM8[offset] = value;
+}
+
+uint16_t eeprom_read_word(const uint16_t *addr) {
+ const uint8_t *p = (const uint8_t *)addr;
+ return eeprom_read_byte(p) | (eeprom_read_byte(p + 1) << 8);
+}
+
+uint32_t eeprom_read_dword(const uint32_t *addr) {
+ const uint8_t *p = (const uint8_t *)addr;
+ return eeprom_read_byte(p) | (eeprom_read_byte(p + 1) << 8) | (eeprom_read_byte(p + 2) << 16) | (eeprom_read_byte(p + 3) << 24);
+}
+
+void eeprom_read_block(void *buf, const void *addr, size_t len) {
+ const uint8_t *p = (const uint8_t *)addr;
+ uint8_t * dest = (uint8_t *)buf;
+ while (len--) {
+ *dest++ = eeprom_read_byte(p++);
+ }
+}
+
+void eeprom_write_word(uint16_t *addr, uint16_t value) {
+ uint8_t *p = (uint8_t *)addr;
+ eeprom_write_byte(p++, value);
+ eeprom_write_byte(p, value >> 8);
+}
+
+void eeprom_write_dword(uint32_t *addr, uint32_t value) {
+ uint8_t *p = (uint8_t *)addr;
+ eeprom_write_byte(p++, value);
+ eeprom_write_byte(p++, value >> 8);
+ eeprom_write_byte(p++, value >> 16);
+ eeprom_write_byte(p, value >> 24);
+}
+
+void eeprom_write_block(const void *buf, void *addr, size_t len) {
+ uint8_t * p = (uint8_t *)addr;
+ const uint8_t *src = (const uint8_t *)buf;
+ while (len--) {
+ eeprom_write_byte(p++, *src++);
+ }
+}
+
+void eeprom_update_byte(uint8_t *addr, uint8_t value) { eeprom_write_byte(addr, value); }
+
+void eeprom_update_word(uint16_t *addr, uint16_t value) {
+ uint8_t *p = (uint8_t *)addr;
+ eeprom_write_byte(p++, value);
+ eeprom_write_byte(p, value >> 8);
+}
+
+void eeprom_update_dword(uint32_t *addr, uint32_t value) {
+ uint8_t *p = (uint8_t *)addr;
+ eeprom_write_byte(p++, value);
+ eeprom_write_byte(p++, value >> 8);
+ eeprom_write_byte(p++, value >> 16);
+ eeprom_write_byte(p, value >> 24);
+}
+
+void eeprom_update_block(const void *buf, void *addr, size_t len) {
+ uint8_t * p = (uint8_t *)addr;
+ const uint8_t *src = (const uint8_t *)buf;
+ while (len--) {
+ eeprom_write_byte(p++, *src++);
+ }
+}
diff --git a/platforms/arm_atsam/gpio.h b/platforms/arm_atsam/gpio.h
new file mode 100644
index 0000000000..915ed0ef4f
--- /dev/null
+++ b/platforms/arm_atsam/gpio.h
@@ -0,0 +1,77 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "stdint.h"
+#include "samd51j18a.h"
+
+#include "pin_defs.h"
+
+typedef uint8_t pin_t;
+
+#define SAMD_PORT(pin) ((pin & 0x20) >> 5)
+#define SAMD_PIN(pin) (pin & 0x1f)
+#define SAMD_PIN_MASK(pin) (1 << (pin & 0x1f))
+
+#define setPinInput(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \
+ PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define setPinInputHigh(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.PULLEN = 1; \
+ } while (0)
+
+#define setPinInputLow(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \
+ PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.PULLEN = 1; \
+ } while (0)
+
+#define setPinOutput(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].DIRSET.reg = SAMD_PIN_MASK(pin); \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define writePinHigh(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define writePinLow(pin) \
+ do { \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define writePin(pin, level) \
+ do { \
+ if (level) \
+ PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \
+ else \
+ PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+ } while (0)
+
+#define readPin(pin) ((PORT->Group[SAMD_PORT(pin)].IN.reg & SAMD_PIN_MASK(pin)) != 0)
+
+#define togglePin(pin) (PORT->Group[SAMD_PORT(pin)].OUTTGL.reg = SAMD_PIN_MASK(pin))
diff --git a/platforms/arm_atsam/pin_defs.h b/platforms/arm_atsam/pin_defs.h
new file mode 100644
index 0000000000..5b50b23910
--- /dev/null
+++ b/platforms/arm_atsam/pin_defs.h
@@ -0,0 +1,84 @@
+/* Copyright 2021 QM