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-rw-r--r--keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c268
-rw-r--r--keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h896
-rw-r--r--keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk5
-rw-r--r--keyboards/vinta/bootloader_defs.h7
4 files changed, 0 insertions, 1176 deletions
diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c
deleted file mode 100644
index 754dc5c4dd..0000000000
--- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#include "hal.h"
-#include "stm32_gpio.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of STM32 GPIO port setup.
- */
-typedef struct {
- uint32_t moder;
- uint32_t otyper;
- uint32_t ospeedr;
- uint32_t pupdr;
- uint32_t odr;
- uint32_t afrl;
- uint32_t afrh;
-} gpio_setup_t;
-
-/**
- * @brief Type of STM32 GPIO initialization data.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
- gpio_setup_t PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
- gpio_setup_t PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
- gpio_setup_t PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
- gpio_setup_t PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- gpio_setup_t PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- gpio_setup_t PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- gpio_setup_t PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
- gpio_setup_t PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
- gpio_setup_t PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
- gpio_setup_t PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
- gpio_setup_t PKData;
-#endif
-} gpio_config_t;
-
-/**
- * @brief STM32 GPIO static initialization data.
- */
-static const gpio_config_t gpio_default_config = {
-#if STM32_HAS_GPIOA
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
- VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
- VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
- VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
- VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
- VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
- {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
- VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
- {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
- VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
- VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
- {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
- VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
-#endif
-#if STM32_HAS_GPIOJ
- {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
- VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
-#endif
-#if STM32_HAS_GPIOK
- {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
- VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
-#endif
-};
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
-
- gpiop->OTYPER = config->otyper;
- gpiop->OSPEEDR = config->ospeedr;
- gpiop->PUPDR = config->pupdr;
- gpiop->ODR = config->odr;
- gpiop->AFRL = config->afrl;
- gpiop->AFRH = config->afrh;
- gpiop->MODER = config->moder;
-}
-
-static void stm32_gpio_init(void) {
-
- /* Enabling GPIO-related clocks, the mask comes from the
- registry header file.*/
- rccResetAHB(STM32_GPIO_EN_MASK);
- rccEnableAHB(STM32_GPIO_EN_MASK, true);
-
- /* Initializing all the defined GPIO ports.*/
-#if STM32_HAS_GPIOA
- gpio_init(GPIOA, &gpio_default_config.PAData);
-#endif
-#if STM32_HAS_GPIOB
- gpio_init(GPIOB, &gpio_default_config.PBData);
-#endif
-#if STM32_HAS_GPIOC
- gpio_init(GPIOC, &gpio_default_config.PCData);
-#endif
-#if STM32_HAS_GPIOD
- gpio_init(GPIOD, &gpio_default_config.PDData);
-#endif
-#if STM32_HAS_GPIOE
- gpio_init(GPIOE, &gpio_default_config.PEData);
-#endif
-#if STM32_HAS_GPIOF
- gpio_init(GPIOF, &gpio_default_config.PFData);
-#endif
-#if STM32_HAS_GPIOG
- gpio_init(GPIOG, &gpio_default_config.PGData);
-#endif
-#if STM32_HAS_GPIOH
- gpio_init(GPIOH, &gpio_default_config.PHData);
-#endif
-#if STM32_HAS_GPIOI
- gpio_init(GPIOI, &gpio_default_config.PIData);
-#endif
-#if STM32_HAS_GPIOJ
- gpio_init(GPIOJ, &gpio_default_config.PJData);
-#endif
-#if STM32_HAS_GPIOK
- gpio_init(GPIOK, &gpio_default_config.PKData);
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Early initialization code.
- * @details GPIO ports and system clocks are initialized before everything
- * else.
- */
-void __early_init(void) {
- extern void enter_bootloader_mode_if_requested(void);
- enter_bootloader_mode_if_requested();
-
- stm32_gpio_init();
- stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-
-}
diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h
deleted file mode 100644
index 241d566afa..0000000000
--- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h
+++ /dev/null
@@ -1,896 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-#ifndef _BOARD_H
-#define _BOARD_H
-
-/*
- * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_GENERIC_STM32_F042X6
-#define BOARD_NAME "Vinta PCB"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- * NOTE: HSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK 0U
-#endif
-
-#define STM32_LSEDRV (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK 0U
-#endif
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F042x6
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_PIN0 0U
-#define GPIOA_PIN1 1U
-#define GPIOA_PIN2 2U
-#define GPIOA_PIN3 3U
-#define GPIOA_PIN4 4U
-#define GPIOA_PIN5 5U
-#define GPIOA_PIN6 6U
-#define GPIOA_PIN7 7U
-#define GPIOA_PIN8 8U
-#define GPIOA_PIN9 9U
-#define GPIOA_PIN10 10U
-#define GPIOA_PIN11 11U
-#define GPIOA_PIN12 12U
-#define GPIOA_PIN13 13U
-#define GPIOA_PIN14 14U
-#define GPIOA_PIN15 15U
-
-#define GPIOB_PIN0 0U
-#define GPIOB_PIN1 1U
-#define GPIOB_PIN2 2U
-#define GPIOB_PIN3 3U
-#define GPIOB_PIN4 4U
-#define GPIOB_PIN5 5U
-#define GPIOB_PIN6 6U
-#define GPIOB_PIN7 7U
-#define GPIOB_PIN8 8U
-#define GPIOB_PIN9 9U
-#define GPIOB_PIN10 10U
-#define GPIOB_PIN11 11U
-#define GPIOB_PIN12 12U
-#define GPIOB_PIN13 13U
-#define GPIOB_PIN14 14U
-#define GPIOB_PIN15 15U
-
-#define GPIOC_PIN0 0U
-#define GPIOC_PIN1 1U
-#define GPIOC_PIN2 2U
-#define GPIOC_PIN3 3U
-#define GPIOC_PIN4 4U
-#define GPIOC_PIN5 5U
-#define GPIOC_PIN6 6U
-#define GPIOC_PIN7 7U
-#define GPIOC_PIN8 8U
-#define GPIOC_PIN9 9U
-#define GPIOC_PIN10 10U
-#define GPIOC_PIN11 11U
-#define GPIOC_PIN12 12U
-#define GPIOC_PIN13 13U
-#define GPIOC_PIN14 14U
-#define GPIOC_PIN15 15U
-
-#define GPIOD_PIN0 0U
-#define GPIOD_PIN1 1U
-#define GPIOD_PIN2 2U
-#define GPIOD_PIN3 3U
-#define GPIOD_PIN4 4U
-#define GPIOD_PIN5 5U
-#define GPIOD_PIN6 6U
-#define GPIOD_PIN7 7U
-#define GPIOD_PIN8 8U
-#define GPIOD_PIN9 9U
-#define GPIOD_PIN10 10U
-#define GPIOD_PIN11 11U
-#define GPIOD_PIN12 12U
-#define GPIOD_PIN13 13U
-#define GPIOD_PIN14 14U
-#define GPIOD_PIN15 15U
-
-#define GPIOE_PIN0 0U
-#define GPIOE_PIN1 1U
-#define GPIOE_PIN2 2U
-#define GPIOE_PIN3 3U
-#define GPIOE_PIN4 4U
-#define GPIOE_PIN5 5U
-#define GPIOE_PIN6 6U
-#define GPIOE_PIN7 7U
-#define GPIOE_PIN8 8U
-#define GPIOE_PIN9 9U
-#define GPIOE_PIN10 10U
-#define GPIOE_PIN11 11U
-#define GPIOE_PIN12 12U
-#define GPIOE_PIN13 13U
-#define GPIOE_PIN14 14U
-#define GPIOE_PIN15 15U
-
-#define GPIOF_PIN0 0U
-#define GPIOF_PIN1 1U
-#define GPIOF_PIN2 2U
-#define GPIOF_PIN3 3U
-#define GPIOF_PIN4 4U
-#define GPIOF_PIN5 5U
-#define GPIOF_PIN6 6U
-#define GPIOF_PIN7 7U
-#define GPIOF_PIN8 8U
-#define GPIOF_PIN9 9U
-#define GPIOF_PIN10 10U
-#define GPIOF_PIN11 11U
-#define GPIOF_PIN12 12U
-#define GPIOF_PIN13 13U
-#define GPIOF_PIN14 14U
-#define GPIOF_PIN15 15U
-
-/*
- * IO lines assignments.
- */
-
-#define LINE_BOOT0 PAL_LINE(GPIOB, 8U)
-#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
-#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n) (0U << (n))
-#define PIN_ODR_HIGH(n) (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
-#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
-#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
-#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
-#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0 - COL5
- * PA1 - COL4
- * PA2 - COL3
- * PA3 - COL2
- * PA4 - COL1
- * PA5 - COL0
- * PA6 - ROW4
- * PA7 - ROW3
- * PA8 - NC
- * PA9 - ROW1
- * PA10 - ROW0
- * PA11 - USB_DM
- * PA12 - USB_DP
- * PA13 - COL15/SWDIO (for now, COL15)
- * PA14 - COL14/SWCLK (for now, COL14)
- * PA15 - COL13
- */
-#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
- PIN_MODE_INPUT(GPIOA_PIN1) | \
- PIN_MODE_INPUT(GPIOA_PIN2) | \
- PIN_MODE_INPUT(GPIOA_PIN3) | \
- PIN_MODE_INPUT(GPIOA_PIN4) | \
- PIN_MODE_INPUT(GPIOA_PIN5) | \
- PIN_MODE_INPUT(GPIOA_PIN6) | \
- PIN_MODE_INPUT(GPIOA_PIN7) | \
- PIN_MODE_INPUT(GPIOA_PIN8) | \
- PIN_MODE_INPUT(GPIOA_PIN9) | \
- PIN_MODE_INPUT(GPIOA_PIN10) | \
- PIN_MODE_INPUT(GPIOA_PIN11) | \
- PIN_MODE_INPUT(GPIOA_PIN12) | \
- PIN_MODE_INPUT(GPIOA_PIN13) | \
- PIN_MODE_INPUT(GPIOA_PIN14) | \
- PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
- PIN_OSPEED_HIGH(GPIOA_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
- PIN_PUPDR_FLOATING(GPIOA_PIN11) | \
- PIN_PUPDR_FLOATING(GPIOA_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
- PIN_ODR_HIGH(GPIOA_PIN1) | \
- PIN_ODR_HIGH(GPIOA_PIN2) | \
- PIN_ODR_HIGH(GPIOA_PIN3) | \
- PIN_ODR_HIGH(GPIOA_PIN4) | \
- PIN_ODR_HIGH(GPIOA_PIN5) | \
- PIN_ODR_HIGH(GPIOA_PIN6) | \
- PIN_ODR_HIGH(GPIOA_PIN7) | \
- PIN_ODR_HIGH(GPIOA_PIN8) | \
- PIN_ODR_HIGH(GPIOA_PIN9) | \
- PIN_ODR_HIGH(GPIOA_PIN10) | \
- PIN_ODR_HIGH(GPIOA_PIN11) | \
- PIN_ODR_HIGH(GPIOA_PIN12) | \
- PIN_ODR_HIGH(GPIOA_PIN13) | \
- PIN_ODR_HIGH(GPIOA_PIN14) | \
- PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN7, 0U))
-#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN15, 0U))
-
-/*
- * GPIOB setup:
- *
- * PB0 - ROW2
- * PB1 - RGB_D
- * PB2 - PIN2 (input pullup).
- * PB3 - COL12
- * PB4 - COL11
- * PB5 - COL10
- * PB6 - COL9
- * PB7 - COL8
- * PB8 - BOOT0 (set as output for STM32F042)
- * PB9 - PIN9 (input pullup).
- * PB10 - PIN10 (input pullup).
- * PB11 - PIN11 (input pullup).
- * PB12 - PIN12 (input pullup).
- * PB13 - PIN13 (input pullup).
- * PB14 - PIN14 (input pullup).
- * PB15 - PIN15 (input pullup).
- */
-#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
- PIN_MODE_OUTPUT(GPIOB_PIN1) | \
- PIN_MODE_INPUT(GPIOB_PIN2) | \
- PIN_MODE_INPUT(GPIOB_PIN3) | \
- PIN_MODE_INPUT(GPIOB_PIN4) | \
- PIN_MODE_INPUT(GPIOB_PIN5) | \
- PIN_MODE_INPUT(GPIOB_PIN6) | \
- PIN_MODE_INPUT(GPIOB_PIN7) | \
- PIN_MODE_OUTPUT(GPIOB_PIN8) | \
- PIN_MODE_INPUT(GPIOB_PIN9) | \
- PIN_MODE_INPUT(GPIOB_PIN10) | \
- PIN_MODE_INPUT(GPIOB_PIN11) | \
- PIN_MODE_INPUT(GPIOB_PIN12) | \
- PIN_MODE_INPUT(GPIOB_PIN13) | \
- PIN_MODE_INPUT(GPIOB_PIN14) | \
- PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
- PIN_OSPEED_HIGH(GPIOB_PIN1) | \
- PIN_OSPEED_HIGH(GPIOB_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
- PIN_OSPEED_HIGH(GPIOB_PIN9) | \
- PIN_OSPEED_HIGH(GPIOB_PIN10) | \
- PIN_OSPEED_HIGH(GPIOB_PIN11) | \
- PIN_OSPEED_HIGH(GPIOB_PIN12) | \
- PIN_OSPEED_HIGH(GPIOB_PIN13) | \
- PIN_OSPEED_HIGH(GPIOB_PIN14) | \
- PIN_OSPEED_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
- PIN_PUPDR_FLOATING(GPIOB_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
- PIN_PUPDR_PULLDOWN(GPIOB_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
- PIN_ODR_HIGH(GPIOB_PIN1) | \
- PIN_ODR_HIGH(GPIOB_PIN2) | \
- PIN_ODR_HIGH(GPIOB_PIN3) | \
- PIN_ODR_HIGH(GPIOB_PIN4) | \
- PIN_ODR_HIGH(GPIOB_PIN5) | \
- PIN_ODR_HIGH(GPIOB_PIN6) | \
- PIN_ODR_HIGH(GPIOB_PIN7) | \
- PIN_ODR_HIGH(GPIOB_PIN8) | \
- PIN_ODR_HIGH(GPIOB_PIN9) | \
- PIN_ODR_HIGH(GPIOB_PIN10) | \
- PIN_ODR_HIGH(GPIOB_PIN11) | \
- PIN_ODR_HIGH(GPIOB_PIN12) | \
- PIN_ODR_HIGH(GPIOB_PIN13) | \
- PIN_ODR_HIGH(GPIOB_PIN14) | \
- PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN7, 0U))
-#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN15, 0U))
-
-/*
- * GPIOC setup:
- *
- * PC0 - PIN0 (input pullup).
- * PC1 - PIN1 (input pullup).
- * PC2 - PIN2 (input pullup).
- * PC3 - PIN3 (input pullup).
- * PC4 - PIN4 (input pullup).
- * PC5 - PIN5 (input pullup).
- * PC6 - PIN6 (input pullup).
- * PC7 - PIN7 (input pullup).
- * PC8 - PIN8 (input pullup).
- * PC9 - PIN9 (input pullup).
- * PC10 - PIN10 (input pullup).
- * PC11 - PIN11 (input pullup).
- * PC12 - PIN12 (input pullup).
- * PC13 - PIN13 (input pullup).
- * PC14 - PIN14 (input pullup).
- * PC15 - PIN15 (input pullup).
- */
-#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
- PIN_MODE_INPUT(GPIOC_PIN1) | \
- PIN_MODE_INPUT(GPIOC_PIN2) | \
- PIN_MODE_INPUT(GPIOC_PIN3) | \
- PIN_MODE_INPUT(GPIOC_PIN4) | \
- PIN_MODE_INPUT(GPIOC_PIN5) | \
- PIN_MODE_INPUT(GPIOC_PIN6) | \
- PIN_MODE_INPUT(GPIOC_PIN7) | \
- PIN_MODE_INPUT(GPIOC_PIN8) | \
- PIN_MODE_INPUT(GPIOC_PIN9) | \
- PIN_MODE_INPUT(GPIOC_PIN10) | \
- PIN_MODE_INPUT(GPIOC_PIN11) | \
- PIN_MODE_INPUT(GPIOC_PIN12) | \
- PIN_MODE_INPUT(GPIOC_PIN13) | \
- PIN_MODE_INPUT(GPIOC_PIN14) | \
- PIN_MODE_INPUT(GPIOC_PIN15))
-#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
-#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \
- PIN_OSPEED_HIGH(GPIOC_PIN1) | \
- PIN_OSPEED_HIGH(GPIOC_PIN2) | \
- PIN_OSPEED_HIGH(GPIOC_PIN3) | \
- PIN_OSPEED_HIGH(GPIOC_PIN4) | \
- PIN_OSPEED_HIGH(GPIOC_PIN5) | \
- PIN_OSPEED_HIGH(GPIOC_PIN6) | \
- PIN_OSPEED_HIGH(GPIOC_PIN7) | \
- PIN_OSPEED_HIGH(GPIOC_PIN8) | \
- PIN_OSPEED_HIGH(GPIOC_PIN9) | \
- PIN_OSPEED_HIGH(GPIOC_PIN10) | \
- PIN_OSPEED_HIGH(GPIOC_PIN11) | \
- PIN_OSPEED_HIGH(GPIOC_PIN12) | \
- PIN_OSPEED_HIGH(GPIOC_PIN13) | \
- PIN_OSPEED_HIGH(GPIOC_PIN14) | \
- PIN_OSPEED_HIGH(GPIOC_PIN15))
-#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN15))
-#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
- PIN_ODR_HIGH(GPIOC_PIN1) | \
- PIN_ODR_HIGH(GPIOC_PIN2) | \
- PIN_ODR_HIGH(GPIOC_PIN3) | \
- PIN_ODR_HIGH(GPIOC_PIN4) | \
- PIN_ODR_HIGH(GPIOC_PIN5) | \
- PIN_ODR_HIGH(GPIOC_PIN6) | \
- PIN_ODR_HIGH(GPIOC_PIN7) | \
- PIN_ODR_HIGH(GPIOC_PIN8) | \
- PIN_ODR_HIGH(GPIOC_PIN9) | \
- PIN_ODR_HIGH(GPIOC_PIN10) | \
- PIN_ODR_HIGH(GPIOC_PIN11) | \
- PIN_ODR_HIGH(GPIOC_PIN12) | \
- PIN_ODR_HIGH(GPIOC_PIN13) | \
- PIN_ODR_HIGH(GPIOC_PIN14) | \
- PIN_ODR_HIGH(GPIOC_PIN15))
-#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN7, 0U))
-#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN15, 0U))
-
-/*
- * GPIOD setup:
- *
- * PD0 - PIN0 (input pullup).
- * PD1 - PIN1 (input pullup).
- * PD2 - PIN2 (input pullup).
- * PD3 - PIN3 (input pullup).
- * PD4 - PIN4 (input pullup).
- * PD5 - PIN5 (input pullup).
- * PD6 - PIN6 (input pullup).
- * PD7 - PIN7