diff options
Diffstat (limited to 'keyboards/helix/local_drivers')
| -rw-r--r-- | keyboards/helix/local_drivers/i2c.c | 162 | ||||
| -rw-r--r-- | keyboards/helix/local_drivers/i2c.h | 49 | ||||
| -rw-r--r-- | keyboards/helix/local_drivers/serial.c | 590 | ||||
| -rw-r--r-- | keyboards/helix/local_drivers/serial.h | 89 | ||||
| -rw-r--r-- | keyboards/helix/local_drivers/ssd1306.c | 342 | ||||
| -rw-r--r-- | keyboards/helix/local_drivers/ssd1306.h | 93 |
6 files changed, 1325 insertions, 0 deletions
diff --git a/keyboards/helix/local_drivers/i2c.c b/keyboards/helix/local_drivers/i2c.c new file mode 100644 index 0000000000..4bee5c6398 --- /dev/null +++ b/keyboards/helix/local_drivers/i2c.c @@ -0,0 +1,162 @@ +#include <util/twi.h> +#include <avr/io.h> +#include <stdlib.h> +#include <avr/interrupt.h> +#include <util/twi.h> +#include <stdbool.h> +#include "i2c.h" + +#ifdef USE_I2C + +// Limits the amount of we wait for any one i2c transaction. +// Since were running SCL line 100kHz (=> 10μs/bit), and each transactions is +// 9 bits, a single transaction will take around 90μs to complete. +// +// (F_CPU/SCL_CLOCK) => # of μC cycles to transfer a bit +// poll loop takes at least 8 clock cycles to execute +#define I2C_LOOP_TIMEOUT (9+1)*(F_CPU/SCL_CLOCK)/8 + +#define BUFFER_POS_INC() (slave_buffer_pos = (slave_buffer_pos+1)%SLAVE_BUFFER_SIZE) + +volatile uint8_t i2c_slave_buffer[SLAVE_BUFFER_SIZE]; + +static volatile uint8_t slave_buffer_pos; +static volatile bool slave_has_register_set = false; + +// Wait for an i2c operation to finish +inline static +void i2c_delay(void) { + uint16_t lim = 0; + while(!(TWCR & (1<<TWINT)) && lim < I2C_LOOP_TIMEOUT) + lim++; + + // easier way, but will wait slightly longer + // _delay_us(100); +} + +// Setup twi to run at 100kHz or 400kHz (see ./i2c.h SCL_CLOCK) +void i2c_master_init(void) { + // no prescaler + TWSR = 0; + // Set TWI clock frequency to SCL_CLOCK. Need TWBR>10. + // Check datasheets for more info. + TWBR = ((F_CPU/SCL_CLOCK)-16)/2; +} + +// Start a transaction with the given i2c slave address. The direction of the +// transfer is set with I2C_READ and I2C_WRITE. +// returns: 0 => success +// 1 => error +uint8_t i2c_master_start(uint8_t address) { + TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTA); + + i2c_delay(); + + // check that we started successfully + if ( (TW_STATUS != TW_START) && (TW_STATUS != TW_REP_START)) + return 1; + + TWDR = address; + TWCR = (1<<TWINT) | (1<<TWEN); + + i2c_delay(); + + if ( (TW_STATUS != TW_MT_SLA_ACK) && (TW_STATUS != TW_MR_SLA_ACK) ) + return 1; // slave did not acknowledge + else + return 0; // success +} + + +// Finish the i2c transaction. +void i2c_master_stop(void) { + TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO); + + uint16_t lim = 0; + while(!(TWCR & (1<<TWSTO)) && lim < I2C_LOOP_TIMEOUT) + lim++; +} + +// Write one byte to the i2c slave. +// returns 0 => slave ACK +// 1 => slave NACK +uint8_t i2c_master_write(uint8_t data) { + TWDR = data; + TWCR = (1<<TWINT) | (1<<TWEN); + + i2c_delay(); + + // check if the slave acknowledged us + return (TW_STATUS == TW_MT_DATA_ACK) ? 0 : 1; +} + +// Read one byte from the i2c slave. If ack=1 the slave is acknowledged, +// if ack=0 the acknowledge bit is not set. +// returns: byte read from i2c device +uint8_t i2c_master_read(int ack) { + TWCR = (1<<TWINT) | (1<<TWEN) | (ack<<TWEA); + + i2c_delay(); + return TWDR; +} + +void i2c_reset_state(void) { + TWCR = 0; +} + +void i2c_slave_init(uint8_t address) { + TWAR = address << 0; // slave i2c address + // TWEN - twi enable + // TWEA - enable address acknowledgement + // TWINT - twi interrupt flag + // TWIE - enable the twi interrupt + TWCR = (1<<TWIE) | (1<<TWEA) | (1<<TWINT) | (1<<TWEN); +} + +ISR(TWI_vect); + +ISR(TWI_vect) { + uint8_t ack = 1; + switch(TW_STATUS) { + case TW_SR_SLA_ACK: + // this device has been addressed as a slave receiver + slave_has_register_set = false; + break; + + case TW_SR_DATA_ACK: + // this device has received data as a slave receiver + // The first byte that we receive in this transaction sets the location + // of the read/write location of the slaves memory that it exposes over + // i2c. After that, bytes will be written at slave_buffer_pos, incrementing + // slave_buffer_pos after each write. + if(!slave_has_register_set) { + slave_buffer_pos = TWDR; + // don't acknowledge the master if this memory loctaion is out of bounds + if ( slave_buffer_pos >= SLAVE_BUFFER_SIZE ) { + ack = 0; + slave_buffer_pos = 0; + } + slave_has_register_set = true; + } else { + i2c_slave_buffer[slave_buffer_pos] = TWDR; + BUFFER_POS_INC(); + } + break; + + case TW_ST_SLA_ACK: + case TW_ST_DATA_ACK: + // master has addressed this device as a slave transmitter and is + // requesting data. + TWDR = i2c_slave_buffer[slave_buffer_pos]; + BUFFER_POS_INC(); + break; + + case TW_BUS_ERROR: // something went wrong, reset twi state + TWCR = 0; + default: + break; + } + // Reset everything, so we are ready for the next TWI interrupt + TWCR |= (1<<TWIE) | (1<<TWINT) | (ack<<TWEA) | (1<<TWEN); +} +#endif diff --git a/keyboards/helix/local_drivers/i2c.h b/keyboards/helix/local_drivers/i2c.h new file mode 100644 index 0000000000..47cf6bd1b2 --- /dev/null +++ b/keyboards/helix/local_drivers/i2c.h @@ -0,0 +1,49 @@ +#ifndef I2C_H +#define I2C_H + +#include <stdint.h> + +#ifndef F_CPU +#define F_CPU 16000000UL +#endif + +#define I2C_READ 1 +#define I2C_WRITE 0 + +#define I2C_ACK 1 +#define I2C_NACK 0 + +#define SLAVE_BUFFER_SIZE 0x10 + +// i2c SCL clock frequency 400kHz +#define SCL_CLOCK 400000L + +extern volatile uint8_t i2c_slave_buffer[SLAVE_BUFFER_SIZE]; + +void i2c_master_init(void); +uint8_t i2c_master_start(uint8_t address); +void i2c_master_stop(void); +uint8_t i2c_master_write(uint8_t data); +uint8_t i2c_master_read(int); +void i2c_reset_state(void); +void i2c_slave_init(uint8_t address); + + +static inline unsigned char i2c_start_read(unsigned char addr) { + return i2c_master_start((addr << 1) | I2C_READ); +} + +static inline unsigned char i2c_start_write(unsigned char addr) { + return i2c_master_start((addr << 1) | I2C_WRITE); +} + +// from SSD1306 scrips +extern unsigned char i2c_rep_start(unsigned char addr); +extern void i2c_start_wait(unsigned char addr); +extern unsigned char i2c_readAck(void); +extern unsigned char i2c_readNak(void); +extern unsigned char i2c_read(unsigned char ack); + +#define i2c_read(ack) (ack) ? i2c_readAck() : i2c_readNak(); + +#endif diff --git a/keyboards/helix/local_drivers/serial.c b/keyboards/helix/local_drivers/serial.c new file mode 100644 index 0000000000..6006ebf1bd --- /dev/null +++ b/keyboards/helix/local_drivers/serial.c @@ -0,0 +1,590 @@ +/* + * WARNING: be careful changing this code, it is very timing dependent + * + * 2018-10-28 checked + * avr-gcc 4.9.2 + * avr-gcc 5.4.0 + * avr-gcc 7.3.0 + */ + +#ifndef F_CPU +#define F_CPU 16000000 +#endif + +#include <avr/io.h> +#include <avr/interrupt.h> +#include <util/delay.h> +#include <stddef.h> +#include <stdbool.h> +#include "serial.h" +//#include <pro_micro.h> + +#ifdef SOFT_SERIAL_PIN + +#ifdef __AVR_ATmega32U4__ + // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial. + #ifdef USE_I2C + #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1 + #error Using ATmega32U4 I2C, so can not use PD0, PD1 + #endif + #endif + + #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3 + #define SERIAL_PIN_DDR DDRD + #define SERIAL_PIN_PORT PORTD + #define SERIAL_PIN_INPUT PIND + #if SOFT_SERIAL_PIN == D0 + #define SERIAL_PIN_MASK _BV(PD0) + #define EIMSK_BIT _BV(INT0) + #define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01))) + #define SERIAL_PIN_INTERRUPT INT0_vect + #elif SOFT_SERIAL_PIN == D1 + #define SERIAL_PIN_MASK _BV(PD1) + #define EIMSK_BIT _BV(INT1) + #define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11))) + #define SERIAL_PIN_INTERRUPT INT1_vect + #elif SOFT_SERIAL_PIN == D2 + #define SERIAL_PIN_MASK _BV(PD2) + #define EIMSK_BIT _BV(INT2) + #define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21))) + #define SERIAL_PIN_INTERRUPT INT2_vect + #elif SOFT_SERIAL_PIN == D3 + #define SERIAL_PIN_MASK _BV(PD3) + #define EIMSK_BIT _BV(INT3) + #define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31))) + #define SERIAL_PIN_INTERRUPT INT3_vect + #endif + #elif SOFT_SERIAL_PIN == E6 + #define SERIAL_PIN_DDR DDRE + #define SERIAL_PIN_PORT PORTE + #define SERIAL_PIN_INPUT PINE + #define SERIAL_PIN_MASK _BV(PE6) + #define EIMSK_BIT _BV(INT6) + #define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61))) + #define SERIAL_PIN_INTERRUPT INT6_vect + #else + #error invalid SOFT_SERIAL_PIN value + #endif + +#else + #error serial.c now support ATmega32U4 only +#endif + +//////////////// for backward compatibility //////////////////////////////// +#if !defined(SERIAL_USE_SINGLE_TRANSACTION) && !defined(SERIAL_USE_MULTI_TRANSACTION) +/* --- USE OLD API (compatible with let's split serial.c) */ + #if SERIAL_SLAVE_BUFFER_LENGTH > 0 + uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0}; + #endif + #if SERIAL_MASTER_BUFFER_LENGTH > 0 + uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0}; + #endif + uint8_t volatile status0 = 0; + +SSTD_t transactions[] = { + { (uint8_t *)&status0, + #if SERIAL_MASTER_BUFFER_LENGTH > 0 + sizeof(serial_master_buffer), (uint8_t *)serial_master_buffer, + #else + 0, (uint8_t *)NULL, + #endif + #if SERIAL_SLAVE_BUFFER_LENGTH > 0 + sizeof(serial_slave_buffer), (uint8_t *)serial_slave_buffer + #else + 0, (uint8_t *)NULL, + #endif + } +}; + +void serial_master_init(void) +{ soft_serial_initiator_init(transactions, TID_LIMIT(transactions)); } + +void serial_slave_init(void) +{ soft_serial_target_init(transactions, TID_LIMIT(transactions)); } + +// 0 => no error +// 1 => slave did not respond +// 2 => checksum error +int serial_update_buffers() +{ + int result; + result = soft_serial_transaction(); + return result; +} + +#endif // end of OLD API (compatible with let's split serial.c) +//////////////////////////////////////////////////////////////////////////// + +#define ALWAYS_INLINE __attribute__((always_inline)) +#define NO_INLINE __attribute__((noinline)) +#define _delay_sub_us(x) __builtin_avr_delay_cycles(x) + +// parity check +#define ODD_PARITY 1 +#define EVEN_PARITY 0 +#define PARITY EVEN_PARITY + +#ifdef SERIAL_DELAY + // custom setup in config.h + // #define TID_SEND_ADJUST 2 + // #define SERIAL_DELAY 6 // micro sec + // #define READ_WRITE_START_ADJUST 30 // cycles + // #define READ_WRITE_WIDTH_ADJUST 8 // cycles +#else +// ============ Standard setups ============ + +#ifndef SELECT_SOFT_SERIAL_SPEED +#define SELECT_SOFT_SERIAL_SPEED 1 +// 0: about 189kbps +// 1: about 137kbps (default) +// 2: about 75kbps +// 3: about 39kbps +// 4: about 26kbps +// 5: about 20kbps +#endif + +#if __GNUC__ < 6 + #define TID_SEND_ADJUST 14 +#else + #define TID_SEND_ADJUST 2 +#endif + +#if SELECT_SOFT_SERIAL_SPEED == 0 + // Very High speed + #define SERIAL_DELAY 4 // micro sec + #if __GNUC__ < 6 + #define READ_WRITE_START_ADJUST 33 // cycles + #define READ_WRITE_WIDTH_ADJUST 3 // cycles + #else + #define READ_WRITE_START_ADJUST 34 // cycles + #define READ_WRITE_WIDTH_ADJUST 7 // cycles + #endif +#elif SELECT_SOFT_SERIAL_SPEED == 1 + // High speed + #define SERIAL_DELAY 6 // micro sec + #if __GNUC__ < 6 + #define READ_WRITE_START_ADJUST 30 // cycles + #define READ_WRITE_WIDTH_ADJUST 3 // cycles + #else + #define READ_WRITE_START_ADJUST 33 // cycles + #define READ_WRITE_WIDTH_ADJUST 7 // cycles + #endif +#elif SELECT_SOFT_SERIAL_SPEED == 2 + // Middle speed + #define SERIAL_DELAY 12 // micro sec + #define READ_WRITE_START_ADJUST 30 // cycles + #if __GNUC__ < 6 + #define READ_WRITE_WIDTH_ADJUST 3 // cycles + #else + #define READ_WRITE_WIDTH_ADJUST 7 // cycles + #endif +#elif SELECT_SOFT_SERIAL_SPEED == 3 + // Low speed + #define SERIAL_DELAY 24 // micro sec + #define READ_WRITE_START_ADJUST 30 // cycles + #if __GNUC__ < 6 + #define READ_WRITE_WIDTH_ADJUST 3 // cycles + #else + #define READ_WRITE_WIDTH_ADJUST 7 // cycles + #endif +#elif SELECT_SOFT_SERIAL_SPEED == 4 + // Very Low speed + #define SERIAL_DELAY 36 // micro sec + #define READ_WRITE_START_ADJUST 30 // cycles + #if __GNUC__ < 6 + #define READ_WRITE_WIDTH_ADJUST 3 // cycles + #else + #define READ_WRITE_WIDTH_ADJUST 7 // cycles + #endif +#elif SELECT_SOFT_SERIAL_SPEED == 5 + // Ultra Low speed + #define SERIAL_DELAY 48 // micro sec + #define READ_WRITE_START_ADJUST 30 // cycles + #if __GNUC__ < 6 + #define READ_WRITE_WIDTH_ADJUST 3 // cycles + #else + #define READ_WRITE_WIDTH_ADJUST 7 // cycles + #endif +#else +#error invalid SELECT_SOFT_SERIAL_SPEED value +#endif /* SELECT_SOFT_SERIAL_SPEED */ +#endif /* SERIAL_DELAY */ + +#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2) +#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2) + +#define SLAVE_INT_WIDTH_US 1 +#ifndef SERIAL_USE_MULTI_TRANSACTION + #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY +#else + #define SLAVE_INT_ACK_WIDTH_UNIT 2 + #define SLAVE_INT_ACK_WIDTH 4 +#endif + +static SSTD_t *Transaction_table = NULL; +static uint8_t Transaction_table_size = 0; + +inline static void serial_delay(void) ALWAYS_INLINE; +inline static +void serial_delay(void) { + _delay_us(SERIAL_DELAY); +} + +inline static void serial_delay_half1(void) ALWAYS_INLINE; +inline static +void serial_delay_half1(void) { + _delay_us(SERIAL_DELAY_HALF1); +} + +inline static void serial_delay_half2(void) ALWAYS_INLINE; +inline static +void serial_delay_half2(void) { + _delay_us(SERIAL_DELAY_HALF2); +} + +inline static void serial_output(void) ALWAYS_INLINE; +inline static +void serial_output(void) { + SERIAL_PIN_DDR |= SERIAL_PIN_MASK; +} + +// make the serial pin an input with pull-up resistor +inline static void serial_input_with_pullup(void) ALWAYS_INLINE; +inline static +void serial_input_with_pullup(void) { + SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK; + SERIAL_PIN_PORT |= SERIAL_PIN_MASK; +} + +inline static uint8_t serial_read_pin(void) ALWAYS_INLINE; +inline static +uint8_t serial_read_pin(void) { + return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK); +} + +inline static void serial_low(void) ALWAYS_INLINE; +inline static +void serial_low(void) { + SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK; +} + +inline static void serial_high(void) ALWAYS_INLINE; +inline static +void serial_high(void) { + SERIAL_PIN_PORT |= SERIAL_PIN_MASK; +} + +void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size) +{ + Transaction_table = sstd_table; + Transaction_table_size = (uint8_t)sstd_table_size; + serial_output(); + serial_high(); +} + +void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size) +{ + Transaction_table = sstd_table; + Transaction_table_size = (uint8_t)sstd_table_size; + serial_input_with_pullup(); + + // Enable INT0-INT3,INT6 + EIMSK |= EIMSK_BIT; +#if SERIAL_PIN_MASK == _BV(PE6) + // Trigger on falling edge of INT6 + EICRB &= EICRx_BIT; +#else + // Trigger on falling edge of INT0-INT3 + EICRA &= EICRx_BIT; +#endif +} + +// Used by the sender to synchronize timing with the reciver. +static void sync_recv(void) NO_INLINE; +static +void sync_recv(void) { + for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) { + } + // This shouldn't hang if the target disconnects because the + // serial line will float to high if the target does disconnect. + while (!serial_read_pin()); +} + +// Used by the reciver to send a synchronization signal to the sender. +static void sync_send(void) NO_INLINE; +static +void sync_send(void) { + serial_low(); + serial_delay(); + serial_high(); +} + +// Reads a byte from the serial line +static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE; +static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) { + uint8_t byte, i, p, pb; + + _delay_sub_us(READ_WRITE_START_ADJUST); + for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) { + serial_delay_half1(); // read the middle of pulses + if( serial_read_pin() ) { + byte = (byte << 1) | 1; p ^= 1; + } else { + byte = (byte << 1) | 0; p ^= 0; + } + _delay_sub_us(READ_WRITE_WIDTH_ADJUST); + serial_delay_half2(); + } + /* recive parity bit */ + serial_delay_half1(); // read the middle of pulses + pb = serial_read_pin(); + _delay_sub_us(READ_WRITE_WIDTH_ADJUST); + serial_delay_half2(); + + *pterrcount += (p != pb)? 1 : 0; + + return byte; +} + +// Sends a byte with MSB ordering +void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE; +void serial_write_chunk(uint8_t data, uint8_t bit) { + uint8_t b, p; + for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) { + if(data & b) { + serial_high(); p ^= 1; + } else { + serial_low(); p ^= 0; + } + serial_delay(); + } + /* send parity bit */ + if(p & 1) { serial_high(); } + else { serial_low(); } + serial_delay(); + + serial_low(); // sync_send() / senc_recv() need raise edge +} + +static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE; +static +void serial_send_packet(uint8_t *buffer, uint8_t size) { + for (uint8_t i = 0; i < size; ++i) { + uint8_t data; + data = buffer[i]; + sync_send(); + serial_write_chunk(data,8); + } +} + +static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE; +static +uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) { + uint8_t pecount = 0; + for (uint8_t i = 0; i < size; ++i) { + uint8_t data; + sync_recv(); + data = serial_read_chunk(&pecount, 8); + buffer[i] = data; + } + return pecount == 0; +} + +inline static +void change_sender2reciver(void) { + sync_send(); //0 + serial_delay_half1(); //1 + serial_low(); //2 + serial_input_with_pullup(); //2 + serial_delay_half1(); //3 +} + +inline static +void change_reciver2sender(void) { + sync_recv(); //0 + serial_delay(); //1 + serial_low(); //3 + serial_output(); //3 + serial_delay_half1(); //4 +} + +static inline uint8_t nibble_bits_count(uint8_t bits) +{ + bits = (bits & 0x5) + (bits >> 1 & 0x5); + bits = (bits & 0x3) + (bits >> 2 & 0x3); + return bits; +} + +// interrupt handle to be used by the target device +ISR(SERIAL_PIN_INTERRUPT) { + +#ifndef SERIAL_USE_MULTI_TRANSACTION + serial_low(); + serial_output(); + SSTD_t *trans = Transaction_table; +#else + // recive transaction table index + uint8_t tid, bits; + uint8_t pecount = 0; + sync_recv(); + bits = serial_read_chunk(&pecount,7); + tid = bits>>3; + bits = (bits&7) != nibble_bits_count(tid); + if( bits || pecount> 0 || tid > Transaction_table_size ) { + return; + } + serial_delay_half1(); + + serial_high(); // response step1 low->high + serial_output(); + _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH); + SSTD_t *trans = &Transaction_table[tid]; + serial_low(); // response step2 ack high->low +#endif + + // target send phase + if( trans->target2initiator_buffer_size > 0 ) + serial_send_packet((uint8_t *)trans->target2initiator_buffer, + trans->target2initiator_buffer_size); + // target switch to input + change_sender2reciver(); + + // target recive phase + if( trans->initiator2target_buffer_size > 0 ) { + if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer, + trans->initiator2target_buffer_size) ) { + *trans->status = TRANSACTION_ACCEPTED; + } else { + *trans->status = TRANSACTION_DATA_ERROR; + } + } else { + *trans->status = TRANSACTION_ACCEPTED; + } + + sync_recv(); //weit initiator output to high +} + +///////// +// start transaction by initiator +// +// int soft_serial_transaction(int sstd_index) +// +// Returns: +// TRANSACTION_END +// TRANSACTION_NO_RESPONSE +// TRANSACTION_DATA_ERROR +// this code is very time dependent, so we need to disable interrupts +#ifndef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_transaction(void) { + SSTD_t *trans = Transaction_table; +#else +int soft_serial_transaction(int sstd_index) { + if( sstd_index > Transaction_table_size ) + return TRANSACTION_TYPE_ERROR; + SSTD_t *trans = &Transaction_table[sstd_index]; +#endif + cli(); + + // signal to the target that we want to start a transaction + serial_output(); + serial_low(); + _delay_us(SLAVE_INT_WIDTH_US); + +#ifndef SERIAL_USE_MULTI_TRANSACTION + // wait for the target response + serial_input_with_pullup(); + _delay_us(SLAVE_INT_RESPONSE_TIME); + + // check if the target is present + if (serial_read_pin()) { + // target failed to pull the line low, assume not present + serial_output(); + serial_high(); + *trans->status = TRANSACTION_NO_RESPONSE; + sei(); + return TRANSACTION_NO_RESPONSE; + } + +#else + // send transaction table index + int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index)); + sync_send(); + _delay_sub_us(TID_SEND_ADJUST); + serial_write_chunk(tid, 7); + serial_delay_half1(); + + // wait for the target response (step1 low->high) + serial_input_with_pullup(); + while( !serial_read_pin() ) { + _delay_sub_us(2); + } + + // check if the target is present (step2 high->low) + for( int i = 0; serial_read_pin(); i++ ) { + if (i > SLAVE_INT_ACK_WIDTH + 1) { + // slave failed to pull the line low, assume not present + serial_output(); + serial_high(); + *trans->status = TRANSACTION_NO_RESPONSE; + sei(); + return TRANSACTION_NO_RESPONSE; + } + _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT); + } +#endif + + // initiator recive phase + // if the target is present syncronize with it + if( trans->target2initiator_buffer_size > 0 ) { + if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer, + trans->target2initiator_buffer_size) ) { + serial_output(); + serial_high(); + *trans->status = TRANSACTION_DATA_ERROR; + sei(); + return TRANSACTION_DATA_ERROR; + } + } + + // initiator switch to output + change_reciver2sender(); + + // initiator send phase + if( trans->initiator2target_buffer_size > 0 ) { + serial_send_packet((uint8_t *)trans->initiator2target_buffer, + trans->initiator2target_buffer_size); + } + + // always, release the line when not in use + sync_send(); + + *trans->status = TRANSACTION_END; + sei(); + return TRANSACTION_END; +} + +#ifdef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_get_and_clean_status(int sstd_index) { + SSTD_t *trans = &Transaction_table[sstd_index]; + cli(); + int retval = *trans->status; + *trans->status = 0;; + sei(); + return retval; +} +#endif + +#endif + +// Helix serial.c history +// 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc) +// 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4) +// (adjusted with avr-gcc 4.9.2) +// 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78) +// (adjusted with avr-gcc 4.9.2) +// 2018-8-11 add support multi-type transaction (#3608, feb5e4aae) +// (adjusted with avr-gcc 4.9.2) +// 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff) +// (adjusted with avr-gcc 7.3.0) +// 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66) +// (adjusted with avr-gcc 5.4.0, 7.3.0) diff --git a/keyboards/helix/local_drivers/serial.h b/keyboards/helix/local_drivers/serial.h new file mode 100644 index 0000000000..2e53928df2 --- /dev/null +++ b/keyboards/helix/local_drivers/serial.h @@ -0,0 +1,89 @@ +#ifndef SOFT_SERIAL_H +#define SOFT_SERIAL_H + +#include <stdbool.h> + +// ///////////////////////////////////////////////////////////////// +// Need Soft Serial defines in config.h +// ///////////////////////////////////////////////////////////////// +// ex. +// #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6 +// OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5 +// // 1: about 137kbps (default) +// // 2: about 75kbps +// // 3: about 39kbps +// // 4: about 26kbps +// // 5: about 20kbps +// +// //// USE OLD API (compatible with let's split serial.c) +// ex. +// #define SERIAL_SLAVE_BUFFER_LENGTH MATRIX_ROWS/2 +// #define SERIAL_MASTER_BUFFER_LENGTH 1 +// +// //// USE NEW API +// //// USE simple API (using signle-type transaction function) +// #define SERIAL_USE_SINGLE_TRANSACTION +// //// USE flexible API (using multi-type transaction function) +// #define SERIAL_USE_MULTI_TRANSACTION +// +// ///////////////////////////////////////////////////////////////// + + +//////////////// for backward compatibility //////////////////////////////// +#if !defined(SERIAL_USE_SINGLE_TRANSACTION) && !defined(SERIAL_USE_MULTI_TRANSACTION) +/* --- USE OLD API (compatible with let's split serial.c) */ + #if SERIAL_SLAVE_BUFFER_LENGTH > 0 + extern volatile uint8_t serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH]; + #endif + #if SERIAL_MASTER_BUFFER_LENGTH > 0 + extern volatile uint8_t serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH]; + #endif + + void serial_master_init(void); + void serial_slave_init(void); + int serial_update_buffers(void); + +#endif // end of USE OLD API +//////////////////////////////////////////////////////////////////////////// + +// Soft Serial Transaction Descriptor +typedef struct _SSTD_t { + uint8_t *status; + uint8_t initiator2target_buffer_size; + uint8_t *initiator2target_buffer; + uint8_t target2initiator_buffer_size; + uint8_t *target2initiator_buffer; +} SSTD_t; +#define TID_LIMIT( table ) (sizeof(table) / sizeof(SSTD_t)) + +// initiator is transaction start side +void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size); +// target is interrupt accept side +void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size); + +// initiator resullt +#define TRANSACTION_END 0 +#define TRANSACTION_NO_RESPONSE 0x1 +#define TRANSACTION_DATA_ERROR 0x2 +#define TRANSACTION_TYPE_ERROR 0x4 +#ifndef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_transaction(void); +#else +int soft_serial_transaction(int sstd_index); +#endif + +// target status +// *SSTD_t.status has +// initiator: +// TRANSACTION_END +// or TRANSACTION_NO_RESPONSE +// or TRANSACTION_DATA_ERROR +// target: +// TRANSACTION_DATA_ERROR +// or TRANSACTION_ACCEPTED +#define TRANSACTION_ACCEPTED 0x8 +#ifdef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_get_and_clean_status(int sstd_index); +#endif + +#endif /* SOFT_SERIAL_H */ diff --git a/keyboards/helix/local_drivers/ssd1306.c b/keyboards/helix/local_drivers/ssd1306.c new file mode 100644 index 0000000000..dd3290ba0c --- /dev/null +++ b/keyboards/helix/local_drivers/ssd1306.c @@ -0,0 +1,342 @@ + +#ifdef SSD1306OLED + +#include "ssd1306.h" +#include "i2c.h" +#include <string.h> +#include "print.h" +#ifndef LOCAL_GLCDFONT +#include "common/glcdfont.c" +#else +#include <helixfont.h> +#endif +#ifdef ADAFRUIT_BLE_ENABLE +#include "adafruit_ble.h" +#endif +#ifdef PROTOCOL_LUFA +#include "lufa.h" +#endif +#include "sendchar.h" +#include "timer.h" + +// Set this to 1 to help diagnose early startup problems +// when testing power-on with ble. Turn it off otherwise, +// as the latency of printing most of the debug info messes +// with the matrix scan, causing keys to drop. +#define DEBUG_TO_SCREEN 0 + +//static uint16_t last_battery_update; +//static uint32_t vbat; +//#define BatteryUpdateInterval 10000 /* milliseconds */ + +// 'last_flush' is declared as uint16_t, +// so this must be less than 65535 +#define ScreenOffInterval 60000 /* milliseconds */ +#if DEBUG_TO_SCREEN +static uint8_t displaying; +#endif +static uint16_t last_flush; + +static bool force_dirty = true; + +// Write command sequence. +// Returns true on success. +static inline bool _send_cmd1(uint8_t cmd) { + bool res = false; + + if (i2c_start_write(SSD1306_ADDRESS)) { + xprintf("failed to start write to %d\n", SSD1306_ADDRESS); + goto done; + } + + if (i2c_master_write(0x0 /* command byte follows */)) { + print("failed to write control byte\n"); + + goto done; + } + + if (i2c_master_write(cmd)) { + xprintf("failed to write command %d\n", cmd); + goto done; + } + res = true; +done: + i2c_master_stop(); + return res; +} + +// Write 2-byte command sequence. +// Returns true on success +static inline bool _send_cmd2(uint8_t cmd, uint8_t opr) { + if (!_send_cmd1(cmd)) { + return false; + } + return _send_cmd1(opr); +} + +// Write 3-byte command sequence. +// Returns true on success +static inline bool _send_cmd3(uint8_t cmd, uint8_t opr1, uint8_t opr2) { + if (!_send_cmd1(cmd)) { + return false; + } + if (!_send_cmd1(opr1)) { + return false; + } + return _send_cmd1(opr2); +} + +#define send_cmd1(c) if (!_send_cmd1(c)) {goto done;} +#define send_cmd2(c,o) if (!_send_cmd2(c,o)) {goto done;} +#define send_cmd3(c,o1,o2) if (!_send_cmd3(c,o1,o2)) {goto done;} + +static void clear_display(void) { + matrix_clear(&display); + + // Clear all of the display bits (there can be random noise + // in the RAM on startup) + send_cmd3(PageAddr, 0, (DisplayHeight / 8) - 1); + send_cmd3(ColumnAddr, 0, DisplayWidth - 1); + + if (i2c_start_write(SSD1306_ADDRESS)) { + goto done; + } + if (i2c_master_write(0x40)) { + // Data mode + goto done; + } + for (uint8_t row = 0; row < MatrixRows; ++row) { + for (uint8_t col = 0; col < DisplayWidth; ++col) { + i2c_master_write(0); + } + } + + display.dirty = false; + +done: + i2c_master_stop(); +} + +#if DEBUG_TO_SCREEN +#undef sendchar +static int8_t capture_sendchar(uint8_t c) { + sendchar(c); + iota_gfx_write_char(c); + + if (!displaying) { + iota_gfx_flush(); + } + return 0; +} +#endif + +bool iota_gfx_init(bool rotate) { + bool success = false; + + i2c_master_init(); + send_cmd1(DisplayOff); + send_cmd2(SetDisplayClockDiv, 0x80); + send_cmd2(SetMultiPlex, DisplayHeight - 1); + + send_cmd2(SetDisplayOffset, 0); + + + send_cmd1(SetStartLine | 0x0); + send_cmd2(SetChargePump, 0x14 /* Enable */); + send_cmd2(SetMemoryMode, 0 /* horizontal addressing */); + + if(rotate){ + // the following Flip the display orientation 180 degrees + send_cmd1(SegRemap); + send_cmd1(ComScanInc); + }else{ + // Flips the display orientation 0 degrees + send_cmd1(SegRemap | 0x1); + send_cmd1(ComScanDec); + } + + send_cmd2(SetComPins, 0x2); + send_cmd2(SetContrast, 0x8f); + send_cmd2(SetPreCharge, 0xf1); + send_cmd2(SetVComDetect, 0x40); + send_cmd1(DisplayAllOnResume); + send_cmd1(NormalDisplay); + send_cmd1(DeActivateScroll); + send_cmd1(DisplayOn); + + send_cmd2(SetContrast, 0); // Dim + + clear_display(); + + success = true; + + iota_gfx_flush(); + +#if DEBUG_TO_SCREEN + print_set_sendchar(capture_sendchar); +#endif + +done: + return success; +} + +bool iota_gfx_off(void) { + bool success = false; + + send_cmd1(DisplayOff); + success = true; + +done: + return success; +} + +bool iota_gfx_on(void) { + bool success = false; + + send_cmd1(DisplayOn); + success = true; + +done: + return success; +} + +void matrix_write_char_inner(struct CharacterMatrix *matrix, uint8_t c) { + *matrix->cursor = c; + ++matrix->cursor; + + if (matrix->cursor - &matrix->display[0][0] == sizeof(matrix->display)) { + // We went off the end; scroll the display upwards by one line + memmove(&matrix->display[0], &matrix->display[1], + MatrixCols * (MatrixRows - 1)); + matrix->cursor = &matrix->display[MatrixRows - 1][0]; |