diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/avr/apa102.c | 2 | ||||
| -rw-r--r-- | drivers/avr/i2c_master.c | 2 | ||||
| -rw-r--r-- | drivers/avr/i2c_master.h | 2 | ||||
| -rw-r--r-- | drivers/avr/i2c_slave.c | 2 | ||||
| -rw-r--r-- | drivers/avr/i2c_slave.h | 2 | ||||
| -rw-r--r-- | drivers/chibios/serial.c | 290 | ||||
| -rw-r--r-- | drivers/chibios/serial.h | 62 | ||||
| -rw-r--r-- | drivers/chibios/serial_usart.c | 234 | ||||
| -rw-r--r-- | drivers/eeprom/eeprom_driver.c | 6 | ||||
| -rw-r--r-- | drivers/eeprom/eeprom_i2c.c | 39 | ||||
| -rw-r--r-- | drivers/eeprom/eeprom_spi.c | 232 | ||||
| -rw-r--r-- | drivers/eeprom/eeprom_spi.h | 80 | ||||
| -rw-r--r-- | drivers/issi/is31fl3731.c | 2 | ||||
| -rw-r--r-- | drivers/oled/oled_driver.c | 2 |
14 files changed, 932 insertions, 25 deletions
diff --git a/drivers/avr/apa102.c b/drivers/avr/apa102.c index b174b39b8f..740acb5739 100644 --- a/drivers/avr/apa102.c +++ b/drivers/avr/apa102.c @@ -2,7 +2,7 @@ * APA102 lib V1.0a * * Controls APA102 RGB-LEDs - * Author: Mikkel (Duckle29 on github) + * Author: Mikkel (Duckle29 on GitHub) * * Dec 22th, 2017 v1.0a Initial Version * diff --git a/drivers/avr/i2c_master.c b/drivers/avr/i2c_master.c index c084d5754f..b1e4885298 100644 --- a/drivers/avr/i2c_master.c +++ b/drivers/avr/i2c_master.c @@ -14,7 +14,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. */ /* Library made by: g4lvanix - * Github repository: https://github.com/g4lvanix/I2C-master-lib + * GitHub repository: https://github.com/g4lvanix/I2C-master-lib */ #include <avr/io.h> diff --git a/drivers/avr/i2c_master.h b/drivers/avr/i2c_master.h index 0a3b6c508c..4a35867cd0 100644 --- a/drivers/avr/i2c_master.h +++ b/drivers/avr/i2c_master.h @@ -14,7 +14,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. */ /* Library made by: g4lvanix - * Github repository: https://github.com/g4lvanix/I2C-master-lib + * GitHub repository: https://github.com/g4lvanix/I2C-master-lib */ #ifndef I2C_MASTER_H diff --git a/drivers/avr/i2c_slave.c b/drivers/avr/i2c_slave.c index 3fb684f70a..62a378165a 100644 --- a/drivers/avr/i2c_slave.c +++ b/drivers/avr/i2c_slave.c @@ -14,7 +14,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. */ /* Library made by: g4lvanix - * Github repository: https://github.com/g4lvanix/I2C-slave-lib + * GitHub repository: https://github.com/g4lvanix/I2C-slave-lib */ #include <avr/io.h> diff --git a/drivers/avr/i2c_slave.h b/drivers/avr/i2c_slave.h index 5ed0b11a8e..5d92150e65 100644 --- a/drivers/avr/i2c_slave.h +++ b/drivers/avr/i2c_slave.h @@ -14,7 +14,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. */ /* Library made by: g4lvanix - * Github repository: https://github.com/g4lvanix/I2C-slave-lib + * GitHub repository: https://github.com/g4lvanix/I2C-slave-lib Info: Inititate the library by giving the required address. Read or write to the necessary buffer according to the opperation. diff --git a/drivers/chibios/serial.c b/drivers/chibios/serial.c new file mode 100644 index 0000000000..26c6806532 --- /dev/null +++ b/drivers/chibios/serial.c @@ -0,0 +1,290 @@ +/* + * WARNING: be careful changing this code, it is very timing dependent + */ + +#include "quantum.h" +#include "serial.h" +#include "wait.h" + +#include "hal.h" + +// TODO: resolve/remove build warnings +#if defined(RGBLIGHT_ENABLE) && defined(RGBLED_SPLIT) && defined(PROTOCOL_CHIBIOS) && defined(WS2812_DRIVER_BITBANG) +# warning "RGBLED_SPLIT not supported with bitbang WS2812 driver" +#endif + +// default wait implementation cannot be called within interrupt +// this method seems to be more accurate than GPT timers +#if PORT_SUPPORTS_RT == FALSE +# error "chSysPolledDelayX method not supported on this platform" +#else +# undef wait_us +# define wait_us(x) chSysPolledDelayX(US2RTC(STM32_SYSCLK, x)) +#endif + +#ifndef SELECT_SOFT_SERIAL_SPEED +# define SELECT_SOFT_SERIAL_SPEED 1 +// TODO: correct speeds... +// 0: about 189kbps (Experimental only) +// 1: about 137kbps (default) +// 2: about 75kbps +// 3: about 39kbps +// 4: about 26kbps +// 5: about 20kbps +#endif + +// Serial pulse period in microseconds. At the moment, going lower than 12 causes communication failure +#if SELECT_SOFT_SERIAL_SPEED == 0 +# define SERIAL_DELAY 12 +#elif SELECT_SOFT_SERIAL_SPEED == 1 +# define SERIAL_DELAY 16 +#elif SELECT_SOFT_SERIAL_SPEED == 2 +# define SERIAL_DELAY 24 +#elif SELECT_SOFT_SERIAL_SPEED == 3 +# define SERIAL_DELAY 32 +#elif SELECT_SOFT_SERIAL_SPEED == 4 +# define SERIAL_DELAY 48 +#elif SELECT_SOFT_SERIAL_SPEED == 5 +# define SERIAL_DELAY 64 +#else +# error invalid SELECT_SOFT_SERIAL_SPEED value +#endif + +inline static void serial_delay(void) { wait_us(SERIAL_DELAY); } +inline static void serial_delay_half(void) { wait_us(SERIAL_DELAY / 2); } +inline static void serial_delay_blip(void) { wait_us(1); } +inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); } +inline static void serial_input(void) { setPinInputHigh(SOFT_SERIAL_PIN); } +inline static bool serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); } +inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); } +inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); } + +void interrupt_handler(void *arg); + +// Use thread + palWaitLineTimeout instead of palSetLineCallback +// - Methods like setPinOutput and palEnableLineEvent/palDisableLineEvent +// cause the interrupt to lock up, which would limit to only receiving data... +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + palWaitLineTimeout(SOFT_SERIAL_PIN, TIME_INFINITE); + interrupt_handler(NULL); + } +} + +static SSTD_t *Transaction_table = NULL; +static uint8_t Transaction_table_size = 0; + +void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size) { + Transaction_table = sstd_table; + Transaction_table_size = (uint8_t)sstd_table_size; + + serial_output(); + serial_high(); +} + +void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size) { + Transaction_table = sstd_table; + Transaction_table_size = (uint8_t)sstd_table_size; + + serial_input(); + + palEnablePadEvent(PAL_PORT(SOFT_SERIAL_PIN), PAL_PAD(SOFT_SERIAL_PIN), PAL_EVENT_MODE_FALLING_EDGE); + chThdCreateStatic(waThread1, sizeof(waThread1), HIGHPRIO, Thread1, NULL); +} + +// Used by the master to synchronize timing with the slave. +static void __attribute__((noinline)) sync_recv(void) { + serial_input(); + // This shouldn't hang if the slave disconnects because the + // serial line will float to high if the slave does disconnect. + while (!serial_read_pin()) { + } + + serial_delay(); +} + +// Used by the slave to send a synchronization signal to the master. +static void __attribute__((noinline)) sync_send(void) { + serial_output(); + + serial_low(); + serial_delay(); + + serial_high(); +} + +// Reads a byte from the serial line +static uint8_t __attribute__((noinline)) serial_read_byte(void) { + uint8_t byte = 0; + serial_input(); + for (uint8_t i = 0; i < 8; ++i) { + byte = (byte << 1) | serial_read_pin(); + serial_delay(); + } + + return byte; +} + +// Sends a byte with MSB ordering +static void __attribute__((noinline)) serial_write_byte(uint8_t data) { + uint8_t b = 8; + serial_output(); + while (b--) { + if (data & (1 << b)) { + serial_high(); + } else { + serial_low(); + } + serial_delay(); + } +} + +// interrupt handle to be used by the slave device +void interrupt_handler(void *arg) { + chSysLockFromISR(); + + sync_send(); + + // read mid pulses + serial_delay_blip(); + + uint8_t checksum_computed = 0; + int sstd_index = 0; + +#ifdef SERIAL_USE_MULTI_TRANSACTION + sstd_index = serial_read_byte(); + sync_send(); +#endif + + SSTD_t *trans = &Transaction_table[sstd_index]; + for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { + trans->initiator2target_buffer[i] = serial_read_byte(); + sync_send(); + checksum_computed += trans->initiator2target_buffer[i]; + } + checksum_computed ^= 7; + uint8_t checksum_received = serial_read_byte(); + sync_send(); + + // wait for the sync to finish sending + serial_delay(); + + uint8_t checksum = 0; + for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { + serial_write_byte(trans->target2initiator_buffer[i]); + sync_send(); + serial_delay_half(); + checksum += trans->target2initiator_buffer[i]; + } + serial_write_byte(checksum ^ 7); + sync_send(); + + // wait for the sync to finish sending + serial_delay(); + + *trans->status = (checksum_computed == checksum_received) ? TRANSACTION_ACCEPTED : TRANSACTION_DATA_ERROR; + + // end transaction + serial_input(); + + // TODO: remove extra delay between transactions + serial_delay(); + + chSysUnlockFromISR(); +} + +///////// +// start transaction by initiator +// +// int soft_serial_transaction(int sstd_index) +// +// Returns: +// TRANSACTION_END +// TRANSACTION_NO_RESPONSE +// TRANSACTION_DATA_ERROR +// this code is very time dependent, so we need to disable interrupts +#ifndef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_transaction(void) { + int sstd_index = 0; +#else +int soft_serial_transaction(int sstd_index) { +#endif + + if (sstd_index > Transaction_table_size) return TRANSACTION_TYPE_ERROR; + SSTD_t *trans = &Transaction_table[sstd_index]; + + // TODO: remove extra delay between transactions + serial_delay(); + + // this code is very time dependent, so we need to disable interrupts + chSysLock(); + + // signal to the slave that we want to start a transaction + serial_output(); + serial_low(); + serial_delay_blip(); + + // wait for the slaves response + serial_input(); + serial_high(); + serial_delay(); + + // check if the slave is present + if (serial_read_pin()) { + // slave failed to pull the line low, assume not present + dprintf("serial::NO_RESPONSE\n"); + chSysUnlock(); + return TRANSACTION_NO_RESPONSE; + } + + // if the slave is present syncronize with it + + uint8_t checksum = 0; + // send data to the slave +#ifdef SERIAL_USE_MULTI_TRANSACTION + serial_write_byte(sstd_index); // first chunk is transaction id + sync_recv(); +#endif + for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { + serial_write_byte(trans->initiator2target_buffer[i]); + sync_recv(); + checksum += trans->initiator2target_buffer[i]; + } + serial_write_byte(checksum ^ 7); + sync_recv(); + + serial_delay(); + serial_delay(); // read mid pulses + + // receive data from the slave + uint8_t checksum_computed = 0; + for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { + trans->target2initiator_buffer[i] = serial_read_byte(); + sync_recv(); + checksum_computed += trans->target2initiator_buffer[i]; + } + checksum_computed ^= 7; + uint8_t checksum_received = serial_read_byte(); + + sync_recv(); + serial_delay(); + + if ((checksum_computed) != (checksum_received)) { + dprintf("serial::FAIL[%u,%u,%u]\n", checksum_computed, checksum_received, sstd_index); + serial_output(); + serial_high(); + + chSysUnlock(); + return TRANSACTION_DATA_ERROR; + } + + // always, release the line when not in use + serial_high(); + serial_output(); + + chSysUnlock(); + return TRANSACTION_END; +} diff --git a/drivers/chibios/serial.h b/drivers/chibios/serial.h new file mode 100644 index 0000000000..0c1857d52e --- /dev/null +++ b/drivers/chibios/serial.h @@ -0,0 +1,62 @@ +#pragma once + +#include <stdbool.h> + +// ///////////////////////////////////////////////////////////////// +// Need Soft Serial defines in config.h +// ///////////////////////////////////////////////////////////////// +// ex. +// #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6 +// OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5 +// // 1: about 137kbps (default) +// // 2: about 75kbps +// // 3: about 39kbps +// // 4: about 26kbps +// // 5: about 20kbps +// +// //// USE simple API (using signle-type transaction function) +// /* nothing */ +// //// USE flexible API (using multi-type transaction function) +// #define SERIAL_USE_MULTI_TRANSACTION +// +// ///////////////////////////////////////////////////////////////// + +// Soft Serial Transaction Descriptor +typedef struct _SSTD_t { + uint8_t *status; + uint8_t initiator2target_buffer_size; + uint8_t *initiator2target_buffer; + uint8_t target2initiator_buffer_size; + uint8_t *target2initiator_buffer; +} SSTD_t; +#define TID_LIMIT(table) (sizeof(table) / sizeof(SSTD_t)) + +// initiator is transaction start side +void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size); +// target is interrupt accept side +void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size); + +// initiator result +#define TRANSACTION_END 0 +#define TRANSACTION_NO_RESPONSE 0x1 +#define TRANSACTION_DATA_ERROR 0x2 +#define TRANSACTION_TYPE_ERROR 0x4 +#ifndef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_transaction(void); +#else +int soft_serial_transaction(int sstd_index); +#endif + +// target status +// *SSTD_t.status has +// initiator: +// TRANSACTION_END +// or TRANSACTION_NO_RESPONSE +// or TRANSACTION_DATA_ERROR +// target: +// TRANSACTION_DATA_ERROR +// or TRANSACTION_ACCEPTED +#define TRANSACTION_ACCEPTED 0x8 +#ifdef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_get_and_clean_status(int sstd_index); +#endif diff --git a/drivers/chibios/serial_usart.c b/drivers/chibios/serial_usart.c new file mode 100644 index 0000000000..62b4913cbf --- /dev/null +++ b/drivers/chibios/serial_usart.c @@ -0,0 +1,234 @@ +#include "quantum.h" +#include "serial.h" +#include "printf.h" + +#include "ch.h" +#include "hal.h" + +#ifndef USART_CR1_M0 +# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so +#endif + +#ifndef USE_GPIOV1 +// The default PAL alternate modes are used to signal that the pins are used for USART +# ifndef SERIAL_USART_TX_PAL_MODE +# define SERIAL_USART_TX_PAL_MODE 7 +# endif +#endif + +#ifndef SERIAL_USART_DRIVER +# define SERIAL_USART_DRIVER SD1 +#endif + +#ifndef SERIAL_USART_CR1 +# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length +#endif + +#ifndef SERIAL_USART_CR2 +# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits +#endif + +#ifndef SERIAL_USART_CR3 +# define SERIAL_USART_CR3 0 +#endif + +#ifdef SOFT_SERIAL_PIN +# define SERIAL_USART_TX_PIN SOFT_SERIAL_PIN +#endif + +#ifndef SELECT_SOFT_SERIAL_SPEED +# define SELECT_SOFT_SERIAL_SPEED 1 +#endif + +#ifdef SERIAL_USART_SPEED +// Allow advanced users to directly set SERIAL_USART_SPEED +#elif SELECT_SOFT_SERIAL_SPEED == 0 +# define SERIAL_USART_SPEED 460800 +#elif SELECT_SOFT_SERIAL_SPEED == 1 +# define SERIAL_USART_SPEED 230400 +#elif SELECT_SOFT_SERIAL_SPEED == 2 +# define SERIAL_USART_SPEED 115200 +#elif SELECT_SOFT_SERIAL_SPEED == 3 +# define SERIAL_USART_SPEED 57600 +#elif SELECT_SOFT_SERIAL_SPEED == 4 +# define SERIAL_USART_SPEED 38400 +#elif SELECT_SOFT_SERIAL_SPEED == 5 +# define SERIAL_USART_SPEED 19200 +#else +# error invalid SELECT_SOFT_SERIAL_SPEED value +#endif + +#define TIMEOUT 100 +#define HANDSHAKE_MAGIC 7 + +static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) { + msg_t ret = sdWrite(driver, data, size); + + // Half duplex requires us to read back the data we just wrote - just throw it away + uint8_t dump[size]; + sdRead(driver, dump, size); + + return ret; +} +#undef sdWrite +#define sdWrite sdWriteHalfDuplex + +static inline msg_t sdWriteTimeoutHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size, uint32_t timeout) { + msg_t ret = sdWriteTimeout(driver, data, size, timeout); + + // Half duplex requires us to read back the data we just wrote - just throw it away + uint8_t dump[size]; + sdReadTimeout(driver, dump, size, timeout); + + return ret; +} +#undef sdWriteTimeout +#define sdWriteTimeout sdWriteTimeoutHalfDuplex + +static inline void sdClear(SerialDriver* driver) { + while (sdGetTimeout(driver, TIME_IMMEDIATE) != MSG_TIMEOUT) { + // Do nothing with the data + } +} + +static SerialConfig sdcfg = { + (SERIAL_USART_SPEED), // speed - mandatory + (SERIAL_USART_CR1), // CR1 + (SERIAL_USART_CR2), // CR2 + (SERIAL_USART_CR3) // CR3 +}; + +void handle_soft_serial_slave(void); + +/* + * This thread runs on the slave and responds to transactions initiated + * by the master + */ +static THD_WORKING_AREA(waSlaveThread, 2048); +static THD_FUNCTION(SlaveThread, arg) { + (void)arg; + chRegSetThreadName("slave_transport"); + + while (true) { + handle_soft_serial_slave(); + } +} + +__attribute__((weak)) void usart_init(void) { +#if defined(USE_GPIOV1) + palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); +#else + palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +#endif +} + +void usart_master_init(void) { + usart_init(); + + sdcfg.cr3 |= USART_CR3_HDSEL; + sdStart(&SERIAL_USART_DRIVER, &sdcfg); +} + +void usart_slave_init(void) { + usart_init(); + + sdcfg.cr3 |= USART_CR3_HDSEL; + sdStart(&SERIAL_USART_DRIVER, &sdcfg); + + // Start transport thread + chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL); +} + +static SSTD_t* Transaction_table = NULL; +static uint8_t Transaction_table_size = 0; + +void soft_serial_initiator_init(SSTD_t* sstd_table, int sstd_table_size) { + Transaction_table = sstd_table; + Transaction_table_size = (uint8_t)sstd_table_size; + + usart_master_init(); +} + +void soft_serial_target_init(SSTD_t* sstd_table, int sstd_table_size) { + Transaction_table = sstd_table; + Transaction_table_size = (uint8_t)sstd_table_size; + + usart_slave_init(); +} + +void handle_soft_serial_slave(void) { + uint8_t sstd_index = sdGet(&SERIAL_USART_DRIVER); // first chunk is always transaction id + SSTD_t* trans = &Transaction_table[sstd_index]; + + // Always write back the sstd_index as part of a basic handshake + sstd_index ^= HANDSHAKE_MAGIC; + sdWrite(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index)); + + if (trans->initiator2target_buffer_size) { + sdRead(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size); + } + + if (trans->target2initiator_buffer_size) { + sdWrite(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size); + } + + if (trans->status) { + *trans->status = TRANSACTION_ACCEPTED; + } +} + +///////// +// start transaction by initiator +// +// int soft_serial_transaction(int sstd_index) +// +// Returns: +// TRANSACTION_END +// TRANSACTION_NO_RESPONSE +// TRANSACTION_DATA_ERROR +#ifndef SERIAL_USE_MULTI_TRANSACTION +int soft_serial_transaction(void) { + uint8_t sstd_index = 0; +#else +int soft_serial_transaction(int index) { + uint8_t sstd_index = index; +#endif + + if (sstd_index > Transaction_table_size) return TRANSACTION_TYPE_ERROR; + SSTD_t* trans = &Transaction_table[sstd_index]; + msg_t res = 0; + + sdClear(&SERIAL_USART_DRIVER); + + // First chunk is always transaction id + sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(TIMEOUT)); + + uint8_t sstd_index_shake = 0xFF; + + // Which we always read back first so that we can error out correctly + // - due to the half duplex limitations on return codes, we always have to read *something* + // - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready + res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(TIMEOUT)); + if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) { + dprintf("serial::usart_shake NO_RESPONSE\n"); + return TRANSACTION_NO_RESPONSE; + } + + if (trans->initiator2target_buffer_size) { + res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(TIMEOUT)); + if (res < 0) { + dprintf("serial::usart_transmit NO_RESPONSE\n"); + return TRANSACTION_NO_RESPONSE; + } + } + + if (trans->target2initiator_buffer_size) { + res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(TIMEOUT)); + if (res < 0) { + dprintf("serial::usart_receive NO_RESPONSE\n"); + return TRANSACTION_NO_RESPONSE; + } + } + + return TRANSACTION_END; +} diff --git a/drivers/eeprom/eeprom_driver.c b/drivers/eeprom/eeprom_driver.c index 3835e5e9d0..6ce47faf7d 100644 --- a/drivers/eeprom/eeprom_driver.c +++ b/drivers/eeprom/eeprom_driver.c @@ -20,19 +20,19 @@ #include "eeprom_driver.h" uint8_t eeprom_read_byte(const uint8_t *addr) { - uint8_t ret; + uint8_t ret = 0; eeprom_read_block(&ret, addr, 1); return ret; } uint16_t eeprom_read_word(const uint16_t *addr) { - uint16_t ret; + uint16_t ret = 0; eeprom_read_block(&ret, addr, 2); return ret; } uint32_t eeprom_read_dword(const uint32_t *addr) { - uint32_t ret; + uint32_t ret = 0; eeprom_read_block(&ret, addr, 4); return ret; } diff --git a/drivers/eeprom/eeprom_i2c.c b/drivers/eeprom/eeprom_i2c.c index 03dbc5e516..ca8af3da51 100644 --- a/drivers/eeprom/eeprom_i2c.c +++ b/drivers/eeprom/eeprom_i2c.c @@ -37,8 +37,9 @@ // #define DEBUG_EEPROM_OUTPUT -#ifdef DEBUG_EEPROM_OUTPUT -# include "print.h" +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) +# include "timer.h" +# include "debug.h" #endif // DEBUG_EEPROM_OUTPUT static inline void init_i2c_if_required(void) { @@ -50,7 +51,7 @@ static inline void init_i2c_if_required(void) { } static inline void fill_target_address(uint8_t *buffer, const void *addr) { - intptr_t p = (intptr_t)addr; + uintptr_t p = (uintptr_t)addr; for (int i = 0; i < EXTERNAL_EEPROM_ADDRESS_SIZE; ++i) { buffer[EXTERNAL_EEPROM_ADDRESS_SIZE - 1 - i] = p & 0xFF; p >>= 8; @@ -60,11 +61,19 @@ static inline void fill_target_address(uint8_t *buffer, const void *addr) { void eeprom_driver_init(void) {} void eeprom_driver_erase(void) { +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) + uint32_t start = timer_read32(); +#endif + uint8_t buf[EXTERNAL_EEPROM_PAGE_SIZE]; memset(buf, 0x00, EXTERNAL_EEPROM_PAGE_SIZE); - for (intptr_t addr = 0; addr < EXTERNAL_EEPROM_BYTE_COUNT; addr += EXTERNAL_EEPROM_PAGE_SIZE) { - eeprom_write_block(buf, (void *)addr, EXTERNAL_EEPROM_PAGE_SIZE); + for (uint32_t addr = 0; addr < EXTERNAL_EEPROM_BYTE_COUNT; addr += EXTERNAL_EEPROM_PAGE_SIZE) { + eeprom_write_block(buf, (void *)(uintptr_t)addr, EXTERNAL_EEPROM_PAGE_SIZE); } + +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) + dprintf("EEPROM erase took %ldms to complete\n", ((long)(timer_read32() - start))); +#endif } void eeprom_read_block(void *buf, const void *addr, size_t len) { @@ -72,10 +81,10 @@ void eeprom_read_block(void *buf, const void *addr, size_t len) { fill_target_address(complete_packet, addr); init_i2c_if_required(); - i2c_transmit(EXTERNAL_EEPROM_I2C_ADDRESS((intptr_t)addr), complete_packet, EXTERNAL_EEPROM_ADDRESS_SIZE, 100); - i2c_receive(EXTERNAL_EEPROM_I2C_ADDRESS((intptr_t)addr), buf, len, 100); + i2c_transmit(EXTERNAL_EEPROM_I2C_ADDRESS((uintptr_t)addr), complete_packet, EXTERNAL_EEPROM_ADDRESS_SIZE, 100); + i2c_receive(EXTERNAL_EEPROM_I2C_ADDRESS((uintptr_t)addr), buf, len, 100); -#ifdef DEBUG_EEPROM_OUTPUT +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) dprintf("[EEPROM R] 0x%04X: ", ((int)addr)); for (size_t i = 0; i < len; ++i) { dprintf(" %02X", (int)(((uint8_t *)buf)[i])); @@ -85,14 +94,14 @@ void eeprom_read_block(void *buf, const void *addr, size_t len) { } void eeprom_write_block(const void *buf, void *addr, size_t len) { - uint8_t complete_packet[EXTERNAL_EEPROM_ADDRESS_SIZE + EXTERNAL_EEPROM_PAGE_SIZE]; - uint8_t *read_buf = (uint8_t *)buf; - intptr_t target_addr = (intptr_t)addr; + uint8_t complete_packet[EXTERNAL_EEPROM_ADDRESS_SIZE + EXTERNAL_EEPROM_PAGE_SIZE]; + uint8_t * read_buf = (uint8_t *)buf; + uintptr_t target_addr = (uintptr_t)addr; init_i2c_if_required(); while (len > 0) { - intptr_t page_offset = target_addr % EXTERNAL_EEPROM_PAGE_SIZE; - int write_length = EXTERNAL_EEPROM_PAGE_SIZE - page_offset; + uintptr_t page_offset = target_addr % EXTERNAL_EEPROM_PAGE_SIZE; + int write_length = EXTERNAL_EEPROM_PAGE_SIZE - page_offset; if (write_length > len) { write_length = len; } @@ -102,7 +111,7 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) { complete_packet[EXTERNAL_EEPROM_ADDRESS_SIZE + i] = read_buf[i]; } -#ifdef DEBUG_EEPROM_OUTPUT +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) dprintf("[EEPROM W] 0x%04X: ", ((int)target_addr)); for (uint8_t i = 0; i < write_length; i++) { dprintf(" %02X", (int)(read_buf[i])); @@ -110,7 +119,7 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) { dprintf("\n"); #endif // DEBUG_EEPROM_OUTPUT - i2c_transmit(EXTERNAL_EEPROM_I2C_ADDRESS((intptr_t)addr), complete_packet, EXTERNAL_EEPROM_ADDRESS_SIZE + write_length, 100); + i2c_transmit(EXTERNAL_EEPROM_I2C_ADDRESS((uintptr_t)addr), complete_packet, EXTERNAL_EEPROM_ADDRESS_SIZE + write_length, 100); wait_ms(EXTERNAL_EEPROM_WRITE_TIME); read_buf += write_length; diff --git a/drivers/eeprom/eeprom_spi.c b/drivers/eeprom/eeprom_spi.c new file mode 100644 index 0000000000..7b6416eafb --- /dev/null +++ b/drivers/eeprom/eeprom_spi.c @@ -0,0 +1,232 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <stdint.h> +#include <string.h> + +/* + Note that the implementations of eeprom_XXXX_YYYY on AVR are normally + provided by avr-libc. The same functions are reimplemented below and are + rerouted to the external SPI equivalent. + + Seemingly, as this is compiled from within QMK, the object file generated + during the build overrides the avr-libc implementation during the linking + stage. + + On other platforms such as ARM, there are no provided implementations, so + there is nothing to override during linkage. +*/ + +#include "wait.h" +#include "spi_master.h" +#include "eeprom.h" +#include "eeprom_spi.h" + +#define CMD_WREN 6 +#define CMD_WRDI 4 +#define CMD_RDSR 5 +#define CMD_WRSR 1 +#define CMD_READ 3 +#define CMD_WRITE 2 + +#define SR_WIP 0x01 + +// #define DEBUG_EEPROM_OUTPUT + +#ifndef EXTERNAL_EEPROM_SPI_TIMEOUT +# define EXTERNAL_EEPROM_SPI_TIMEOUT 100 +#endif + +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) +# include "timer.h" +# include "debug.h" +#endif // CONSOLE_ENABLE + +static void init_spi_if_required(void) { + static int done = 0; + if (!done) { + spi_init(); + done = 1; + } +} + +static bool spi_eeprom_start(void) { return spi_start(EXTERNAL_EEPROM_SPI_SLAVE_SELECT_PIN, EXTERNAL_EEPROM_SPI_LSBFIRST, EXTERNAL_EEPROM_SPI_MODE, EXTERNAL_EEPROM_SPI_CLOCK_DIVISOR); } + +static spi_status_t spi_eeprom_wait_while_busy(int timeout) { + uint32_t deadline = timer_read32() + timeout; + spi_status_t response; + do { + spi_write(CMD_RDSR); + response = spi_read(); + if (timer_read32() >= deadline) { + return SPI_STATUS_TIMEOUT; + } + } while (response & SR_WIP); + return SPI_STATUS_SUCCESS; +} + +static void spi_eeprom_transmit_address(uintptr_t addr) { + uint8_t buffer[EXTERNAL_EEPROM_ADDRESS_SIZE]; + + for (int i = 0; i < EXTERNAL_EEPROM_ADDRESS_SIZE; ++i) { + buffer[EXTERNAL_EEPROM_ADDRESS_SIZE - 1 - i] = addr & 0xFF; + addr >>= 8; + } + + spi_transmit(buffer, EXTERNAL_EEPROM_ADDRESS_SIZE); +} + +//---------------------------------------------------------------------------------------------------------------------- + +void eeprom_driver_init(void) {} + +void eeprom_driver_erase(void) { +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) + uint32_t start = timer_read32(); +#endif + + uint8_t buf[EXTERNAL_EEPROM_PAGE_SIZE]; + memset(buf, 0x00, EXTERNAL_EEPROM_PAGE_SIZE); + for (uint32_t addr = 0; addr < EXTERNAL_EEPROM_BYTE_COUNT; addr += EXTERNAL_EEPROM_PAGE_SIZE) { + eeprom_write_block(buf, (void *)(uintptr_t)addr, EXTERNAL_EEPROM_PAGE_SIZE); + } + +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) + dprintf("EEPROM erase took %ldms to complete\n", ((long)(timer_read32() - start))); +#endif +} + +void eeprom_read_block(void *buf, const void *addr, size_t len) { + init_spi_if_required(); + + //------------------------------------------------- + // Wait for the write-in-progress bit to be cleared + bool res = spi_eeprom_start(); + if (!res) { + dprint("failed to start SPI for WIP check\n"); + memset(buf, 0, len); + return; + } + + spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT); + spi_stop(); + if (response == SPI_STATUS_TIMEOUT) { + dprint("SPI timeout for WIP check\n"); + memset(buf, 0, len); + return; + } + + //------------------------------------------------- + // Perform read + res = spi_eeprom_start(); + if (!res) { + dprint("failed to start SPI for read\n"); + memset(buf, 0, len); + return; + } + + spi_write(CMD_READ); + spi_eeprom_transmit_address((uintptr_t)addr); + spi_receive(buf, len); + +#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) + dprintf("[EEPROM R] 0x%08lX: ", ((uint32_t)(uintptr_t)addr)); + for (size_t i = 0; i < len; ++i) { + dprintf(" %02X", (int)(((uint8_t *)buf)[i])); + } + dprintf("\n"); +#endif // DEBUG_EEPROM_OUTPUT + + spi_stop(); +} + +void eeprom_write_block(const void *buf, void *addr, size_t len) { + init_spi_if_required(); + + bool res; + uint8_t * read_buf = (uint8_t *)buf; + uintptr_t target_addr = (uintptr_t)addr; + + while (len > 0) { + uintptr_t page_offset = target_addr % EXTERNAL_EEPROM_PAGE_SIZE; + |