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-rw-r--r--drivers/arm/i2c_master.c121
-rw-r--r--drivers/arm/i2c_master.h91
-rw-r--r--drivers/avr/analog.c53
-rw-r--r--drivers/avr/analog.h26
-rw-r--r--[-rwxr-xr-x]drivers/avr/apa102.c147
-rw-r--r--[-rwxr-xr-x]drivers/avr/apa102.h5
-rw-r--r--drivers/avr/glcdfont.c280
-rw-r--r--drivers/avr/hd44780.c510
-rw-r--r--drivers/avr/hd44780.h303
-rw-r--r--[-rwxr-xr-x]drivers/avr/i2c_master.c260
-rw-r--r--[-rwxr-xr-x]drivers/avr/i2c_master.h12
-rw-r--r--[-rwxr-xr-x]drivers/avr/i2c_slave.c18
-rw-r--r--[-rwxr-xr-x]drivers/avr/i2c_slave.h2
-rw-r--r--drivers/avr/pro_micro.h270
-rw-r--r--drivers/avr/ssd1306.c427
-rw-r--r--drivers/avr/ssd1306.h84
-rw-r--r--drivers/avr/ws2812.c384
-rw-r--r--drivers/avr/ws2812.h17
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/board.c98
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/board.h1166
-rw-r--r--drivers/boards/IC_TEENSY_3_1/board.c237
-rw-r--r--drivers/boards/IC_TEENSY_3_1/board.h426
-rw-r--r--drivers/gpio/pca9555.c72
-rw-r--r--drivers/haptic/DRV2605L.c150
-rw-r--r--drivers/haptic/DRV2605L.h574
-rw-r--r--drivers/haptic/haptic.c316
-rw-r--r--drivers/haptic/haptic.h78
-rw-r--r--drivers/haptic/solenoid.c100
-rw-r--r--drivers/haptic/solenoid.h10
-rw-r--r--drivers/issi/is31fl3218.c100
-rw-r--r--drivers/issi/is31fl3218.h4
-rw-r--r--drivers/issi/is31fl3731-simple.c71
-rw-r--r--drivers/issi/is31fl3731-simple.h171
-rw-r--r--drivers/issi/is31fl3731.c160
-rw-r--r--drivers/issi/is31fl3731.h195
-rw-r--r--drivers/issi/is31fl3733.c177
-rw-r--r--drivers/issi/is31fl3733.h437
-rw-r--r--drivers/issi/is31fl3736.c219
-rw-r--r--drivers/issi/is31fl3736.h254
-rw-r--r--drivers/issi/is31fl3737.c177
-rw-r--r--drivers/issi/is31fl3737.h341
-rw-r--r--drivers/oled/glcdfont.c241
-rw-r--r--drivers/oled/oled_driver.c801
-rw-r--r--drivers/oled/oled_driver.h206
-rw-r--r--drivers/qwiic/micro_oled.c748
-rw-r--r--drivers/qwiic/micro_oled.h122
-rw-r--r--drivers/qwiic/qwiic.c12
-rw-r--r--drivers/qwiic/qwiic.h4
-rw-r--r--drivers/qwiic/util/font5x7.h265
-rw-r--r--drivers/qwiic/util/font8x16.h108
-rw-r--r--drivers/ugfx/gdisp/is31fl3731c/board_is31fl3731c_template.h85
-rw-r--r--drivers/ugfx/gdisp/is31fl3731c/gdisp_is31fl3731c.c268
-rw-r--r--drivers/ugfx/gdisp/is31fl3731c/gdisp_lld_config.h14
-rw-r--r--drivers/ugfx/gdisp/st7565/board_st7565_template.h71
-rw-r--r--drivers/ugfx/gdisp/st7565/gdisp_lld_ST7565.c337
-rw-r--r--drivers/ugfx/gdisp/st7565/gdisp_lld_config.h16
-rw-r--r--drivers/ugfx/gdisp/st7565/st7565.h42
57 files changed, 4882 insertions, 7001 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c
index cba5a1c679..18068d3a6d 100644
--- a/drivers/arm/i2c_master.c
+++ b/drivers/arm/i2c_master.c
@@ -34,98 +34,83 @@ static uint8_t i2c_address;
static const I2CConfig i2cconfig = {
#ifdef USE_I2CV1
- I2C1_OPMODE,
- I2C1_CLOCK_SPEED,
- I2C1_DUTY_CYCLE,
+ I2C1_OPMODE,
+ I2C1_CLOCK_SPEED,
+ I2C1_DUTY_CYCLE,
#else
- STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) |
- STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) |
- STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL),
- 0,
- 0
+ STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
#endif
};
static i2c_status_t chibios_to_qmk(const msg_t* status) {
- switch (*status) {
- case I2C_NO_ERROR:
- return I2C_STATUS_SUCCESS;
- case I2C_TIMEOUT:
- return I2C_STATUS_TIMEOUT;
- // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
- default:
- return I2C_STATUS_ERROR;
- }
+ switch (*status) {
+ case I2C_NO_ERROR:
+ return I2C_STATUS_SUCCESS;
+ case I2C_TIMEOUT:
+ return I2C_STATUS_TIMEOUT;
+ // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
+ default:
+ return I2C_STATUS_ERROR;
+ }
}
-__attribute__ ((weak))
-void i2c_init(void)
-{
- // Try releasing special pins for a short time
- palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT);
- palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
+__attribute__((weak)) void i2c_init(void) {
+ // Try releasing special pins for a short time
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
- chThdSleepMilliseconds(10);
+ chThdSleepMilliseconds(10);
#ifdef USE_I2CV1
- palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
- palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
#else
- palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
- palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
#endif
- //i2cInit(); //This is invoked by halInit() so no need to redo it.
+ // i2cInit(); //This is invoked by halInit() so no need to redo it.
}
-i2c_status_t i2c_start(uint8_t address)
-{
- i2c_address = address;
- i2cStart(&I2C_DRIVER, &i2cconfig);
- return I2C_STATUS_SUCCESS;
+i2c_status_t i2c_start(uint8_t address) {
+ i2c_address = address;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ return I2C_STATUS_SUCCESS;
}
-i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout)
-{
- i2c_address = address;
- i2cStart(&I2C_DRIVER, &i2cconfig);
- msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout));
- return chibios_to_qmk(&status);
+i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = address;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout));
+ return chibios_to_qmk(&status);
}
-i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout)
-{
- i2c_address = address;
- i2cStart(&I2C_DRIVER, &i2cconfig);
- msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout));
- return chibios_to_qmk(&status);
+i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = address;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout));
+ return chibios_to_qmk(&status);
}
-i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout)
-{
- i2c_address = devaddr;
- i2cStart(&I2C_DRIVER, &i2cconfig);
+i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = devaddr;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
- uint8_t complete_packet[length + 1];
- for(uint8_t i = 0; i < length; i++)
- {
- complete_packet[i+1] = data[i];
- }
- complete_packet[0] = regaddr;
+ uint8_t complete_packet[length + 1];
+ for (uint8_t i = 0; i < length; i++) {
+ complete_packet[i + 1] = data[i];
+ }
+ complete_packet[0] = regaddr;
- msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout));
- return chibios_to_qmk(&status);
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout));
+ return chibios_to_qmk(&status);
}
-i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
-{
- i2c_address = devaddr;
- i2cStart(&I2C_DRIVER, &i2cconfig);
- msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, MS2ST(timeout));
- return chibios_to_qmk(&status);
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = devaddr;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, MS2ST(timeout));
+ return chibios_to_qmk(&status);
}
-void i2c_stop(void)
-{
- i2cStop(&I2C_DRIVER);
-}
+void i2c_stop(void) { i2cStop(&I2C_DRIVER); }
diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h
index c8afa31e28..b40fa0a910 100644
--- a/drivers/arm/i2c_master.h
+++ b/drivers/arm/i2c_master.h
@@ -27,84 +27,83 @@
#include "ch.h"
#include <hal.h>
-
#if defined(STM32F1XX) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx)
- #define USE_I2CV1
+# define USE_I2CV1
#endif
#ifdef I2C1_BANK
- #define I2C1_SCL_BANK I2C1_BANK
- #define I2C1_SDA_BANK I2C1_BANK
+# define I2C1_SCL_BANK I2C1_BANK
+# define I2C1_SDA_BANK I2C1_BANK
#endif
#ifndef I2C1_SCL_BANK
- #define I2C1_SCL_BANK GPIOB
+# define I2C1_SCL_BANK GPIOB
#endif
#ifndef I2C1_SDA_BANK
- #define I2C1_SDA_BANK GPIOB
+# define I2C1_SDA_BANK GPIOB
#endif
#ifndef I2C1_SCL
- #define I2C1_SCL 6
+# define I2C1_SCL 6
#endif
#ifndef I2C1_SDA
- #define I2C1_SDA 7
+# define I2C1_SDA 7
#endif
#ifdef USE_I2CV1
- #ifndef I2C1_OPMODE
- #define I2C1_OPMODE OPMODE_I2C
- #endif
- #ifndef I2C1_CLOCK_SPEED
- #define I2C1_CLOCK_SPEED 100000 /* 400000 */
- #endif
- #ifndef I2C1_DUTY_CYCLE
- #define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
- #endif
+# ifndef I2C1_OPMODE
+# define I2C1_OPMODE OPMODE_I2C
+# endif
+# ifndef I2C1_CLOCK_SPEED
+# define I2C1_CLOCK_SPEED 100000 /* 400000 */
+# endif
+# ifndef I2C1_DUTY_CYCLE
+# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
+# endif
#else
- // The default PAL alternate modes are used to signal that the pins are used for I2C
- #ifndef I2C1_SCL_PAL_MODE
- #define I2C1_SCL_PAL_MODE 4
- #endif
- #ifndef I2C1_SDA_PAL_MODE
- #define I2C1_SDA_PAL_MODE 4
- #endif
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE 4
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE 4
+# endif
- // The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
- // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
- #ifndef I2C1_TIMINGR_PRESC
- #define I2C1_TIMINGR_PRESC 15U
- #endif
- #ifndef I2C1_TIMINGR_SCLDEL
- #define I2C1_TIMINGR_SCLDEL 4U
- #endif
- #ifndef I2C1_TIMINGR_SDADEL
- #define I2C1_TIMINGR_SDADEL 2U
- #endif
- #ifndef I2C1_TIMINGR_SCLH
- #define I2C1_TIMINGR_SCLH 15U
- #endif
- #ifndef I2C1_TIMINGR_SCLL
- #define I2C1_TIMINGR_SCLL 21U
- #endif
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+# ifndef I2C1_TIMINGR_PRESC
+# define I2C1_TIMINGR_PRESC 15U
+# endif
+# ifndef I2C1_TIMINGR_SCLDEL
+# define I2C1_TIMINGR_SCLDEL 4U
+# endif
+# ifndef I2C1_TIMINGR_SDADEL
+# define I2C1_TIMINGR_SDADEL 2U
+# endif
+# ifndef I2C1_TIMINGR_SCLH
+# define I2C1_TIMINGR_SCLH 15U
+# endif
+# ifndef I2C1_TIMINGR_SCLL
+# define I2C1_TIMINGR_SCLL 21U
+# endif
#endif
#ifndef I2C_DRIVER
- #define I2C_DRIVER I2CD1
+# define I2C_DRIVER I2CD1
#endif
typedef int16_t i2c_status_t;
#define I2C_STATUS_SUCCESS (0)
-#define I2C_STATUS_ERROR (-1)
+#define I2C_STATUS_ERROR (-1)
#define I2C_STATUS_TIMEOUT (-2)
-void i2c_init(void);
+void i2c_init(void);
i2c_status_t i2c_start(uint8_t address);
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
-i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t * tx_body, uint16_t tx_length, uint8_t * rx_body, uint16_t rx_length);
+i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t* tx_body, uint16_t tx_length, uint8_t* rx_body, uint16_t rx_length);
i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
-void i2c_stop(void);
+void i2c_stop(void);
diff --git a/drivers/avr/analog.c b/drivers/avr/analog.c
index 1ec38df75d..1a8da4261d 100644
--- a/drivers/avr/analog.c
+++ b/drivers/avr/analog.c
@@ -21,49 +21,38 @@
#include <stdint.h>
#include "analog.h"
+static uint8_t aref = (1 << REFS0); // default to AREF = Vcc
-static uint8_t aref = (1<<REFS0); // default to AREF = Vcc
-
-
-void analogReference(uint8_t mode)
-{
- aref = mode & 0xC0;
-}
-
+void analogReference(uint8_t mode) { aref = mode & 0xC0; }
// Arduino compatible pin input
-int16_t analogRead(uint8_t pin)
-{
+int16_t analogRead(uint8_t pin) {
#if defined(__AVR_ATmega32U4__)
- static const uint8_t PROGMEM pin_to_mux[] = {
- 0x00, 0x01, 0x04, 0x05, 0x06, 0x07,
- 0x25, 0x24, 0x23, 0x22, 0x21, 0x20};
- if (pin >= 12) return 0;
- return adc_read(pgm_read_byte(pin_to_mux + pin));
+ static const uint8_t PROGMEM pin_to_mux[] = {0x00, 0x01, 0x04, 0x05, 0x06, 0x07, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20};
+ if (pin >= 12) return 0;
+ return adc_read(pgm_read_byte(pin_to_mux + pin));
#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
- if (pin >= 8) return 0;
- return adc_read(pin);
+ if (pin >= 8) return 0;
+ return adc_read(pin);
#else
- return 0;
+ return 0;
#endif
}
// Mux input
-int16_t adc_read(uint8_t mux)
-{
+int16_t adc_read(uint8_t mux) {
#if defined(__AVR_AT90USB162__)
- return 0;
+ return 0;
#else
- uint8_t low;
-
- ADCSRA = (1<<ADEN) | ADC_PRESCALER; // enable ADC
- ADCSRB = (1<<ADHSM) | (mux & 0x20); // high speed mode
- ADMUX = aref | (mux & 0x1F); // configure mux input
- ADCSRA = (1<<ADEN) | ADC_PRESCALER | (1<<ADSC); // start the conversion
- while (ADCSRA & (1<<ADSC)) ; // wait for result
- low = ADCL; // must read LSB first
- return (ADCH << 8) | low; // must read MSB only once!
+ uint8_t low;
+
+ ADCSRA = (1 << ADEN) | ADC_PRESCALER; // enable ADC
+ ADCSRB = (1 << ADHSM) | (mux & 0x20); // high speed mode
+ ADMUX = aref | (mux & 0x1F); // configure mux input
+ ADCSRA = (1 << ADEN) | ADC_PRESCALER | (1 << ADSC); // start the conversion
+ while (ADCSRA & (1 << ADSC))
+ ; // wait for result
+ low = ADCL; // must read LSB first
+ return (ADCH << 8) | low; // must read MSB only once!
#endif
}
-
-
diff --git a/drivers/avr/analog.h b/drivers/avr/analog.h
index 8d93de7dc2..32452a1ec2 100644
--- a/drivers/avr/analog.h
+++ b/drivers/avr/analog.h
@@ -19,34 +19,34 @@
#include <stdint.h>
-void analogReference(uint8_t mode);
+void analogReference(uint8_t mode);
int16_t analogRead(uint8_t pin);
int16_t adc_read(uint8_t mux);
-#define ADC_REF_POWER (1<<REFS0)
-#define ADC_REF_INTERNAL ((1<<REFS1) | (1<<REFS0))
-#define ADC_REF_EXTERNAL (0)
+#define ADC_REF_POWER (1 << REFS0)
+#define ADC_REF_INTERNAL ((1 << REFS1) | (1 << REFS0))
+#define ADC_REF_EXTERNAL (0)
// These prescaler values are for high speed mode, ADHSM = 1
#if F_CPU == 16000000L
-#define ADC_PRESCALER ((1<<ADPS2) | (1<<ADPS1))
+# define ADC_PRESCALER ((1 << ADPS2) | (1 << ADPS1))
#elif F_CPU == 8000000L
-#define ADC_PRESCALER ((1<<ADPS2) | (1<<ADPS0))
+# define ADC_PRESCALER ((1 << ADPS2) | (1 << ADPS0))
#elif F_CPU == 4000000L
-#define ADC_PRESCALER ((1<<ADPS2))
+# define ADC_PRESCALER ((1 << ADPS2))
#elif F_CPU == 2000000L
-#define ADC_PRESCALER ((1<<ADPS1) | (1<<ADPS0))
+# define ADC_PRESCALER ((1 << ADPS1) | (1 << ADPS0))
#elif F_CPU == 1000000L
-#define ADC_PRESCALER ((1<<ADPS1))
+# define ADC_PRESCALER ((1 << ADPS1))
#else
-#define ADC_PRESCALER ((1<<ADPS0))
+# define ADC_PRESCALER ((1 << ADPS0))
#endif
// some avr-libc versions do not properly define ADHSM
#if defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
-#if !defined(ADHSM)
-#define ADHSM (7)
-#endif
+# if !defined(ADHSM)
+# define ADHSM (7)
+# endif
#endif
#endif
diff --git a/drivers/avr/apa102.c b/drivers/avr/apa102.c
index 55a0d57778..f4d97a1589 100755..100644
--- a/drivers/avr/apa102.c
+++ b/drivers/avr/apa102.c
@@ -1,24 +1,24 @@
/*
-* APA102 lib V1.0a
-*
-* Controls APA102 RGB-LEDs
-* Author: Mikkel (Duckle29 on github)
-*
-* Dec 22th, 2017 v1.0a Initial Version
-*
-* This program is free software: you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation, either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
+ * APA102 lib V1.0a
+ *
+ * Controls APA102 RGB-LEDs
+ * Author: Mikkel (Duckle29 on github)
+ *
+ * Dec 22th, 2017 v1.0a Initial Version
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
#include "apa102.h"
#include <avr/interrupt.h>
@@ -27,75 +27,70 @@
#include "debug.h"
// Setleds for standard RGB
-void inline apa102_setleds(LED_TYPE *ledarray, uint16_t leds){
- apa102_setleds_pin(ledarray,leds, _BV(RGB_DI_PIN & 0xF), _BV(RGB_CLK_PIN & 0xF));
-}
+void inline apa102_setleds(LED_TYPE *ledarray, uint16_t leds) { apa102_setleds_pin(ledarray, leds, _BV(RGB_DI_PIN & 0xF), _BV(RGB_CLK_PIN & 0xF)); }
-void static inline apa102_setleds_pin(LED_TYPE *ledarray, uint16_t leds, uint8_t pinmask_DI, uint8_t pinmask_CLK){
- pinMode(RGB_DI_PIN, PinDirectionOutput);
- pinMode(RGB_CLK_PIN, PinDirectionOutput);
+void static inline apa102_setleds_pin(LED_TYPE *ledarray, uint16_t leds, uint8_t pinmask_DI, uint8_t pinmask_CLK) {
+ pinMode(RGB_DI_PIN, PinDirectionOutput);
+ pinMode(RGB_CLK_PIN, PinDirectionOutput);
- apa102_send_array((uint8_t*)ledarray,leds)
+ apa102_send_array((uint8_t *)ledarray, leds)
}
-void apa102_send_array(uint8_t *data, uint16_t leds){ // Data is struct of 3 bytes. RGB - leds is number of leds in data
- apa102_start_frame();
- while(leds--){
- apa102_send_frame(0xFF000000 | (data->b << 16) | (data->g << 8) | data->r);
- data++;
- }
- apa102_end_frame(leds);
+void apa102_send_array(uint8_t *data, uint16_t leds) { // Data is struct of 3 bytes. RGB - leds is number of leds in data
+ apa102_start_frame();
+ while (leds--) {
+ apa102_send_frame(0xFF000000 | (data->b << 16) | (data->g << 8) | data->r);
+ data++;
+ }
+ apa102_end_frame(leds);
}
-void apa102_send_frame(uint32_t frame){
- for(uint32_t i=0xFF; i>0;){
- apa102_send_byte(frame & i);
- i = i << 8;
- }
+void apa102_send_frame(uint32_t frame) {
+ for (uint32_t i = 0xFF; i > 0;) {
+ apa102_send_byte(frame & i);
+ i = i << 8;
+ }
}
-void apa102_start_frame(){
- apa102_send_frame(0);
-}
+void apa102_start_frame() { apa102_send_frame(0); }
-void apa102_end_frame(uint16_t leds)
-{
- // This function has been taken from: https://github.com/pololu/apa102-arduino/blob/master/APA102.h
- // and adapted. The code is MIT licensed. I think thats compatible?
+void apa102_end_frame(uint16_t leds) {
+ // This function has been taken from: https://github.com/pololu/apa102-arduino/blob/master/APA102.h
+ // and adapted. The code is MIT licensed. I think thats compatible?
- // We need to send some more bytes to ensure that all the LEDs in the
- // chain see their new color and start displaying it.
- //
- // The data stream seen by the last LED in the chain will be delayed by
- // (count - 1) clock edges, because each LED before it inverts the clock
- // line and delays the data by one clock edge. Therefore, to make sure
- // the last LED actually receives the data we wrote, the number of extra
- // edges we send at the end of the frame must be at least (count - 1).
- // For the APA102C, that is sufficient.
- //
- // The SK9822 only updates after it sees 32 zero bits followed by one more
- // rising edge. To avoid having the update time depend on the color of
- // the last LED, we send a dummy 0xFF byte. (Unfortunately, this means
- // that partial updates of the beginning of an LED strip are not possible;
- // the LED after the last one you are trying to update will be black.)
- // After that, to ensure that the last LED in the chain sees 32 zero bits
- // and a rising edge, we need to send at least 65 + (count - 1) edges. It
- // is sufficent and simpler to just send (5 + count/16) bytes of zeros.
- //
- // We are ignoring the specification for the end frame in the APA102/SK9822
- // datasheets because it does not actually ensure that all the LEDs will
- // start displaying their new colors right away.
+ // We need to send some more bytes to ensure that all the LEDs in the
+ // chain see their new color