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-rw-r--r--drivers/lcd/hd44780.h4
-rw-r--r--drivers/led/apa102.c26
-rw-r--r--drivers/led/aw20216.c19
-rw-r--r--drivers/led/issi/is31fl3218.c4
-rw-r--r--drivers/led/issi/is31fl3218.h1
-rw-r--r--drivers/led/issi/is31fl3731-simple.c4
-rw-r--r--drivers/led/issi/is31fl3731-simple.h1
-rw-r--r--drivers/led/issi/is31fl3731.c4
-rw-r--r--drivers/led/issi/is31fl3731.h1
-rw-r--r--drivers/led/issi/is31fl3733-simple.c4
-rw-r--r--drivers/led/issi/is31fl3733-simple.h1
-rw-r--r--drivers/led/issi/is31fl3736.c33
-rw-r--r--drivers/led/issi/is31fl3736.h5
-rw-r--r--drivers/led/issi/is31fl3737.c4
-rw-r--r--drivers/led/issi/is31fl3737.h5
-rw-r--r--drivers/led/issi/is31fl3741.c8
-rw-r--r--drivers/painter/comms/qp_comms_spi.c32
-rw-r--r--drivers/painter/comms/qp_comms_spi.h18
-rw-r--r--drivers/painter/gc9a01/qp_gc9a01.c13
-rw-r--r--drivers/painter/generic/qp_rgb565_surface.c18
-rw-r--r--drivers/painter/ili9xxx/qp_ili9163.c14
-rw-r--r--drivers/painter/ili9xxx/qp_ili9341.c14
-rw-r--r--drivers/painter/ili9xxx/qp_ili9488.c14
-rw-r--r--drivers/painter/ssd1351/qp_ssd1351.c14
-rw-r--r--drivers/painter/st77xx/qp_st7735.c16
-rw-r--r--drivers/painter/st77xx/qp_st7789.c16
-rw-r--r--drivers/painter/tft_panel/qp_tft_panel.c12
-rw-r--r--drivers/painter/tft_panel/qp_tft_panel.h10
-rw-r--r--drivers/ps2/ps2_interrupt.c1
-rw-r--r--drivers/sensors/pmw3320.c192
-rw-r--r--drivers/sensors/pmw3320.h119
31 files changed, 499 insertions, 128 deletions
diff --git a/drivers/lcd/hd44780.h b/drivers/lcd/hd44780.h
index 9e43339344..402217a547 100644
--- a/drivers/lcd/hd44780.h
+++ b/drivers/lcd/hd44780.h
@@ -21,9 +21,9 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include <stdbool.h>
/**
- * \defgroup hd44780
+ * \file
*
- * HD44780 Character LCD Driver
+ * \defgroup hd44780 HD44780 Character LCD Driver
* \{
*/
diff --git a/drivers/led/apa102.c b/drivers/led/apa102.c
index f291948975..40fc68e4f1 100644
--- a/drivers/led/apa102.c
+++ b/drivers/led/apa102.c
@@ -27,7 +27,7 @@
# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(GD32VF103)
# define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4))) // This calculates how many loops of 4 nops to run to delay 100 ns
# else
-# error("APA102_NOPS configuration required")
+# error APA102_NOPS configuration required
# define APA102_NOPS 0 // this just pleases the compile so the above error is easier to spot
# endif
# endif
@@ -43,14 +43,14 @@
} \
} while (0)
-#define APA102_SEND_BIT(byte, bit) \
- do { \
- writePin(RGB_DI_PIN, (byte >> bit) & 1); \
- io_wait; \
- writePinHigh(RGB_CI_PIN); \
- io_wait; \
- writePinLow(RGB_CI_PIN); \
- io_wait; \
+#define APA102_SEND_BIT(byte, bit) \
+ do { \
+ writePin(APA102_DI_PIN, (byte >> bit) & 1); \
+ io_wait; \
+ writePinHigh(APA102_CI_PIN); \
+ io_wait; \
+ writePinLow(APA102_CI_PIN); \
+ io_wait; \
} while (0)
uint8_t apa102_led_brightness = APA102_DEFAULT_BRIGHTNESS;
@@ -77,11 +77,11 @@ void rgblight_call_driver(LED_TYPE *start_led, uint8_t num_leds) {
}
void static apa102_init(void) {
- setPinOutput(RGB_DI_PIN);
- setPinOutput(RGB_CI_PIN);
+ setPinOutput(APA102_DI_PIN);
+ setPinOutput(APA102_CI_PIN);
- writePinLow(RGB_DI_PIN);
- writePinLow(RGB_CI_PIN);
+ writePinLow(APA102_DI_PIN);
+ writePinLow(APA102_CI_PIN);
}
void apa102_set_brightness(uint8_t brightness) {
diff --git a/drivers/led/aw20216.c b/drivers/led/aw20216.c
index cbb0b60774..7895f1497b 100644
--- a/drivers/led/aw20216.c
+++ b/drivers/led/aw20216.c
@@ -1,4 +1,5 @@
/* Copyright 2021 Jasper Chan
+ * 2023 Huckies <https://github.com/Huckies>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -15,6 +16,7 @@
*/
#include "aw20216.h"
+#include "wait.h"
#include "spi_master.h"
/* The AW20216 appears to be somewhat similar to the IS31FL743, although quite
@@ -34,6 +36,8 @@
#define AW_REG_CONFIGURATION 0x00 // PG0
#define AW_REG_GLOBALCURRENT 0x01 // PG0
+#define AW_REG_RESET 0x2F // PG0
+#define AW_REG_MIXFUNCTION 0x46 // PG0
// Default value of AW_REG_CONFIGURATION
// D7:D4 = 1011, SWSEL (SW1~SW12 active)
@@ -41,7 +45,10 @@
// D2:D1 = 00, OSDE (open/short detection enable)
// D0 = 0, CHIPEN (write 1 to enable LEDs when hardware enable pulled high)
#define AW_CONFIG_DEFAULT 0b10110000
+#define AW_MIXCR_DEFAULT 0b00000000
+#define AW_RESET_CMD 0xAE
#define AW_CHIPEN 1
+#define AW_LPEN (0x01 << 1)
#define AW_PWM_REGISTER_COUNT 216
@@ -94,6 +101,10 @@ static inline bool AW20216_write_register(pin_t cs_pin, uint8_t page, uint8_t re
return AW20216_write(cs_pin, page, reg, &value, 1);
}
+void AW20216_soft_reset(pin_t cs_pin) {
+ AW20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_RESET, AW_RESET_CMD);
+}
+
static void AW20216_init_scaling(pin_t cs_pin) {
// Set constant current to the max, control brightness with PWM
for (uint8_t i = 0; i < AW_PWM_REGISTER_COUNT; i++) {
@@ -111,15 +122,23 @@ static inline void AW20216_soft_enable(pin_t cs_pin) {
AW20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_CONFIGURATION, AW_CONFIG_DEFAULT | AW_CHIPEN);
}
+static inline void AW20216_auto_lowpower(pin_t cs_pin) {
+ AW20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_MIXFUNCTION, AW_MIXCR_DEFAULT | AW_LPEN);
+}
+
void AW20216_init(pin_t cs_pin, pin_t en_pin) {
setPinOutput(en_pin);
writePinHigh(en_pin);
+ AW20216_soft_reset(cs_pin);
+ wait_ms(2);
+
// Drivers should start with all scaling and PWM registers as off
AW20216_init_current_limit(cs_pin);
AW20216_init_scaling(cs_pin);
AW20216_soft_enable(cs_pin);
+ AW20216_auto_lowpower(cs_pin);
}
void AW20216_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
diff --git a/drivers/led/issi/is31fl3218.c b/drivers/led/issi/is31fl3218.c
index d43863ac4b..c2300ebe89 100644
--- a/drivers/led/issi/is31fl3218.c
+++ b/drivers/led/issi/is31fl3218.c
@@ -45,9 +45,7 @@ void IS31FL3218_write_register(uint8_t reg, uint8_t data) {
void IS31FL3218_write_pwm_buffer(uint8_t *pwm_buffer) {
g_twi_transfer_buffer[0] = ISSI_REG_PWM;
- for (int i = 0; i < 18; i++) {
- g_twi_transfer_buffer[1 + i] = pwm_buffer[i];
- }
+ memcpy(g_twi_transfer_buffer + 1, pwm_buffer, 18);
i2c_transmit(ISSI_ADDRESS, g_twi_transfer_buffer, 19, ISSI_TIMEOUT);
}
diff --git a/drivers/led/issi/is31fl3218.h b/drivers/led/issi/is31fl3218.h
index fa760da191..26bb01a014 100644
--- a/drivers/led/issi/is31fl3218.h
+++ b/drivers/led/issi/is31fl3218.h
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <stdbool.h>
+#include <string.h>
void IS31FL3218_init(void);
void IS31FL3218_set_color(int index, uint8_t red, uint8_t green, uint8_t blue);
diff --git a/drivers/led/issi/is31fl3731-simple.c b/drivers/led/issi/is31fl3731-simple.c
index 84060f9426..a62b21cc6b 100644
--- a/drivers/led/issi/is31fl3731-simple.c
+++ b/drivers/led/issi/is31fl3731-simple.c
@@ -123,9 +123,7 @@ void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
- for (int j = 0; j < 16; j++) {
- g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
- }
+ memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
diff --git a/drivers/led/issi/is31fl3731-simple.h b/drivers/led/issi/is31fl3731-simple.h
index 1ddadd5209..7834766b94 100644
--- a/drivers/led/issi/is31fl3731-simple.h
+++ b/drivers/led/issi/is31fl3731-simple.h
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <stdbool.h>
+#include <string.h>
#include "progmem.h"
typedef struct is31_led {
diff --git a/drivers/led/issi/is31fl3731.c b/drivers/led/issi/is31fl3731.c
index fed5354145..80344ca721 100644
--- a/drivers/led/issi/is31fl3731.c
+++ b/drivers/led/issi/is31fl3731.c
@@ -111,9 +111,7 @@ void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
- for (int j = 0; j < 16; j++) {
- g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
- }
+ memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
diff --git a/drivers/led/issi/is31fl3731.h b/drivers/led/issi/is31fl3731.h
index 6791289c9e..4c79cb8146 100644
--- a/drivers/led/issi/is31fl3731.h
+++ b/drivers/led/issi/is31fl3731.h
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <stdbool.h>
+#include <string.h>
#include "progmem.h"
typedef struct is31_led {
diff --git a/drivers/led/issi/is31fl3733-simple.c b/drivers/led/issi/is31fl3733-simple.c
index 1e0994d780..21138c6e05 100644
--- a/drivers/led/issi/is31fl3733-simple.c
+++ b/drivers/led/issi/is31fl3733-simple.c
@@ -129,9 +129,7 @@ bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// Copy the data from i to i+15.
// Device will auto-increment register for data after the first byte
// Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer.
- for (int j = 0; j < 16; j++) {
- g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
- }
+ memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
diff --git a/drivers/led/issi/is31fl3733-simple.h b/drivers/led/issi/is31fl3733-simple.h
index f0ea3adca0..1571fdd3d5 100644
--- a/drivers/led/issi/is31fl3733-simple.h
+++ b/drivers/led/issi/is31fl3733-simple.h
@@ -22,6 +22,7 @@
#include <stdint.h>
#include <stdbool.h>
+#include <string.h>
#include "progmem.h"
typedef struct is31_led {
diff --git a/drivers/led/issi/is31fl3736.c b/drivers/led/issi/is31fl3736.c
index 82e7ee3d18..d6b0881139 100644
--- a/drivers/led/issi/is31fl3736.c
+++ b/drivers/led/issi/is31fl3736.c
@@ -77,7 +77,7 @@ uint8_t g_twi_transfer_buffer[20];
// buffers and the transfers in IS31FL3736_write_pwm_buffer() but it's
// probably not worth the extra complexity.
uint8_t g_pwm_buffer[DRIVER_COUNT][192];
-bool g_pwm_buffer_update_required = false;
+bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
uint8_t g_led_control_registers[DRIVER_COUNT][24] = {{0}, {0}};
bool g_led_control_registers_update_required = false;
@@ -107,9 +107,7 @@ void IS31FL3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer
- for (int j = 0; j < 16; j++) {
- g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
- }
+ memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
@@ -171,10 +169,10 @@ void IS31FL3736_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
if (index >= 0 && index < RGB_MATRIX_LED_COUNT) {
memcpy_P(&led, (&g_is31_leds[index]), sizeof(led));
- g_pwm_buffer[led.driver][led.r] = red;
- g_pwm_buffer[led.driver][led.g] = green;
- g_pwm_buffer[led.driver][led.b] = blue;
- g_pwm_buffer_update_required = true;
+ g_pwm_buffer[led.driver][led.r] = red;
+ g_pwm_buffer[led.driver][led.g] = green;
+ g_pwm_buffer[led.driver][led.b] = blue;
+ g_pwm_buffer_update_required[led.driver] = true;
}
}
@@ -232,9 +230,9 @@ void IS31FL3736_mono_set_brightness(int index, uint8_t value) {
if (index >= 0 && index < 96) {
// Index in range 0..95 -> A1..A8, B1..B8, etc.
// Map index 0..95 to registers 0x00..0xBE (interleaved)
- uint8_t pwm_register = index * 2;
- g_pwm_buffer[0][pwm_register] = value;
- g_pwm_buffer_update_required = true;
+ uint8_t pwm_register = index * 2;
+ g_pwm_buffer[0][pwm_register] = value;
+ g_pwm_buffer_update_required[0] = true;
}
}
@@ -262,16 +260,15 @@ void IS31FL3736_mono_set_led_control_register(uint8_t index, bool enabled) {
g_led_control_registers_update_required = true;
}
-void IS31FL3736_update_pwm_buffers(uint8_t addr1, uint8_t addr2) {
- if (g_pwm_buffer_update_required) {
+void IS31FL3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
+ if (g_pwm_buffer_update_required[index]) {
// Firstly we need to unlock the command register and select PG1
- IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
- IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
+ IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
+ IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
- IS31FL3736_write_pwm_buffer(addr1, g_pwm_buffer[0]);
- // IS31FL3736_write_pwm_buffer(addr2, g_pwm_buffer[1]);
+ IS31FL3736_write_pwm_buffer(addr, g_pwm_buffer[index]);
}
- g_pwm_buffer_update_required = false;
+ g_pwm_buffer_update_required[index] = false;
}
void IS31FL3736_update_led_control_registers(uint8_t addr1, uint8_t addr2) {
diff --git a/drivers/led/issi/is31fl3736.h b/drivers/led/issi/is31fl3736.h
index ccb19afbcc..332b2035f3 100644
--- a/drivers/led/issi/is31fl3736.h
+++ b/drivers/led/issi/is31fl3736.h
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <stdbool.h>
+#include <string.h>
#include "progmem.h"
// Simple interface option.
@@ -58,8 +59,8 @@ void IS31FL3736_mono_set_led_control_register(uint8_t index, bool enabled);
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
-void IS31FL3736_update_pwm_buffers(uint8_t addr1, uint8_t addr2);
-void IS31FL3736_update_led_control_registers(uint8_t addr1, uint8_t addr2);
+void IS31FL3736_update_pwm_buffers(uint8_t addr, uint8_t index);
+void IS31FL3736_update_led_control_registers(uint8_t addr, uint8_t index);
#define PUR_0R 0x00 // No PUR resistor
#define PUR_05KR 0x01 // 0.5k Ohm resistor
diff --git a/drivers/led/issi/is31fl3737.c b/drivers/led/issi/is31fl3737.c
index 45a20018c5..b6ed6b2629 100644
--- a/drivers/led/issi/is31fl3737.c
+++ b/drivers/led/issi/is31fl3737.c
@@ -114,9 +114,7 @@ void IS31FL3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer
- for (int j = 0; j < 16; j++) {
- g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
- }
+ memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
diff --git a/drivers/led/issi/is31fl3737.h b/drivers/led/issi/is31fl3737.h
index fb0c33420c..ca9a917ee2 100644
--- a/drivers/led/issi/is31fl3737.h
+++ b/drivers/led/issi/is31fl3737.h
@@ -21,6 +21,7 @@
#include <stdint.h>
#include <stdbool.h>
+#include <string.h>
#include "progmem.h"
typedef struct is31_led {
@@ -45,8 +46,8 @@ void IS31FL3737_set_led_control_register(uint8_t index, bool red, bool green, bo
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
-void IS31FL3737_update_pwm_buffers(uint8_t addr1, uint8_t addr2);
-void IS31FL3737_update_led_control_registers(uint8_t addr1, uint8_t addr2);
+void IS31FL3737_update_pwm_buffers(uint8_t addr, uint8_t index);
+void IS31FL3737_update_led_control_registers(uint8_t addr, uint8_t index);
#define PUR_0R 0x00 // No PUR resistor
#define PUR_05KR 0x01 // 0.5k Ohm resistor in t_NOL
diff --git a/drivers/led/issi/is31fl3741.c b/drivers/led/issi/is31fl3741.c
index c2cdd4c46f..d5dfaf1de6 100644
--- a/drivers/led/issi/is31fl3741.c
+++ b/drivers/led/issi/is31fl3741.c
@@ -104,9 +104,7 @@ void IS31FL3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
}
bool IS31FL3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
- // unlock the command register and select PG2
- IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
- IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0);
+ // Assume PG1 is already selected
for (int i = 0; i < 342; i += 18) {
if (i == 180) {
@@ -222,6 +220,10 @@ void IS31FL3741_set_led_control_register(uint8_t index, bool red, bool green, bo
void IS31FL3741_update_pwm_buffers(uint8_t addr, uint8_t index) {
if (g_pwm_buffer_update_required[index]) {
+ // unlock the command register and select PG2
+ IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
+ IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0);
+
IS31FL3741_write_pwm_buffer(addr, g_pwm_buffer[index]);
}
diff --git a/drivers/painter/comms/qp_comms_spi.c b/drivers/painter/comms/qp_comms_spi.c
index e644ba9f84..7534e844d8 100644
--- a/drivers/painter/comms/qp_comms_spi.c
+++ b/drivers/painter/comms/qp_comms_spi.c
@@ -10,8 +10,8 @@
// Base SPI support
bool qp_comms_spi_init(painter_device_t device) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
- struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
+ painter_driver_t * driver = (painter_driver_t *)device;
+ qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
// Initialize the SPI peripheral
spi_init();
@@ -24,8 +24,8 @@ bool qp_comms_spi_init(painter_device_t device) {
}
bool qp_comms_spi_start(painter_device_t device) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
- struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
+ painter_driver_t * driver = (painter_driver_t *)device;
+ qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
return spi_start(comms_config->chip_select_pin, comms_config->lsb_first, comms_config->mode, comms_config->divisor);
}
@@ -33,8 +33,10 @@ bool qp_comms_spi_start(painter_device_t device) {
uint32_t qp_comms_spi_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
uint32_t bytes_remaining = byte_count;
const uint8_t *p = (const uint8_t *)data;
+ const uint32_t max_msg_length = 1024;
+
while (bytes_remaining > 0) {
- uint32_t bytes_this_loop = bytes_remaining < 1024 ? bytes_remaining : 1024;
+ uint32_t bytes_this_loop = QP_MIN(bytes_remaining, max_msg_length);
spi_transmit(p, bytes_this_loop);
p += bytes_this_loop;
bytes_remaining -= bytes_this_loop;
@@ -44,13 +46,13 @@ uint32_t qp_comms_spi_send_data(painter_device_t device, const void *data, uint3
}
void qp_comms_spi_stop(painter_device_t device) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
- struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
+ painter_driver_t * driver = (painter_driver_t *)device;
+ qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
spi_stop();
writePinHigh(comms_config->chip_select_pin);
}
-const struct painter_comms_vtable_t spi_comms_vtable = {
+const painter_comms_vtable_t spi_comms_vtable = {
.comms_init = qp_comms_spi_init,
.comms_start = qp_comms_spi_start,
.comms_send = qp_comms_spi_send_data,
@@ -67,8 +69,8 @@ bool qp_comms_spi_dc_reset_init(painter_device_t device) {
return false;
}
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
- struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
+ painter_driver_t * driver = (painter_driver_t *)device;
+ qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
// Set up D/C as output low, if specified
if (comms_config->dc_pin != NO_PIN) {
@@ -89,15 +91,15 @@ bool qp_comms_spi_dc_reset_init(painter_device_t device) {
}
uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
- struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
+ painter_driver_t * driver = (painter_driver_t *)device;
+ qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
writePinHigh(comms_config->dc_pin);
return qp_comms_spi_send_data(device, data, byte_count);
}
void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
- struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
+ painter_driver_t * driver = (painter_driver_t *)device;
+ qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
writePinLow(comms_config->dc_pin);
spi_write(cmd);
}
@@ -118,7 +120,7 @@ void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const
}
}
-const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
+const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
.base =
{
.comms_init = qp_comms_spi_dc_reset_init,
diff --git a/drivers/painter/comms/qp_comms_spi.h b/drivers/painter/comms/qp_comms_spi.h
index 9989987327..b3da86d573 100644
--- a/drivers/painter/comms/qp_comms_spi.h
+++ b/drivers/painter/comms/qp_comms_spi.h
@@ -13,36 +13,36 @@
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Base SPI support
-struct qp_comms_spi_config_t {
+typedef struct qp_comms_spi_config_t {
pin_t chip_select_pin;
uint16_t divisor;
bool lsb_first;
int8_t mode;
-};
+} qp_comms_spi_config_t;
bool qp_comms_spi_init(painter_device_t device);
bool qp_comms_spi_start(painter_device_t device);
uint32_t qp_comms_spi_send_data(painter_device_t device, const void* data, uint32_t byte_count);
void qp_comms_spi_stop(painter_device_t device);
-extern const struct painter_comms_vtable_t spi_comms_vtable;
+extern const painter_comms_vtable_t spi_comms_vtable;
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// SPI with D/C and RST pins
# ifdef QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
-struct qp_comms_spi_dc_reset_config_t {
- struct qp_comms_spi_config_t spi_config;
- pin_t dc_pin;
- pin_t reset_pin;
-};
+typedef struct qp_comms_spi_dc_reset_config_t {
+ qp_comms_spi_config_t spi_config;
+ pin_t dc_pin;
+ pin_t reset_pin;
+} qp_comms_spi_dc_reset_config_t;
void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd);
uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void* data, uint32_t byte_count);
void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const uint8_t* sequence, size_t sequence_len);
-extern const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
+extern const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
# endif // QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
diff --git a/drivers/painter/gc9a01/qp_gc9a01.c b/drivers/painter/gc9a01/qp_gc9a01.c
index 5d079435c6..a2eb2cf57c 100644
--- a/drivers/painter/gc9a01/qp_gc9a01.c
+++ b/drivers/painter/gc9a01/qp_gc9a01.c
@@ -1,4 +1,5 @@
// Copyright 2021 Paul Cotter (@gr1mr3aver)
+// Copyright 2023 Nick Brassel (@tzarc)
// SPDX-License-Identifier: GPL-2.0-or-later
#include <wait.h>
@@ -93,7 +94,7 @@ __attribute__((weak)) bool qp_gc9a01_init(painter_device_t device, painter_rotat
// Driver vtable
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-const struct tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = {
+const tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = {
.base =
{
.init = qp_gc9a01_init,
@@ -124,8 +125,8 @@ painter_device_t qp_gc9a01_make_spi_device(uint16_t panel_width, uint16_t panel_
for (uint32_t i = 0; i < GC9A01_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &gc9a01_drivers[i];
if (!driver->base.driver_vtable) {
- driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&gc9a01_driver_vtable;
- driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
+ driver->base.driver_vtable = (const painter_driver_vtable_t *)&gc9a01_driver_vtable;
+ driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.native_bits_per_pixel = 16; // RGB565
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;
@@ -141,6 +142,12 @@ painter_device_t qp_gc9a01_make_spi_device(uint16_t panel_width, uint16_t panel_
driver->spi_dc_reset_config.spi_config.mode = spi_mode;
driver->spi_dc_reset_config.dc_pin = dc_pin;
driver->spi_dc_reset_config.reset_pin = reset_pin;
+
+ if (!qp_internal_register_device((painter_device_t)driver)) {
+ memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t));
+ return NULL;
+ }
+
return (painter_device_t)driver;
}
}
diff --git a/drivers/painter/generic/qp_rgb565_surface.c b/drivers/painter/generic/qp_rgb565_surface.c
index 474c86feec..9c283e0687 100644
--- a/drivers/painter/generic/qp_rgb565_surface.c
+++ b/drivers/painter/generic/qp_rgb565_surface.c
@@ -9,7 +9,7 @@
// Device definition
typedef struct rgb565_surface_painter_device_t {
- struct painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
+ painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
// The target buffer
uint16_t *buffer;
@@ -95,7 +95,7 @@ static inline void stream_pixdata(rgb565_surface_painter_device_t *surface, cons
// Driver vtable
static bool qp_rgb565_surface_init(painter_device_t device, painter_rotation_t rotation) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
+ painter_driver_t * driver = (painter_driver_t *)device;
rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
memset(surface->buffer, 0, driver->panel_width * driver->panel_height * driver->native_bits_per_pixel / 8);
return true;
@@ -107,13 +107,13 @@ static bool qp_rgb565_surface_power(painter_device_t device, bool power_on) {
}
static bool qp_rgb565_surface_clear(painter_device_t device) {
- struct painter_driver_t *driver = (struct painter_driver_t *)device;
+ painter_driver_t *driver = (painter_driver_t *)device;
driver->driver_vtable->init(device, driver->rotation); // Re-init the surface
return true;
}
static bool qp_rgb565_surface_flush(painter_device_t device) {
- struct painter_driver_t * driver = (struct painter_driver_t *)device;
+ painter_driver_t * driver = (painter_driver_t *)device;
rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
surface->dirty_l = surface->dirty_t = UINT16_MAX;
surface->dirty_r = surface->dirty_b = 0;
@@ -122,7 +122,7 @@ static bool qp_rgb565_surface_flush(painter_device_t device) {
}
static bool qp_rgb565_surface