summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rwxr-xr-xdrivers/avr/i2c_master.c213
-rwxr-xr-xdrivers/avr/i2c_master.h27
-rw-r--r--drivers/avr/is31fl3731.c36
3 files changed, 186 insertions, 90 deletions
diff --git a/drivers/avr/i2c_master.c b/drivers/avr/i2c_master.c
index f4a4bb7b0b..4e76e2e7c6 100755
--- a/drivers/avr/i2c_master.c
+++ b/drivers/avr/i2c_master.c
@@ -6,6 +6,7 @@
#include <util/twi.h>
#include "i2c_master.h"
+#include "timer.h"
#define F_SCL 400000UL // SCL frequency
#define Prescaler 1
@@ -13,137 +14,205 @@
void i2c_init(void)
{
+ TWSR = 0; /* no prescaler */
TWBR = (uint8_t)TWBR_val;
}
-uint8_t i2c_start(uint8_t address)
+i2c_status_t i2c_start(uint8_t address, uint16_t timeout)
{
// reset TWI control register
TWCR = 0;
- // transmit START condition
+ // transmit START condition
TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
- // wait for end of transmission
- while( !(TWCR & (1<<TWINT)) );
-
+
+ uint16_t timeout_timer = timer_read();
+ while( !(TWCR & (1<<TWINT)) ) {
+ if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
+ return I2C_STATUS_TIMEOUT;
+ }
+ }
+
// check if the start condition was successfully transmitted
- if((TWSR & 0xF8) != TW_START){ return 1; }
-
+ if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return I2C_STATUS_ERROR; }
+
// load slave address into data register
TWDR = address;
// start transmission of address
TWCR = (1<<TWINT) | (1<<TWEN);
- // wait for end of transmission
- while( !(TWCR & (1<<TWINT)) );
-
+
+ timeout_timer = timer_read();
+ while( !(TWCR & (1<<TWINT)) ) {
+ if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
+ return I2C_STATUS_TIMEOUT;
+ }
+ }
+
// check if the device has acknowledged the READ / WRITE mode
uint8_t twst = TW_STATUS & 0xF8;
- if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return 1;
-
- return 0;
+ if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return I2C_STATUS_ERROR;
+
+ return I2C_STATUS_SUCCESS;
}
-uint8_t i2c_write(uint8_t data)
+i2c_status_t i2c_write(uint8_t data, uint16_t timeout)
{
// load data into data register
TWDR = data;
// start transmission of data
TWCR = (1<<TWINT) | (1<<TWEN);
- // wait for end of transmission
- while( !(TWCR & (1<<TWINT)) );
-
- if( (TWSR & 0xF8) != TW_MT_DATA_ACK ){ return 1; }
-
- return 0;
+
+ uint16_t timeout_timer = timer_read();
+ while( !(TWCR & (1<<TWINT)) ) {
+ if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
+ return I2C_STATUS_TIMEOUT;
+ }
+ }
+
+ if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return I2C_STATUS_ERROR; }
+
+ return I2C_STATUS_SUCCESS;
}
-uint8_t i2c_read_ack(void)
+int16_t i2c_read_ack(uint16_t timeout)
{
-
+
// start TWI module and acknowledge data after reception
- TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWEA);
- // wait for end of transmission
- while( !(TWCR & (1<<TWINT)) );
+ TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWEA);
+
+ uint16_t timeout_timer = timer_read();
+ while( !(TWCR & (1<<TWINT)) ) {
+ if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
+ return I2C_STATUS_TIMEOUT;
+ }
+ }
+
// return received data from TWDR
return TWDR;
}
-uint8_t i2c_read_nack(void)
+int16_t i2c_read_nack(uint16_t timeout)
{
-
+
// start receiving without acknowledging reception
TWCR = (1<<TWINT) | (1<<TWEN);
- // wait for end of transmission
- while( !(TWCR & (1<<TWINT)) );
+
+ uint16_t timeout_timer = timer_read();
+ while( !(TWCR & (1<<TWINT)) ) {
+ if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
+ return I2C_STATUS_TIMEOUT;
+ }
+ }
+
// return received data from TWDR
return TWDR;
}
-uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length)
+i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout)
{
- if (i2c_start(address | I2C_WRITE)) return 1;
-
- for (uint16_t i = 0; i < length; i++)
- {
- if (i2c_write(data[i])) return 1;
+ i2c_status_t status = i2c_start(address | I2C_WRITE, timeout);
+ if (status) return status;
+
+ for (uint16_t i = 0; i < length; i++) {
+ status = i2c_write(data[i], timeout);
+ if (status) return status;
}
-
- i2c_stop();
-
- return 0;
+
+ status = i2c_stop(timeout);
+ if (status) return status;
+
+ return I2C_STATUS_SUCCESS;
}
-uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length)
+i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout)
{
- if (i2c_start(address | I2C_READ)) return 1;
-
- for (uint16_t i = 0; i < (length-1); i++)
- {
- data[i] = i2c_read_ack();
+ i2c_status_t status = i2c_start(address | I2C_READ, timeout);
+ if (status) return status;
+
+ for (uint16_t i = 0; i < (length-1); i++) {
+ status = i2c_read_ack(timeout);
+ if (status >= 0) {
+ data[i] = status;
+ } else {
+ return status;
+ }
}
- data[(length-1)] = i2c_read_nack();
-
- i2c_stop();
-
- return 0;
+
+ status = i2c_read_nack(timeout);
+ if (status >= 0 ) {
+ data[(length-1)] = status;
+ } else {
+ return status;
+ }
+
+ status = i2c_stop(timeout);
+ if (status) return status;
+
+ return I2C_STATUS_SUCCESS;
}
-uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length)
+i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
{
- if (i2c_start(devaddr | 0x00)) return 1;
+ i2c_status_t status = i2c_start(devaddr | 0x00, timeout);
+ if (status) return status;
- i2c_write(regaddr);
+ status = i2c_write(regaddr, timeout);
+ if (status) return status;
- for (uint16_t i = 0; i < length; i++)
- {
- if (i2c_write(data[i])) return 1;
+ for (uint16_t i = 0; i < length; i++) {
+ status = i2c_write(data[i], timeout);
+ if (status) return status;
}
- i2c_stop();
+ status = i2c_stop(timeout);
+ if (status) return status;
- return 0;
+ return I2C_STATUS_SUCCESS;
}
-uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length)
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
{
- if (i2c_start(devaddr)) return 1;
-
- i2c_write(regaddr);
-
- if (i2c_start(devaddr | 0x01)) return 1;
-
- for (uint16_t i = 0; i < (length-1); i++)
- {
- data[i] = i2c_read_ack();
+ i2c_status_t status = i2c_start(devaddr, timeout);
+ if (status) return status;
+
+ status = i2c_write(regaddr, timeout);
+ if (status) return status;
+
+ status = i2c_start(devaddr | 0x01, timeout);
+ if (status) return status;
+
+ for (uint16_t i = 0; i < (length-1); i++) {
+ status = i2c_read_ack(timeout);
+ if (status >= 0) {
+ data[i] = status;
+ } else {
+ return status;
+ }
}
- data[(length-1)] = i2c_read_nack();
- i2c_stop();
+ status = i2c_read_nack(timeout);
+ if (status >= 0 ) {
+ data[(length-1)] = status;
+ } else {
+ return status;
+ }
- return 0;
+ status = i2c_stop(timeout);
+ if (status) return status;
+
+ return I2C_STATUS_SUCCESS;
}
-void i2c_stop(void)
+i2c_status_t i2c_stop(uint16_t timeout)
{
// transmit STOP condition
TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
+
+ uint16_t timeout_timer = timer_read();
+ while(TWCR & (1<<TWSTO)) {
+ if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
+ return I2C_STATUS_TIMEOUT;
+ }
+ }
+
+ return I2C_STATUS_SUCCESS;
}
diff --git a/drivers/avr/i2c_master.h b/drivers/avr/i2c_master.h
index 2479d28d52..cf93680be4 100755
--- a/drivers/avr/i2c_master.h
+++ b/drivers/avr/i2c_master.h
@@ -8,15 +8,24 @@
#define I2C_READ 0x01
#define I2C_WRITE 0x00
+typedef int16_t i2c_status_t;
+
+#define I2C_STATUS_SUCCESS (0)
+#define I2C_STATUS_ERROR (-1)
+#define I2C_STATUS_TIMEOUT (-2)
+
+#define I2C_TIMEOUT_IMMEDIATE (0)
+#define I2C_TIMEOUT_INFINITE (0xFFFF)
+
void i2c_init(void);
-uint8_t i2c_start(uint8_t address);
-uint8_t i2c_write(uint8_t data);
-uint8_t i2c_read_ack(void);
-uint8_t i2c_read_nack(void);
-uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length);
-uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length);
-uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
-uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
-void i2c_stop(void);
+i2c_status_t i2c_start(uint8_t address, uint16_t timeout);
+i2c_status_t i2c_write(uint8_t data, uint16_t timeout);
+int16_t i2c_read_ack(uint16_t timeout);
+int16_t i2c_read_nack(uint16_t timeout);
+i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_stop(uint16_t timeout);
#endif // I2C_MASTER_H
diff --git a/drivers/avr/is31fl3731.c b/drivers/avr/is31fl3731.c
index c7a99e3a3d..70813464b2 100644
--- a/drivers/avr/is31fl3731.c
+++ b/drivers/avr/is31fl3731.c
@@ -49,6 +49,14 @@
#define ISSI_COMMANDREGISTER 0xFD
#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
+#ifndef ISSI_TIMEOUT
+ #define ISSI_TIMEOUT 100
+#endif
+
+#ifndef ISSI_PERSISTENCE
+ #define ISSI_PERSISTENCE 0
+#endif
+
// Transfer buffer for TWITransmitData()
uint8_t g_twi_transfer_buffer[20];
@@ -83,8 +91,14 @@ void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
g_twi_transfer_buffer[0] = reg;
g_twi_transfer_buffer[1] = data;
- //Transmit data until succesful
- while(i2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0);
+ #if ISSI_PERSISTENCE > 0
+ for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
+ if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0)
+ break;
+ }
+ #else
+ i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT);
+ #endif
}
void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
@@ -95,20 +109,24 @@ void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
// g_twi_transfer_buffer[] is 20 bytes
// iterate over the pwm_buffer contents at 16 byte intervals
- for ( int i = 0; i < 144; i += 16 )
- {
+ for ( int i = 0; i < 144; i += 16 ) {
// set the first register, e.g. 0x24, 0x34, 0x44, etc.
g_twi_transfer_buffer[0] = 0x24 + i;
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
- for ( int j = 0; j < 16; j++ )
- {
+ for ( int j = 0; j < 16; j++ ) {
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
}
- //Transmit buffer until succesful
- while(i2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0);
+ #if ISSI_PERSISTENCE > 0
+ for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
+ if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0)
+ break;
+ }
+ #else
+ i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT);
+ #endif
}
}
@@ -165,6 +183,7 @@ void IS31FL3731_init( uint8_t addr )
// most usage after initialization is just writing PWM buffers in bank 0
// as there's not much point in double-buffering
IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
+
}
void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
@@ -217,7 +236,6 @@ void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, b
g_led_control_registers_update_required = true;
-
}
void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-23 12:30:23 +0000