summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/eeprom/eeprom_i2c.h5
-rw-r--r--drivers/eeprom/eeprom_spi.c42
-rw-r--r--drivers/eeprom/eeprom_wear_leveling.c23
-rw-r--r--drivers/flash/flash_spi.c8
-rw-r--r--drivers/gpio/pca9505.c166
-rw-r--r--drivers/gpio/pca9505.h67
-rw-r--r--drivers/led/aw20216.c6
-rw-r--r--drivers/led/ckled2001-simple.c218
-rw-r--r--drivers/led/ckled2001-simple.h337
-rw-r--r--drivers/led/ckled2001.c21
-rw-r--r--drivers/led/ckled2001.h4
-rw-r--r--drivers/led/issi/is31fl3733-simple.c6
-rw-r--r--drivers/led/issi/is31fl3733.c6
-rw-r--r--drivers/led/issi/is31fl3736.c6
-rw-r--r--drivers/led/issi/is31fl3737.c6
-rw-r--r--drivers/led/issi/is31fl3741.c6
-rw-r--r--drivers/painter/gc9a01/qp_gc9a01.c9
-rw-r--r--drivers/painter/ili9xxx/qp_ili9163.c9
-rw-r--r--drivers/painter/ili9xxx/qp_ili9341.c9
-rw-r--r--drivers/painter/ili9xxx/qp_ili9488.c120
-rw-r--r--drivers/painter/ili9xxx/qp_ili9488.h37
-rw-r--r--drivers/painter/ili9xxx/qp_ili9xxx_opcodes.h1
-rw-r--r--drivers/painter/ssd1351/qp_ssd1351.c9
-rw-r--r--drivers/painter/st77xx/qp_st7735.c144
-rw-r--r--drivers/painter/st77xx/qp_st7735.h45
-rw-r--r--drivers/painter/st77xx/qp_st7735_opcodes.h31
-rw-r--r--drivers/painter/st77xx/qp_st7789.c9
-rw-r--r--drivers/painter/tft_panel/qp_tft_panel.c60
-rw-r--r--drivers/painter/tft_panel/qp_tft_panel.h16
-rw-r--r--drivers/ps2/ps2.h1
-rw-r--r--drivers/ps2/ps2_interrupt.c4
-rw-r--r--drivers/ps2/ps2_mouse.c19
-rw-r--r--drivers/sensors/adns5050.h18
-rw-r--r--drivers/sensors/adns9800.h6
-rw-r--r--drivers/sensors/cirque_pinnacle.c289
-rw-r--r--drivers/sensors/cirque_pinnacle.h111
-rw-r--r--drivers/sensors/cirque_pinnacle_gestures.c238
-rw-r--r--drivers/sensors/cirque_pinnacle_gestures.h110
-rw-r--r--drivers/sensors/cirque_pinnacle_i2c.c4
-rw-r--r--drivers/sensors/cirque_pinnacle_regdefs.h405
-rw-r--r--drivers/sensors/cirque_pinnacle_spi.c4
-rw-r--r--drivers/sensors/paw3204.c172
-rw-r--r--drivers/sensors/paw3204.h76
-rw-r--r--drivers/sensors/pimoroni_trackball.c13
-rw-r--r--drivers/sensors/pimoroni_trackball.h1
-rw-r--r--drivers/sensors/pmw3360.c567
-rw-r--r--drivers/sensors/pmw3360.h134
-rw-r--r--drivers/sensors/pmw3360_firmware.h288
-rw-r--r--drivers/sensors/pmw3389.c580
-rw-r--r--drivers/sensors/pmw3389.h135
-rw-r--r--drivers/sensors/pmw3389_firmware.h307
-rw-r--r--drivers/sensors/pmw33xx_common.c219
-rw-r--r--drivers/sensors/pmw33xx_common.h156
-rw-r--r--drivers/serial.h10
-rw-r--r--drivers/wear_leveling/wear_leveling_flash_spi.c101
-rw-r--r--drivers/wear_leveling/wear_leveling_flash_spi_config.h34
56 files changed, 3864 insertions, 1564 deletions
diff --git a/drivers/eeprom/eeprom_i2c.h b/drivers/eeprom/eeprom_i2c.h
index 77eea66d63..85317c9ea5 100644
--- a/drivers/eeprom/eeprom_i2c.h
+++ b/drivers/eeprom/eeprom_i2c.h
@@ -54,6 +54,11 @@
# define EXTERNAL_EEPROM_PAGE_SIZE 32
# define EXTERNAL_EEPROM_ADDRESS_SIZE 2
# define EXTERNAL_EEPROM_WRITE_TIME 5
+#elif defined(EEPROM_I2C_24LC32A)
+# define EXTERNAL_EEPROM_BYTE_COUNT 4096
+# define EXTERNAL_EEPROM_PAGE_SIZE 32
+# define EXTERNAL_EEPROM_ADDRESS_SIZE 2
+# define EXTERNAL_EEPROM_WRITE_TIME 5
#elif defined(EEPROM_I2C_MB85RC256V)
# define EXTERNAL_EEPROM_BYTE_COUNT 32768
# define EXTERNAL_EEPROM_PAGE_SIZE 128
diff --git a/drivers/eeprom/eeprom_spi.c b/drivers/eeprom/eeprom_spi.c
index 25955498c4..51ba25dece 100644
--- a/drivers/eeprom/eeprom_spi.c
+++ b/drivers/eeprom/eeprom_spi.c
@@ -58,14 +58,20 @@ static bool spi_eeprom_start(void) {
static spi_status_t spi_eeprom_wait_while_busy(int timeout) {
uint32_t deadline = timer_read32() + timeout;
- spi_status_t response;
- do {
+ spi_status_t response = SR_WIP;
+ while (response & SR_WIP) {
+ if (!spi_eeprom_start()) {
+ return SPI_STATUS_ERROR;
+ }
+
spi_write(CMD_RDSR);
response = spi_read();
+ spi_stop();
+
if (timer_read32() >= deadline) {
return SPI_STATUS_TIMEOUT;
}
- } while (response & SR_WIP);
+ }
return SPI_STATUS_SUCCESS;
}
@@ -105,27 +111,21 @@ void eeprom_driver_erase(void) {
void eeprom_read_block(void *buf, const void *addr, size_t len) {
//-------------------------------------------------
// Wait for the write-in-progress bit to be cleared
- bool res = spi_eeprom_start();
- if (!res) {
- dprint("failed to start SPI for WIP check\n");
- memset(buf, 0, len);
- return;
- }
-
spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT);
- spi_stop();
- if (response == SPI_STATUS_TIMEOUT) {
- dprint("SPI timeout for WIP check\n");
+ if (response != SPI_STATUS_SUCCESS) {
+ spi_stop();
memset(buf, 0, len);
+ dprint("SPI timeout for WIP check\n");
return;
}
//-------------------------------------------------
// Perform read
- res = spi_eeprom_start();
+ bool res = spi_eeprom_start();
if (!res) {
- dprint("failed to start SPI for read\n");
+ spi_stop();
memset(buf, 0, len);
+ dprint("failed to start SPI for read\n");
return;
}
@@ -158,15 +158,9 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) {
//-------------------------------------------------
// Wait for the write-in-progress bit to be cleared
- res = spi_eeprom_start();
- if (!res) {
- dprint("failed to start SPI for WIP check\n");
- return;
- }
-
spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT);
- spi_stop();
- if (response == SPI_STATUS_TIMEOUT) {
+ if (response != SPI_STATUS_SUCCESS) {
+ spi_stop();
dprint("SPI timeout for WIP check\n");
return;
}
@@ -175,6 +169,7 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) {
// Enable writes
res = spi_eeprom_start();
if (!res) {
+ spi_stop();
dprint("failed to start SPI for write-enable\n");
return;
}
@@ -186,6 +181,7 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) {
// Perform the write
res = spi_eeprom_start();
if (!res) {
+ spi_stop();
dprint("failed to start SPI for write\n");
return;
}
diff --git a/drivers/eeprom/eeprom_wear_leveling.c b/drivers/eeprom/eeprom_wear_leveling.c
new file mode 100644
index 0000000000..bd77eef35c
--- /dev/null
+++ b/drivers/eeprom/eeprom_wear_leveling.c
@@ -0,0 +1,23 @@
+// Copyright 2022 Nick Brassel (@tzarc)
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <stdint.h>
+#include <string.h>
+
+#include "eeprom_driver.h"
+#include "wear_leveling.h"
+
+void eeprom_driver_init(void) {
+ wear_leveling_init();
+}
+
+void eeprom_driver_erase(void) {
+ wear_leveling_erase();
+}
+
+void eeprom_read_block(void *buf, const void *addr, size_t len) {
+ wear_leveling_read((uint32_t)addr, buf, len);
+}
+
+void eeprom_write_block(const void *buf, void *addr, size_t len) {
+ wear_leveling_write((uint32_t)addr, buf, len);
+}
diff --git a/drivers/flash/flash_spi.c b/drivers/flash/flash_spi.c
index 684ee06d71..0c0eb8a99e 100644
--- a/drivers/flash/flash_spi.c
+++ b/drivers/flash/flash_spi.c
@@ -207,7 +207,7 @@ flash_status_t flash_erase_sector(uint32_t addr) {
/* Check that the address exceeds the limit. */
if ((addr + (EXTERNAL_FLASH_SECTOR_SIZE)) >= (EXTERNAL_FLASH_SIZE) || ((addr % (EXTERNAL_FLASH_SECTOR_SIZE)) != 0)) {
- dprintf("Flash erase sector address over limit! [addr:0x%x]\n", (uint32_t)addr);
+ dprintf("Flash erase sector address over limit! [addr:0x%lx]\n", (uint32_t)addr);
return FLASH_STATUS_ERROR;
}
@@ -247,7 +247,7 @@ flash_status_t flash_erase_block(uint32_t addr) {
/* Check that the address exceeds the limit. */
if ((addr + (EXTERNAL_FLASH_BLOCK_SIZE)) >= (EXTERNAL_FLASH_SIZE) || ((addr % (EXTERNAL_FLASH_BLOCK_SIZE)) != 0)) {
- dprintf("Flash erase block address over limit! [addr:0x%x]\n", (uint32_t)addr);
+ dprintf("Flash erase block address over limit! [addr:0x%lx]\n", (uint32_t)addr);
return FLASH_STATUS_ERROR;
}
@@ -303,7 +303,7 @@ flash_status_t flash_read_block(uint32_t addr, void *buf, size_t len) {
}
#if defined(CONSOLE_ENABLE) && defined(DEBUG_FLASH_SPI_OUTPUT)
- dprintf("[SPI FLASH R] 0x%08lX: ", addr);
+ dprintf("[SPI FLASH R] 0x%08lx: ", addr);
for (size_t i = 0; i < len; ++i) {
dprintf(" %02X", (int)(((uint8_t *)read_buf)[i]));
}
@@ -339,7 +339,7 @@ flash_status_t flash_write_block(uint32_t addr, const void *buf, size_t len) {
}
#if defined(CONSOLE_ENABLE) && defined(DEBUG_FLASH_SPI_OUTPUT)
- dprintf("[SPI FLASH W] 0x%08lX: ", addr);
+ dprintf("[SPI FLASH W] 0x%08lx: ", addr);
for (size_t i = 0; i < write_length; i++) {
dprintf(" %02X", (int)(uint8_t)(write_buf[i]));
}
diff --git a/drivers/gpio/pca9505.c b/drivers/gpio/pca9505.c
new file mode 100644
index 0000000000..5803746c96
--- /dev/null
+++ b/drivers/gpio/pca9505.c
@@ -0,0 +1,166 @@
+// Copyright 2022 nirim000
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "i2c_master.h"
+#include "pca9505.h"
+
+#include "debug.h"
+
+#define SLAVE_TO_ADDR(n) (n << 1)
+#define TIMEOUT 100
+
+enum {
+ CMD_INPUT_0 = 0,
+ CMD_INPUT_1,
+ CMD_INPUT_2,
+ CMD_INPUT_3,
+ CMD_INPUT_4,
+ CMD_OUTPUT_0 = 8,
+ CMD_OUTPUT_1,
+ CMD_OUTPUT_2,
+ CMD_OUTPUT_3,
+ CMD_OUTPUT_4,
+ CMD_INVERSION_0 = 16,
+ CMD_INVERSION_1,
+ CMD_INVERSION_2,
+ CMD_INVERSION_3,
+ CMD_INVERSION_4,
+ CMD_CONFIG_0 = 24,
+ CMD_CONFIG_1,
+ CMD_CONFIG_2,
+ CMD_CONFIG_3,
+ CMD_CONFIG_4,
+};
+
+void pca9505_init(uint8_t slave_addr) {
+ static uint8_t s_init = 0;
+ if (!s_init) {
+ i2c_init();
+
+ s_init = 1;
+ }
+
+ // TODO: could check device connected
+ // i2c_start(SLAVE_TO_ADDR(slave) | I2C_WRITE);
+ // i2c_stop();
+}
+
+bool pca9505_set_config(uint8_t slave_addr, pca9505_port_t port, uint8_t conf) {
+ uint8_t addr = SLAVE_TO_ADDR(slave_addr);
+ uint8_t cmd = 0;
+ switch (port) {
+ case 0:
+ cmd = CMD_CONFIG_0;
+ break;
+ case 1:
+ cmd = CMD_CONFIG_1;
+ break;
+ case 2:
+ cmd = CMD_CONFIG_2;
+ break;
+ case 3:
+ cmd = CMD_CONFIG_3;
+ break;
+ case 4:
+ cmd = CMD_CONFIG_4;
+ break;
+ }
+
+ i2c_status_t ret = i2c_writeReg(addr, cmd, &conf, sizeof(conf), TIMEOUT);
+ if (ret != I2C_STATUS_SUCCESS) {
+ print("pca9505_set_config::FAILED\n");
+ return false;
+ }
+
+ return true;
+}
+
+bool pca9505_set_polarity(uint8_t slave_addr, pca9505_port_t port, uint8_t conf) {
+ uint8_t addr = SLAVE_TO_ADDR(slave_addr);
+ uint8_t cmd = 0;
+ switch (port) {
+ case 0:
+ cmd = CMD_INVERSION_0;
+ break;
+ case 1:
+ cmd = CMD_INVERSION_1;
+ break;
+ case 2:
+ cmd = CMD_INVERSION_2;
+ break;
+ case 3:
+ cmd = CMD_INVERSION_3;
+ break;
+ case 4:
+ cmd = CMD_INVERSION_4;
+ break;
+ }
+
+ i2c_status_t ret = i2c_writeReg(addr, cmd, &conf, sizeof(conf), TIMEOUT);
+ if (ret != I2C_STATUS_SUCCESS) {
+ print("pca9505_set_polarity::FAILED\n");
+ return false;
+ }
+
+ return true;
+}
+
+bool pca9505_set_output(uint8_t slave_addr, pca9505_port_t port, uint8_t conf) {
+ uint8_t addr = SLAVE_TO_ADDR(slave_addr);
+ uint8_t cmd = 0;
+ switch (port) {
+ case 0:
+ cmd = CMD_OUTPUT_0;
+ break;
+ case 1:
+ cmd = CMD_OUTPUT_1;
+ break;
+ case 2:
+ cmd = CMD_OUTPUT_2;
+ break;
+ case 3:
+ cmd = CMD_OUTPUT_3;
+ break;
+ case 4:
+ cmd = CMD_OUTPUT_4;
+ break;
+ }
+
+ i2c_status_t ret = i2c_writeReg(addr, cmd, &conf, sizeof(conf), TIMEOUT);
+ if (ret != I2C_STATUS_SUCCESS) {
+ print("pca9505_set_output::FAILED\n");
+ return false;
+ }
+
+ return true;
+}
+
+bool pca9505_readPins(uint8_t slave_addr, pca9505_port_t port, uint8_t* out) {
+ uint8_t addr = SLAVE_TO_ADDR(slave_addr);
+ uint8_t cmd = 0;
+ switch (port) {
+ case 0:
+ cmd = CMD_INPUT_0;
+ break;
+ case 1:
+ cmd = CMD_INPUT_1;
+ break;
+ case 2:
+ cmd = CMD_INPUT_2;
+ break;
+ case 3:
+ cmd = CMD_INPUT_3;
+ break;
+ case 4:
+ cmd = CMD_INPUT_4;
+ break;
+ }
+
+ i2c_status_t ret = i2c_readReg(addr, cmd, out, sizeof(uint8_t), TIMEOUT);
+ if (ret != I2C_STATUS_SUCCESS) {
+ print("pca9505_readPins::FAILED\n");
+ return false;
+ }
+
+ return true;
+}
diff --git a/drivers/gpio/pca9505.h b/drivers/gpio/pca9505.h
new file mode 100644
index 0000000000..732ddb88ea
--- /dev/null
+++ b/drivers/gpio/pca9505.h
@@ -0,0 +1,67 @@
+// Copyright 2022 nirim000
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * Port ID
+ */
+typedef enum {
+ PCA9505_PORT0,
+ PCA9505_PORT1,
+ PCA9505_PORT2,
+ PCA9505_PORT3,
+ PCA9505_PORT4,
+} pca9505_port_t;
+
+/**
+ * Helpers for set_config
+ */
+enum {
+ ALL_NORMAL = 0,
+ ALL_INVERTED = 0xFF,
+};
+
+/**
+ * Helpers for set_config
+ */
+enum {
+ ALL_OUTPUT = 0,
+ ALL_INPUT = 0xFF,
+};
+
+/**
+ * Helpers for set_output
+ */
+enum {
+ ALL_LOW = 0,
+ ALL_HIGH = 0xFF,
+};
+
+/**
+ * Init expander and any other dependent drivers
+ */
+void pca9505_init(uint8_t slave_addr);
+
+/**
+ * Configure input/output to a given port
+ */
+bool pca9505_set_config(uint8_t slave_addr, pca9505_port_t port, uint8_t conf);
+
+/**
+ * Configure polarity to a given port
+ */
+bool pca9505_set_polarity(uint8_t slave_addr, pca9505_port_t port, uint8_t conf);
+
+/**
+ * Write high/low to a given port
+ */
+bool pca9505_set_output(uint8_t slave_addr, pca9505_port_t port, uint8_t conf);
+
+/**
+ * Read state of a given port
+ */
+bool pca9505_readPins(uint8_t slave_addr, pca9505_port_t port, uint8_t* ret);
diff --git a/drivers/led/aw20216.c b/drivers/led/aw20216.c
index 448accdcd3..55083936ef 100644
--- a/drivers/led/aw20216.c
+++ b/drivers/led/aw20216.c
@@ -53,6 +53,10 @@
# define AW_GLOBAL_CURRENT_MAX 150
#endif
+#ifndef AW_SPI_MODE
+# define AW_SPI_MODE 0
+#endif
+
#ifndef AW_SPI_DIVISOR
# define AW_SPI_DIVISOR 4
#endif
@@ -63,7 +67,7 @@ bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
bool AW20216_write(pin_t cs_pin, uint8_t page, uint8_t reg, uint8_t* data, uint8_t len) {
static uint8_t s_spi_transfer_buffer[2] = {0};
- if (!spi_start(cs_pin, false, 3, AW_SPI_DIVISOR)) {
+ if (!spi_start(cs_pin, false, AW_SPI_MODE, AW_SPI_DIVISOR)) {
spi_stop();
return false;
}
diff --git a/drivers/led/ckled2001-simple.c b/drivers/led/ckled2001-simple.c
new file mode 100644
index 0000000000..da4bf20b99
--- /dev/null
+++ b/drivers/led/ckled2001-simple.c
@@ -0,0 +1,218 @@
+/* Copyright 2021 @ Keychron (https://www.keychron.com)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "ckled2001-simple.h"
+#include "i2c_master.h"
+#include "wait.h"
+
+#ifndef CKLED2001_TIMEOUT
+# define CKLED2001_TIMEOUT 100
+#endif
+
+#ifndef CKLED2001_PERSISTENCE
+# define CKLED2001_PERSISTENCE 0
+#endif
+
+#ifndef PHASE_CHANNEL
+# define PHASE_CHANNEL MSKPHASE_12CHANNEL
+#endif
+
+#ifndef CKLED2001_CURRENT_TUNE
+# define CKLED2001_CURRENT_TUNE \
+ { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+#endif
+
+// Transfer buffer for TWITransmitData()
+uint8_t g_twi_transfer_buffer[20];
+
+// These buffers match the CKLED2001 PWM registers.
+// The control buffers match the PG0 LED On/Off registers.
+// Storing them like this is optimal for I2C transfers to the registers.
+// We could optimize this and take out the unused registers from these
+// buffers and the transfers in CKLED2001_write_pwm_buffer() but it's
+// probably not worth the extra complexity.
+uint8_t g_pwm_buffer[DRIVER_COUNT][192];
+bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
+
+uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
+bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
+
+bool CKLED2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
+ // If the transaction fails function returns false.
+ g_twi_transfer_buffer[0] = reg;
+ g_twi_transfer_buffer[1] = data;
+
+#if CKLED2001_PERSISTENCE > 0
+ for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) {
+ if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) {
+ return false;
+ }
+ }
+#else
+ if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) {
+ return false;
+ }
+#endif
+ return true;
+}
+
+bool CKLED2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
+ // Assumes PG1 is already selected.
+ // If any of the transactions fails function returns false.
+ // Transmit PWM registers in 12 transfers of 16 bytes.
+ // g_twi_transfer_buffer[] is 20 bytes
+
+ // Iterate over the pwm_buffer contents at 16 byte intervals.
+ for (int i = 0; i < 192; i += 16) {
+ g_twi_transfer_buffer[0] = i;
+ // Copy the data from i to i+15.
+ // Device will auto-increment register for data after the first byte
+ // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer.
+ for (int j = 0; j < 16; j++) {
+ g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
+ }
+
+#if CKLED2001_PERSISTENCE > 0
+ for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) {
+ if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) {
+ return false;
+ }
+ }
+#else
+ if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) {
+ return false;
+ }
+#endif
+ }
+ return true;
+}
+
+void CKLED2001_init(uint8_t addr) {
+ // Select to function page
+ CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
+ // Setting LED driver to shutdown mode
+ CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
+ // Setting internal channel pulldown/pullup
+ CKLED2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL);
+ // Select number of scan phase
+ CKLED2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL);
+ // Setting PWM Delay Phase
+ CKLED2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE);
+ // Setting Driving/Sinking Channel Slew Rate
+ CKLED2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE);
+ // Setting Iref
+ CKLED2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE);
+ // Set LED CONTROL PAGE (Page 0)
+ CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
+ for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
+ CKLED2001_write_register(addr, i, 0x00);
+ }
+
+ // Set PWM PAGE (Page 1)
+ CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
+ for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
+ CKLED2001_write_register(addr, i, 0x00);
+ }
+
+ // Set CURRENT PAGE (Page 4)
+ uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE;
+ CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE);
+ for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
+ CKLED2001_write_register(addr, i, current_tuen_reg_list[i]);
+ }
+
+ // Enable LEDs ON/OFF
+ CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
+ for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
+ CKLED2001_write_register(addr, i, 0xFF);
+ }
+
+ // Select to function page
+ CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
+ // Setting LED driver to normal mode
+ CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
+}
+
+void CKLED2001_set_value(int index, uint8_t value) {
+ ckled2001_led led;
+ if (index >= 0 && index < DRIVER_LED_TOTAL) {
+ memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led));
+
+ g_pwm_buffer[led.driver][led.v] = value;
+ g_pwm_buffer_update_required[led.driver] = true;
+ }
+}
+
+void CKLED2001_set_value_all(uint8_t value) {
+ for (int i = 0; i < DRIVER_LED_TOTAL; i++) {
+ CKLED2001_set_value(i, value);
+ }
+}
+
+void CKLED2001_set_led_control_register(uint8_t index, bool value) {
+ ckled2001_led led;
+ memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led));
+
+ uint8_t control_register = led.v / 8;
+ uint8_t bit_value = led.v