diff options
Diffstat (limited to 'drivers/boards/BLACKPILL_STM32_F411/board.c')
| -rw-r--r-- | drivers/boards/BLACKPILL_STM32_F411/board.c | 155 |
1 files changed, 68 insertions, 87 deletions
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.c b/drivers/boards/BLACKPILL_STM32_F411/board.c index a06b52d14b..330e06c8aa 100644 --- a/drivers/boards/BLACKPILL_STM32_F411/board.c +++ b/drivers/boards/BLACKPILL_STM32_F411/board.c @@ -38,13 +38,13 @@ * @brief Type of STM32 GPIO port setup. */ typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; } gpio_setup_t; /** @@ -52,37 +52,37 @@ typedef struct { */ typedef struct { #if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; + gpio_setup_t PAData; #endif #if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; + gpio_setup_t PBData; #endif #if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; + gpio_setup_t PCData; #endif #if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; + gpio_setup_t PDData; #endif #if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; + gpio_setup_t PEData; #endif #if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; + gpio_setup_t PFData; #endif #if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; + gpio_setup_t PGData; #endif #if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; + gpio_setup_t PHData; #endif #if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; + gpio_setup_t PIData; #endif #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; + gpio_setup_t PJData; #endif #if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; + gpio_setup_t PKData; #endif } gpio_config_t; @@ -91,48 +91,37 @@ typedef struct { */ static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, #endif #if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, #endif #if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, #endif #if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, #endif #if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, #endif #if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, #endif #if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, #endif #if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, #endif #if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, #endif #if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, - VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, #endif #if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, - VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; @@ -141,56 +130,54 @@ static const gpio_config_t gpio_default_config = { /*===========================================================================*/ static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; } static void stm32_gpio_init(void) { + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB1(STM32_GPIO_EN_MASK); - rccEnableAHB1(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ + /* Initializing all the defined GPIO ports.*/ #if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); + gpio_init(GPIOA, &gpio_default_config.PAData); #endif #if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); + gpio_init(GPIOB, &gpio_default_config.PBData); #endif #if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); + gpio_init(GPIOC, &gpio_default_config.PCData); #endif #if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); + gpio_init(GPIOD, &gpio_default_config.PDData); #endif #if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); + gpio_init(GPIOE, &gpio_default_config.PEData); #endif #if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); + gpio_init(GPIOF, &gpio_default_config.PFData); #endif #if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); + gpio_init(GPIOG, &gpio_default_config.PGData); #endif #if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); + gpio_init(GPIOH, &gpio_default_config.PHData); #endif #if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); + gpio_init(GPIOI, &gpio_default_config.PIData); #endif #if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif #if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); + gpio_init(GPIOK, &gpio_default_config.PKData); #endif } @@ -210,10 +197,10 @@ __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} * else. */ void __early_init(void) { - enter_bootloader_mode_if_requested(); + enter_bootloader_mode_if_requested(); - stm32_gpio_init(); - stm32_clock_init(); + stm32_gpio_init(); + stm32_clock_init(); } #if HAL_USE_SDC || defined(__DOXYGEN__) @@ -221,20 +208,18 @@ void __early_init(void) { * @brief SDC card detection. */ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; } /** * @brief SDC card write protection detection. */ bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; } #endif /* HAL_USE_SDC */ @@ -243,20 +228,18 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) { * @brief MMC_SPI card detection. */ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; + (void)mmcp; + /* TODO: Fill the implementation.*/ + return true; } /** * @brief MMC_SPI card write protection detection. */ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; + (void)mmcp; + /* TODO: Fill the implementation.*/ + return false; } #endif @@ -264,6 +247,4 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @brief Board-specific initialization code. * @todo Add your board-specific code, if any. */ -void boardInit(void) { - -} +void boardInit(void) {} |