diff options
author | Jack Humbert <jack.humb@gmail.com> | 2017-07-07 11:55:23 -0400 |
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committer | Jack Humbert <jack.humb@gmail.com> | 2017-07-07 11:55:23 -0400 |
commit | 8655d4f4948b2deef7844503c8d690f23ac1a062 (patch) | |
tree | b2c6effc9d6cd5b5b43933a1e53b8bf17e9e82cf /lib/lufa/Projects/AVRISP-MKII/Lib | |
parent | 1896c76a2928c96f9ab7947bec2ef8dd37623cff (diff) | |
parent | 60b30c036397cb5627fa374bb930794b225daa29 (diff) |
Merge commit '60b30c036397cb5627fa374bb930794b225daa29' as 'lib/lufa'
Diffstat (limited to 'lib/lufa/Projects/AVRISP-MKII/Lib')
17 files changed, 3818 insertions, 0 deletions
diff --git a/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPProtocol.c b/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPProtocol.c new file mode 100644 index 0000000000..6553504d5e --- /dev/null +++ b/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPProtocol.c @@ -0,0 +1,531 @@ +/* + LUFA Library + Copyright (C) Dean Camera, 2017. + + dean [at] fourwalledcubicle [dot] com + www.lufa-lib.org +*/ + +/* + Copyright 2017 Dean Camera (dean [at] fourwalledcubicle [dot] com) + + Permission to use, copy, modify, distribute, and sell this + software and its documentation for any purpose is hereby granted + without fee, provided that the above copyright notice appear in + all copies and that both that the copyright notice and this + permission notice and warranty disclaimer appear in supporting + documentation, and that the name of the author not be used in + advertising or publicity pertaining to distribution of the + software without specific, written prior permission. + + The author disclaims all warranties with regard to this + software, including all implied warranties of merchantability + and fitness. In no event shall the author be liable for any + special, indirect or consequential damages or any damages + whatsoever resulting from loss of use, data or profits, whether + in an action of contract, negligence or other tortious action, + arising out of or in connection with the use or performance of + this software. +*/ + +/** \file + * + * ISP Protocol handler, to process V2 Protocol wrapped ISP commands used in Atmel programmer devices. + */ + +#include "ISPProtocol.h" + +#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__) + +/** Handler for the CMD_ENTER_PROGMODE_ISP command, which attempts to enter programming mode on + * the attached device, returning success or failure back to the host. + */ +void ISPProtocol_EnterISPMode(void) +{ + struct + { + uint8_t TimeoutMS; + uint8_t PinStabDelayMS; + uint8_t ExecutionDelayMS; + uint8_t SynchLoops; + uint8_t ByteDelay; + uint8_t PollValue; + uint8_t PollIndex; + uint8_t EnterProgBytes[4]; + } Enter_ISP_Params; + + Endpoint_Read_Stream_LE(&Enter_ISP_Params, sizeof(Enter_ISP_Params), NULL); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + uint8_t ResponseStatus = STATUS_CMD_FAILED; + + CurrentAddress = 0; + + /* Perform execution delay, initialize SPI bus */ + ISPProtocol_DelayMS(Enter_ISP_Params.ExecutionDelayMS); + ISPTarget_EnableTargetISP(); + + ISPTarget_ChangeTargetResetLine(true); + ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS); + + /* Continuously attempt to synchronize with the target until either the number of attempts specified + * by the host has exceeded, or the the device sends back the expected response values */ + while (Enter_ISP_Params.SynchLoops-- && TimeoutTicksRemaining) + { + uint8_t ResponseBytes[4]; + + for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++) + { + ISPProtocol_DelayMS(Enter_ISP_Params.ByteDelay); + ResponseBytes[RByte] = ISPTarget_TransferByte(Enter_ISP_Params.EnterProgBytes[RByte]); + } + + /* Check if polling disabled, or if the polled value matches the expected value */ + if (!(Enter_ISP_Params.PollIndex) || (ResponseBytes[Enter_ISP_Params.PollIndex - 1] == Enter_ISP_Params.PollValue)) + { + ResponseStatus = STATUS_CMD_OK; + break; + } + else + { + ISPTarget_ChangeTargetResetLine(false); + ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS); + ISPTarget_ChangeTargetResetLine(true); + ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS); + } + } + + Endpoint_Write_8(CMD_ENTER_PROGMODE_ISP); + Endpoint_Write_8(ResponseStatus); + Endpoint_ClearIN(); +} + +/** Handler for the CMD_LEAVE_ISP command, which releases the target from programming mode. */ +void ISPProtocol_LeaveISPMode(void) +{ + struct + { + uint8_t PreDelayMS; + uint8_t PostDelayMS; + } Leave_ISP_Params; + + Endpoint_Read_Stream_LE(&Leave_ISP_Params, sizeof(Leave_ISP_Params), NULL); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + /* Perform pre-exit delay, release the target /RESET, disable the SPI bus and perform the post-exit delay */ + ISPProtocol_DelayMS(Leave_ISP_Params.PreDelayMS); + ISPTarget_ChangeTargetResetLine(false); + ISPTarget_DisableTargetISP(); + ISPProtocol_DelayMS(Leave_ISP_Params.PostDelayMS); + + Endpoint_Write_8(CMD_LEAVE_PROGMODE_ISP); + Endpoint_Write_8(STATUS_CMD_OK); + Endpoint_ClearIN(); +} + +/** Handler for the CMD_PROGRAM_FLASH_ISP and CMD_PROGRAM_EEPROM_ISP commands, writing out bytes, + * words or pages of data to the attached device. + * + * \param[in] V2Command Issued V2 Protocol command byte from the host + */ +void ISPProtocol_ProgramMemory(uint8_t V2Command) +{ + struct + { + uint16_t BytesToWrite; + uint8_t ProgrammingMode; + uint8_t DelayMS; + uint8_t ProgrammingCommands[3]; + uint8_t PollValue1; + uint8_t PollValue2; + uint8_t ProgData[256]; // Note, the Jungo driver has a very short ACK timeout period, need to buffer the + } Write_Memory_Params; // whole page and ACK the packet as fast as possible to prevent it from aborting + + Endpoint_Read_Stream_LE(&Write_Memory_Params, (sizeof(Write_Memory_Params) - + sizeof(Write_Memory_Params.ProgData)), NULL); + Write_Memory_Params.BytesToWrite = SwapEndian_16(Write_Memory_Params.BytesToWrite); + + if (Write_Memory_Params.BytesToWrite > sizeof(Write_Memory_Params.ProgData)) + { + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + Endpoint_Write_8(V2Command); + Endpoint_Write_8(STATUS_CMD_FAILED); + Endpoint_ClearIN(); + return; + } + + Endpoint_Read_Stream_LE(&Write_Memory_Params.ProgData, Write_Memory_Params.BytesToWrite, NULL); + + // The driver will terminate transfers that are a round multiple of the endpoint bank in size with a ZLP, need + // to catch this and discard it before continuing on with packet processing to prevent communication issues + if (((sizeof(uint8_t) + sizeof(Write_Memory_Params) - sizeof(Write_Memory_Params.ProgData)) + + Write_Memory_Params.BytesToWrite) % AVRISP_DATA_EPSIZE == 0) + { + Endpoint_ClearOUT(); + Endpoint_WaitUntilReady(); + } + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + uint8_t ProgrammingStatus = STATUS_CMD_OK; + uint8_t PollValue = (V2Command == CMD_PROGRAM_FLASH_ISP) ? Write_Memory_Params.PollValue1 : + Write_Memory_Params.PollValue2; + uint16_t PollAddress = 0; + uint8_t* NextWriteByte = Write_Memory_Params.ProgData; + uint16_t PageStartAddress = (CurrentAddress & 0xFFFF); + + for (uint16_t CurrentByte = 0; CurrentByte < Write_Memory_Params.BytesToWrite; CurrentByte++) + { + uint8_t ByteToWrite = *(NextWriteByte++); + uint8_t ProgrammingMode = Write_Memory_Params.ProgrammingMode; + + /* Check to see if we need to send a LOAD EXTENDED ADDRESS command to the target */ + if (MustLoadExtendedAddress) + { + ISPTarget_LoadExtendedAddress(); + MustLoadExtendedAddress = false; + } + + ISPTarget_SendByte(Write_Memory_Params.ProgrammingCommands[0]); + ISPTarget_SendByte(CurrentAddress >> 8); + ISPTarget_SendByte(CurrentAddress & 0xFF); + ISPTarget_SendByte(ByteToWrite); + + /* AVR FLASH addressing requires us to modify the write command based on if we are writing a high + * or low byte at the current word address */ + if (V2Command == CMD_PROGRAM_FLASH_ISP) + Write_Memory_Params.ProgrammingCommands[0] ^= READ_WRITE_HIGH_BYTE_MASK; + + /* Check to see if we have a valid polling address */ + if (!(PollAddress) && (ByteToWrite != PollValue)) + { + if ((CurrentByte & 0x01) && (V2Command == CMD_PROGRAM_FLASH_ISP)) + Write_Memory_Params.ProgrammingCommands[2] |= READ_WRITE_HIGH_BYTE_MASK; + else + Write_Memory_Params.ProgrammingCommands[2] &= ~READ_WRITE_HIGH_BYTE_MASK; + + PollAddress = (CurrentAddress & 0xFFFF); + } + + /* If in word programming mode, commit the byte to the target's memory */ + if (!(ProgrammingMode & PROG_MODE_PAGED_WRITES_MASK)) + { + /* If the current polling address is invalid, switch to timed delay write completion mode */ + if (!(PollAddress) && !(ProgrammingMode & PROG_MODE_WORD_READYBUSY_MASK)) + ProgrammingMode = (ProgrammingMode & ~PROG_MODE_WORD_VALUE_MASK) | PROG_MODE_WORD_TIMEDELAY_MASK; + + ProgrammingStatus = ISPTarget_WaitForProgComplete(ProgrammingMode, PollAddress, PollValue, + Write_Memory_Params.DelayMS, + Write_Memory_Params.ProgrammingCommands[2]); + + /* Abort the programming loop early if the byte/word programming failed */ + if (ProgrammingStatus != STATUS_CMD_OK) + break; + + /* Must reset the polling address afterwards, so it is not erroneously used for the next byte */ + PollAddress = 0; + } + + /* EEPROM just increments the address each byte, flash needs to increment on each word and + * also check to ensure that a LOAD EXTENDED ADDRESS command is issued each time the extended + * address boundary has been crossed during FLASH memory programming */ + if ((CurrentByte & 0x01) || (V2Command == CMD_PROGRAM_EEPROM_ISP)) + { + CurrentAddress++; + + if ((V2Command == CMD_PROGRAM_FLASH_ISP) && !(CurrentAddress & 0xFFFF)) + MustLoadExtendedAddress = true; + } + } + + /* If the current page must be committed, send the PROGRAM PAGE command to the target */ + if (Write_Memory_Params.ProgrammingMode & PROG_MODE_COMMIT_PAGE_MASK) + { + ISPTarget_SendByte(Write_Memory_Params.ProgrammingCommands[1]); + ISPTarget_SendByte(PageStartAddress >> 8); + ISPTarget_SendByte(PageStartAddress & 0xFF); + ISPTarget_SendByte(0x00); + + /* Check if polling is enabled and possible, if not switch to timed delay mode */ + if ((Write_Memory_Params.ProgrammingMode & PROG_MODE_PAGED_VALUE_MASK) && !(PollAddress)) + { + Write_Memory_Params.ProgrammingMode = (Write_Memory_Params.ProgrammingMode & ~PROG_MODE_PAGED_VALUE_MASK) | + PROG_MODE_PAGED_TIMEDELAY_MASK; + } + + ProgrammingStatus = ISPTarget_WaitForProgComplete(Write_Memory_Params.ProgrammingMode, PollAddress, PollValue, + Write_Memory_Params.DelayMS, + Write_Memory_Params.ProgrammingCommands[2]); + + /* Check to see if the FLASH address has crossed the extended address boundary */ + if ((V2Command == CMD_PROGRAM_FLASH_ISP) && !(CurrentAddress & 0xFFFF)) + MustLoadExtendedAddress = true; + } + + Endpoint_Write_8(V2Command); + Endpoint_Write_8(ProgrammingStatus); + Endpoint_ClearIN(); +} + +/** Handler for the CMD_READ_FLASH_ISP and CMD_READ_EEPROM_ISP commands, reading in bytes, + * words or pages of data from the attached device. + * + * \param[in] V2Command Issued V2 Protocol command byte from the host + */ +void ISPProtocol_ReadMemory(uint8_t V2Command) +{ + struct + { + uint16_t BytesToRead; + uint8_t ReadMemoryCommand; + } Read_Memory_Params; + + Endpoint_Read_Stream_LE(&Read_Memory_Params, sizeof(Read_Memory_Params), NULL); + Read_Memory_Params.BytesToRead = SwapEndian_16(Read_Memory_Params.BytesToRead); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + Endpoint_Write_8(V2Command); + Endpoint_Write_8(STATUS_CMD_OK); + + /* Read each byte from the device and write them to the packet for the host */ + for (uint16_t CurrentByte = 0; CurrentByte < Read_Memory_Params.BytesToRead; CurrentByte++) + { + /* Check to see if we need to send a LOAD EXTENDED ADDRESS command to the target */ + if (MustLoadExtendedAddress) + { + ISPTarget_LoadExtendedAddress(); + MustLoadExtendedAddress = false; + } + + /* Read the next byte from the desired memory space in the device */ + ISPTarget_SendByte(Read_Memory_Params.ReadMemoryCommand); + ISPTarget_SendByte(CurrentAddress >> 8); + ISPTarget_SendByte(CurrentAddress & 0xFF); + Endpoint_Write_8(ISPTarget_ReceiveByte()); + + /* Check if the endpoint bank is currently full, if so send the packet */ + if (!(Endpoint_IsReadWriteAllowed())) + { + Endpoint_ClearIN(); + Endpoint_WaitUntilReady(); + } + + /* AVR FLASH addressing requires us to modify the read command based on if we are reading a high + * or low byte at the current word address */ + if (V2Command == CMD_READ_FLASH_ISP) + Read_Memory_Params.ReadMemoryCommand ^= READ_WRITE_HIGH_BYTE_MASK; + + /* EEPROM just increments the address each byte, flash needs to increment on each word and + * also check to ensure that a LOAD EXTENDED ADDRESS command is issued each time the extended + * address boundary has been crossed */ + if ((CurrentByte & 0x01) || (V2Command == CMD_READ_EEPROM_ISP)) + { + CurrentAddress++; + + if ((V2Command != CMD_READ_EEPROM_ISP) && !(CurrentAddress & 0xFFFF)) + MustLoadExtendedAddress = true; + } + } + + Endpoint_Write_8(STATUS_CMD_OK); + + bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed()); + Endpoint_ClearIN(); + + /* Ensure last packet is a short packet to terminate the transfer */ + if (IsEndpointFull) + { + Endpoint_WaitUntilReady(); + Endpoint_ClearIN(); + Endpoint_WaitUntilReady(); + } +} + +/** Handler for the CMD_CHI_ERASE_ISP command, clearing the target's FLASH memory. */ +void ISPProtocol_ChipErase(void) +{ + struct + { + uint8_t EraseDelayMS; + uint8_t PollMethod; + uint8_t EraseCommandBytes[4]; + } Erase_Chip_Params; + + Endpoint_Read_Stream_LE(&Erase_Chip_Params, sizeof(Erase_Chip_Params), NULL); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + uint8_t ResponseStatus = STATUS_CMD_OK; + + /* Send the chip erase commands as given by the host to the device */ + for (uint8_t SByte = 0; SByte < sizeof(Erase_Chip_Params.EraseCommandBytes); SByte++) + ISPTarget_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]); + + /* Use appropriate command completion check as given by the host (delay or busy polling) */ + if (!(Erase_Chip_Params.PollMethod)) + ISPProtocol_DelayMS(Erase_Chip_Params.EraseDelayMS); + else + ResponseStatus = ISPTarget_WaitWhileTargetBusy(); + + Endpoint_Write_8(CMD_CHIP_ERASE_ISP); + Endpoint_Write_8(ResponseStatus); + Endpoint_ClearIN(); +} + +/** Handler for the CMD_READ_FUSE_ISP, CMD_READ_LOCK_ISP, CMD_READ_SIGNATURE_ISP and CMD_READ_OSCCAL commands, + * reading the requested configuration byte from the device. + * + * \param[in] V2Command Issued V2 Protocol command byte from the host + */ +void ISPProtocol_ReadFuseLockSigOSCCAL(uint8_t V2Command) +{ + struct + { + uint8_t RetByte; + uint8_t ReadCommandBytes[4]; + } Read_FuseLockSigOSCCAL_Params; + + Endpoint_Read_Stream_LE(&Read_FuseLockSigOSCCAL_Params, sizeof(Read_FuseLockSigOSCCAL_Params), NULL); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + uint8_t ResponseBytes[4]; + + /* Send the Fuse or Lock byte read commands as given by the host to the device, store response */ + for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++) + ResponseBytes[RByte] = ISPTarget_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]); + + Endpoint_Write_8(V2Command); + Endpoint_Write_8(STATUS_CMD_OK); + Endpoint_Write_8(ResponseBytes[Read_FuseLockSigOSCCAL_Params.RetByte - 1]); + Endpoint_Write_8(STATUS_CMD_OK); + Endpoint_ClearIN(); +} + +/** Handler for the CMD_WRITE_FUSE_ISP and CMD_WRITE_LOCK_ISP commands, writing the requested configuration + * byte to the device. + * + * \param[in] V2Command Issued V2 Protocol command byte from the host + */ +void ISPProtocol_WriteFuseLock(uint8_t V2Command) +{ + struct + { + uint8_t WriteCommandBytes[4]; + } Write_FuseLockSig_Params; + + Endpoint_Read_Stream_LE(&Write_FuseLockSig_Params, sizeof(Write_FuseLockSig_Params), NULL); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + /* Send the Fuse or Lock byte program commands as given by the host to the device */ + for (uint8_t SByte = 0; SByte < sizeof(Write_FuseLockSig_Params.WriteCommandBytes); SByte++) + ISPTarget_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]); + + Endpoint_Write_8(V2Command); + Endpoint_Write_8(STATUS_CMD_OK); + Endpoint_Write_8(STATUS_CMD_OK); + Endpoint_ClearIN(); +} + +/** Handler for the CMD_SPI_MULTI command, writing and reading arbitrary SPI data to and from the attached device. */ +void ISPProtocol_SPIMulti(void) +{ + struct + { + uint8_t TxBytes; + uint8_t RxBytes; + uint8_t RxStartAddr; + uint8_t TxData[255]; + } SPI_Multi_Params; + + Endpoint_Read_Stream_LE(&SPI_Multi_Params, (sizeof(SPI_Multi_Params) - sizeof(SPI_Multi_Params.TxData)), NULL); + Endpoint_Read_Stream_LE(&SPI_Multi_Params.TxData, SPI_Multi_Params.TxBytes, NULL); + + Endpoint_ClearOUT(); + Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); + Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); + + Endpoint_Write_8(CMD_SPI_MULTI); + Endpoint_Write_8(STATUS_CMD_OK); + + uint8_t CurrTxPos = 0; + uint8_t CurrRxPos = 0; + + /* Write out bytes to transmit until the start of the bytes to receive is met */ + while (CurrTxPos < SPI_Multi_Params.RxStartAddr) + { + if (CurrTxPos < SPI_Multi_Params.TxBytes) + ISPTarget_SendByte(SPI_Multi_Params.TxData[CurrTxPos]); + else + ISPTarget_SendByte(0); + + CurrTxPos++; + } + + /* Transmit remaining bytes with padding as needed, read in response bytes */ + while (CurrRxPos < SPI_Multi_Params.RxBytes) + { + if (CurrTxPos < SPI_Multi_Params.TxBytes) + Endpoint_Write_8(ISPTarget_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++])); + else + Endpoint_Write_8(ISPTarget_ReceiveByte()); + + /* Check to see if we have filled the endpoint bank and need to send the packet */ + if (!(Endpoint_IsReadWriteAllowed())) + { + Endpoint_ClearIN(); + Endpoint_WaitUntilReady(); + } + + CurrRxPos++; + } + + Endpoint_Write_8(STATUS_CMD_OK); + + bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed()); + Endpoint_ClearIN(); + + /* Ensure last packet is a short packet to terminate the transfer */ + if (IsEndpointFull) + { + Endpoint_WaitUntilReady(); + Endpoint_ClearIN(); + Endpoint_WaitUntilReady(); + } +} + +/** Blocking delay for a given number of milliseconds. This provides a simple wrapper around + * the avr-libc provided delay function, so that the delay function can be called with a + * constant value (to prevent run-time floating point operations being required). + * + * \param[in] DelayMS Number of milliseconds to delay for + */ +void ISPProtocol_DelayMS(uint8_t DelayMS) +{ + while (DelayMS-- && TimeoutTicksRemaining) + Delay_MS(1); +} + +#endif + diff --git a/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPProtocol.h b/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPProtocol.h new file mode 100644 index 0000000000..44b339762d --- /dev/null +++ b/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPProtocol.h @@ -0,0 +1,81 @@ +/* + LUFA Library + Copyright (C) Dean Camera, 2017. + + dean [at] fourwalledcubicle [dot] com + www.lufa-lib.org +*/ + +/* + Copyright 2017 Dean Camera (dean [at] fourwalledcubicle [dot] com) + + Permission to use, copy, modify, distribute, and sell this + software and its documentation for any purpose is hereby granted + without fee, provided that the above copyright notice appear in + all copies and that both that the copyright notice and this + permission notice and warranty disclaimer appear in supporting + documentation, and that the name of the author not be used in + advertising or publicity pertaining to distribution of the + software without specific, written prior permission. + + The author disclaims all warranties with regard to this + software, including all implied warranties of merchantability + and fitness. In no event shall the author be liable for any + special, indirect or consequential damages or any damages + whatsoever resulting from loss of use, data or profits, whether + in an action of contract, negligence or other tortious action, + arising out of or in connection with the use or performance of + this software. +*/ + +/** \file + * + * Header file for ISPProtocol.c. + */ + +#ifndef _ISP_PROTOCOL_ +#define _ISP_PROTOCOL_ + + /* Includes: */ + #include <avr/io.h> + #include <util/delay.h> + + #include <LUFA/Drivers/USB/USB.h> + + #include "../V2Protocol.h" + #include "Config/AppConfig.h" + + /* Preprocessor Checks: */ + #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)) + #undef ENABLE_ISP_PROTOCOL + + #if !defined(ENABLE_XPROG_PROTOCOL) + #define ENABLE_XPROG_PROTOCOL + #endif + #endif + + /* Macros: */ + /** Mask for the reading or writing of the high byte in a FLASH word when issuing a low-level programming command. */ + #define READ_WRITE_HIGH_BYTE_MASK (1 << 3) + + #define PROG_MODE_PAGED_WRITES_MASK (1 << 0) + #define PROG_MODE_WORD_TIMEDELAY_MASK (1 << 1) + #define PROG_MODE_WORD_VALUE_MASK (1 << 2) + #define PROG_MODE_WORD_READYBUSY_MASK (1 << 3) + #define PROG_MODE_PAGED_TIMEDELAY_MASK (1 << 4) + #define PROG_MODE_PAGED_VALUE_MASK (1 << 5) + #define PROG_MODE_PAGED_READYBUSY_MASK (1 << 6) + #define PROG_MODE_COMMIT_PAGE_MASK (1 << 7) + + /* Function Prototypes: */ + void ISPProtocol_EnterISPMode(void); + void ISPProtocol_LeaveISPMode(void); + void ISPProtocol_ProgramMemory(const uint8_t V2Command); + void ISPProtocol_ReadMemory(const uint8_t V2Command); + void ISPProtocol_ChipErase(void); + void ISPProtocol_ReadFuseLockSigOSCCAL(const uint8_t V2Command); + void ISPProtocol_WriteFuseLock(const uint8_t V2Command); + void ISPProtocol_SPIMulti(void); + void ISPProtocol_DelayMS(uint8_t DelayMS); +#endif + diff --git a/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c b/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c new file mode 100644 index 0000000000..197b62275d --- /dev/null +++ b/lib/lufa/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c @@ -0,0 +1,370 @@ +/* + LUFA Library + Copyright (C) Dean Camera, 2017. + + dean [at] fourwalledcubicle [dot] com + www.lufa-lib.org +*/ + +/* + Copyright 2017 Dean Camera (dean [at] fourwalledcubicle [dot] com) + + Permission to use, copy, modify, distribute, and sell this + software and its documentation for any purpose is hereby granted + without fee, provided that the above copyright notice appear in + all copies and that both that the copyright notice and this + permission notice and warranty disclaimer appear in supporting + documentation, and that the name of the author not be used in + advertising or publicity pertaining to distribution of the + software without specific, written prior permission. + + The author disclaims all warranties with regard to this + software, including all implied warranties of merchantability + and fitness. In no event shall the author be liable for any + special, indirect or consequential damages or any damages + whatsoever resulting from loss of use, data or profits, whether + in an action of contract, negligence or other tortious action, + arising out of or in connection with the use or performance of + this software. +*/ + +/** \file + * + * Target-related functions for the ISP Protocol decoder. + */ + +#include "ISPTarget.h" + +#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__) + +/** List of hardware SPI prescaler masks for possible AVRStudio ISP programming speeds. + * + * \hideinitializer + */ +static const uint8_t SPIMaskFromSCKDuration[] PROGMEM = +{ +#if (F_CPU == 8000000) + SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 4MHz SPI + SPI_SPEED_FCPU_DIV_2, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI + SPI_SPEED_FCPU_DIV_4, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI + SPI_SPEED_FCPU_DIV_8, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI + SPI_SPEED_FCPU_DIV_16, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI + SPI_SPEED_FCPU_DIV_32, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI + SPI_SPEED_FCPU_DIV_64, // AVRStudio = 125KHz SPI, Actual = 125KHz SPI +#elif (F_CPU == 16000000) + SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 8MHz SPI + SPI_SPEED_FCPU_DIV_4, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI + SPI_SPEED_FCPU_DIV_8, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI + SPI_SPEED_FCPU_DIV_16, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI + SPI_SPEED_FCPU_DIV_32, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI + SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI + SPI_SPEED_FCPU_DIV_128 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI +#else + #error No SPI prescaler masks for chosen F_CPU speed. +#endif +}; + +/** Lookup table to convert the slower ISP speeds into a compare value for the software SPI driver. + * + * \hideinitializer + */ +static const uint16_t TimerCompareFromSCKDuration[] PROGMEM = +{ + TIMER_COMP(96386), TIMER_COMP(89888), TIMER_COMP(84211), TIMER_COMP(79208), TIMER_COMP(74767), + TIMER_COMP(70797), TIMER_COMP(67227), TIMER_COMP(64000), TIMER_COMP(61069), TIMER_COMP(58395), + TIMER_COMP(55945), TIMER_COMP(51613), TIMER_COMP(49690), TIMER_COMP(47905), TIMER_COMP(46243), + TIMER_COMP(43244), TIMER_COMP(41885), TIMER_COMP(39409), TIMER_COMP(38278), TIMER_COMP(36200), + TIMER_COMP(34335), TIMER_COMP(32654), TIMER_COMP(31129), TIMER_COMP(29740), TIMER_COMP(28470), + TIMER_COMP(27304), TIMER_COMP(25724), TIMER_COMP(24768), TIMER_COMP(23461), TIMER_COMP(22285), + TIMER_COMP(21221), TIMER_COMP(20254), TIMER_COMP(19371), TIMER_COMP(18562), TIMER_COMP(17583), + TIMER_COMP(16914), TIMER_COMP(16097), TIMER_COMP(15356), TIMER_COMP(14520), TIMER_COMP(13914), + TIMER_COMP(13224), TIMER_COMP(12599), TIMER_COMP(12031), TIMER_COMP(11511), TIMER_COMP(10944), + TIMER_COMP(10431), TIMER_COMP(9963), TIMER_COMP(9468), TIMER_COMP(9081), TIMER_COMP(8612), + TIMER_COMP(8239), TIMER_COMP(7851), TIMER_COMP(7498), TIMER_COMP(7137), TIMER_COMP(6809), + TIMER_COMP(6478), TIMER_COMP(6178), TIMER_COMP(5879), TIMER_COMP(5607), TIMER_COMP(5359), + TIMER_COMP(5093), TIMER_COMP(4870), TIMER_COMP(4633), TIMER_COMP(4418), TIMER_COMP(4209), + TIMER_COMP(4019), TIMER_COMP(3823), TIMER_COMP(3645), TIMER_COMP(3474), TIMER_COMP(3310), + TIMER_COMP(3161), TIMER_COMP(3011), TIMER_COMP(2869), TIMER_COMP(2734), TIMER_COMP(2611), + TIMER_COMP(2484), TIMER_COMP(2369), TIMER_COMP(2257), TIMER_COMP(2152), TIMER_COMP(2052), + TIMER_COMP(1956), TIMER_COMP(1866), TIMER_COMP(1779), TIMER_COMP(1695), TIMER_COMP(1615), + TIMER_COMP(1539), TIMER_COMP(1468), TIMER_COMP(1398), TIMER_COMP(1333), TIMER_COMP(1271), + TIMER_COMP(1212), TIMER_COMP(1155), TIMER_COMP(1101), TIMER_COMP(1049), TIMER_COMP(1000), + TIMER_COMP(953), TIMER_COMP(909), TIMER_COMP(866), TIMER_COMP(826), TIMER_COMP(787), + TIMER_COMP(750), TIMER_COMP(715), TIMER_COMP(682), TIMER_COMP(650), TIMER_COMP(619), + TIMER_COMP(590), TIMER_COMP(563), TIMER_COMP(536), TIMER_COMP(511), TIMER_COMP(487), + TIMER_COMP(465), TIMER_COMP(443), TIMER_COMP(422), TIMER_COMP(402), TIMER_COMP(384), + TIMER_COMP(366), TIMER_COMP(349), TIMER_COMP(332), TIMER_COMP(317), TIMER_COMP(302), + TIMER_COMP(288), TIMER_COMP(274), TIMER_COMP(261), TIMER_COMP(249), TIMER_COMP(238), + TIMER_COMP(226), TIMER_COMP(216), TIMER_COMP(206), TIMER_COMP(196), TIMER_COMP(187), + TIMER_COMP(178), TIMER_COMP(170), TIMER_COMP(162), TIMER_COMP(154), TIMER_COMP(147), + TIMER_COMP(140), TIMER_COMP(134), TIMER_COMP(128), TIMER_COMP(122), TIMER_COMP(116), + TIMER_COMP(111), TIMER_COMP(105), TIMER_COMP(100), TIMER_COMP(95.4), TIMER_COMP(90.9), + TIMER_COMP(86.6), TIMER_COMP(82.6), TIMER_COMP(78.7), TIMER_COMP(75.0), TIMER_COMP(71.5), + TIMER_COMP(68.2), TIMER_COMP(65.0), TIMER_COMP(61.9), TIMER_COMP(59.0), TIMER_COMP(56.3), + TIMER_COMP(53.6), TIMER_COMP(51.1) +}; + +/** Currently selected SPI driver, either hardware (for fast ISP speeds) or software (for slower ISP speeds). */ +bool HardwareSPIMode = true; + +/** Software SPI data register for sending and receiving */ +static volatile uint8_t SoftSPI_Data; + +/** Number of bits left to transfer in the software SPI driver */ +static volatile uint8_t SoftSPI_BitsRemaining; + + +/** ISR to handle software SPI transmission and reception */ +ISR(TIMER1_COMPA_vect, ISR_BLOCK) +{ + /* Check if rising edge (output next bit) or falling edge (read in next bit) */ + if (!(PINB & (1 << 1))) + { + if (SoftSPI_Data & (1 << 7)) + PORTB |= (1 << 2); + else + PORTB &= ~(1 << 2); + } + else + { + SoftSPI_Data <<= 1; + + if (!(--SoftSPI_BitsRemaining)) + { + TCCR1B = 0; + TIFR1 = (1 << OCF1A); + } + + if (PINB & (1 << 3)) + SoftSPI_Data |= (1 << 0); + } + + /* Fast toggle of PORTB.1 via the PIN register (see datasheet) */ + PINB |= (1 << 1); +} + +/** Initializes the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for + * communication with the attached target. + */ +void ISPTarget_EnableTargetISP(void) +{ + uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION); + + if (SCKDuration < sizeof(SPIMaskFromSCKDuration)) + { + HardwareSPIMode = true; + + SPI_Init(pgm_read_byte(&SPIMaskFromSCKDuration[SCKDuration]) | SPI_ORDER_MSB_FIRST | + SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER); + } + else + { + HardwareSPIMode = false; + + DDRB |= ((1 << 1) | (1 << 2)); + PORTB |= ((1 << 0) | (1 << 3)); + + ISPTarget_ConfigureSoftwareSPI(SCKDuration); + } +} + +/** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no + * further communications can occur until the driver is re-initialized. + */ +void ISPTarget_DisableTargetISP(void) +{ + if (HardwareSPIMode) + { + SPI_Disable(); + } + else + { + DDRB &= ~((1 << 1) | (1 << 2)); + PORTB &= ~((1 << 0) | (1 << 3)); + + /* Must re-enable rescue clock once software ISP has exited, as the timer for the rescue clock is + * re-purposed for software SPI */ + ISPTarget_ConfigureRescueClock(); + } +} + +/** Configures the AVR to produce a 4MHz rescue clock out of the OCR1A pin of the AVR, so + * that it can be fed into the XTAL1 pin of an AVR whose fuses have been mis-configured for + * an external clock rather than a crystal. When used, the ISP speed must be 125KHz for this + * functionality to work correctly. + */ +void ISPTarget_ConfigureRescueClock(void) +{ + #if defined(XCK_RESCUE_CLOCK_ENABLE) + /* Configure XCK as an output for the specified AVR model */ + DDRD |= (1 << 5); + + /* Start USART to generate a 4MHz clock on the XCK pin */ + UBRR1 = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1); + UCSR1B = (1 << TXEN1); + UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | ( |