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authorlokher <lokher@gmail.com>2022-09-13 11:13:00 +0800
committerlokher <lokher@gmail.com>2022-09-13 11:13:00 +0800
commitfe13cedf8c09fa34d5cec4e4c624738095176625 (patch)
tree818436626d49c7f22f325632b2053edba10d4358 /keyboards/bastardkb/tbkmini/blackpill/mcuconf.h
parentfa207545a9759c50b9f230eb608d86a9085801d4 (diff)
parentf46379f308783994b8178f95adc686f4b4c3ebd8 (diff)
merge upstream master
Diffstat (limited to 'keyboards/bastardkb/tbkmini/blackpill/mcuconf.h')
-rw-r--r--keyboards/bastardkb/tbkmini/blackpill/mcuconf.h61
1 files changed, 61 insertions, 0 deletions
diff --git a/keyboards/bastardkb/tbkmini/blackpill/mcuconf.h b/keyboards/bastardkb/tbkmini/blackpill/mcuconf.h
new file mode 100644
index 0000000000..e7cf3681fd
--- /dev/null
+++ b/keyboards/bastardkb/tbkmini/blackpill/mcuconf.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2020 Nick Brassel (tzarc)
+ * Copyright 2021 Stefan Kerkmann (@KarlK90)
+ * Copyright 2022 Charly Delay <charly@codesink.dev> (@0xcharly)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#pragma once
+
+#include_next <mcuconf.h>
+
+#undef STM32_I2C_USE_I2C1
+#define STM32_I2C_USE_I2C1 FALSE
+
+//#undef STM32_I2C_I2C1_RX_DMA_STREAM
+//#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+//#undef STM32_I2C_I2C1_TX_DMA_STREAM
+//#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+
+#undef STM32_PWM_USE_TIM2
+#define STM32_PWM_USE_TIM2 TRUE
+
+//#undef STM32_PWM_USE_TIM3
+//#define STM32_PWM_USE_TIM3 TRUE
+
+#undef STM32_SPI_USE_SPI1
+#define STM32_SPI_USE_SPI1 TRUE
+
+//#undef STM32_SPI_SPI1_RX_DMA_STREAM
+//#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
+//#undef STM32_SPI_SPI1_TX_DMA_STREAM
+//#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
+
+#undef STM32_SERIAL_USE_USART1
+#define STM32_SERIAL_USE_USART1 TRUE
+
+//#undef STM32_SERIAL_USE_USART2
+//#define STM32_SERIAL_USE_USART2 TRUE
+
+//#undef STM32_UART_USART2_RX_DMA_STREAM
+//#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+//#undef STM32_UART_USART2_TX_DMA_STREAM
+//#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+
+#undef STM32_GPT_USE_TIM3
+#define STM32_GPT_USE_TIM3 TRUE
+
+#undef STM32_ST_USE_TIMER
+#define STM32_ST_USE_TIMER 5