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authorstein3 <stein3@gmail.com>2020-10-06 07:15:41 -0700
committerstein3 <stein3@gmail.com>2020-10-06 07:15:41 -0700
commit2e402741a89c5eec8cf30c966ce6f36d6ec9249b (patch)
tree3592e8c5e6bd19943ae55db7fc02a5f755afbb51 /drivers
parent3e5e4f74272c610bb9fa737f674f8e65ed6100ca (diff)
parent2013f6313430b977e557e482d30daa279a46e75d (diff)
Merge branch 'master' into meteor
Diffstat (limited to 'drivers')
-rw-r--r--drivers/avr/analog.c10
-rw-r--r--drivers/avr/ssd1306.c5
-rw-r--r--drivers/avr/ssd1306.h2
-rw-r--r--drivers/boards/BLACKPILL_STM32_F401/board.c250
-rw-r--r--drivers/boards/BLACKPILL_STM32_F401/board.h568
-rw-r--r--drivers/boards/BLACKPILL_STM32_F401/board.mk9
-rw-r--r--drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg1193
-rw-r--r--drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp15
-rw-r--r--drivers/boards/BLACKPILL_STM32_F411/board.c250
-rw-r--r--drivers/boards/BLACKPILL_STM32_F411/board.h583
-rw-r--r--drivers/boards/BLACKPILL_STM32_F411/board.mk9
-rw-r--r--drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg1193
-rw-r--r--drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp15
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/board.c250
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/board.h407
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/board.mk9
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h7
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg703
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp15
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/board.c242
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/board.h475
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/board.mk5
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h7
-rw-r--r--drivers/boards/IC_TEENSY_3_1/board.c146
-rw-r--r--drivers/boards/IC_TEENSY_3_1/board.h295
-rw-r--r--drivers/boards/IC_TEENSY_3_1/board.mk5
-rw-r--r--drivers/boards/STM32_F103_STM32DUINO/board.c56
-rw-r--r--drivers/boards/STM32_F103_STM32DUINO/board.h166
-rw-r--r--drivers/boards/STM32_F103_STM32DUINO/board.mk5
-rw-r--r--drivers/boards/ld/MKL26Z64.ld105
-rw-r--r--drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld88
-rw-r--r--drivers/chibios/ws2812_pwm.c10
-rw-r--r--drivers/issi/is31fl3741.c81
-rw-r--r--drivers/issi/is31fl3741.h381
-rw-r--r--drivers/oled/oled_driver.c58
-rw-r--r--drivers/oled/oled_driver.h13
36 files changed, 470 insertions, 7161 deletions
diff --git a/drivers/avr/analog.c b/drivers/avr/analog.c
index 9b8397b933..8d299ffdb9 100644
--- a/drivers/avr/analog.c
+++ b/drivers/avr/analog.c
@@ -97,10 +97,11 @@ uint8_t pinToMux(pin_t pin) {
#endif
// clang-format on
}
+ return 0;
}
int16_t adc_read(uint8_t mux) {
- uint8_t low;
+ uint16_t low;
// Enable ADC and configure prescaler
ADCSRA = _BV(ADEN) | ADC_PRESCALER;
@@ -128,5 +129,10 @@ int16_t adc_read(uint8_t mux) {
// Must read LSB first
low = ADCL;
// Must read MSB only once!
- return (ADCH << 8) | low;
+ low |= (ADCH << 8);
+
+ // turn off the ADC
+ ADCSRA &= ~(1 << ADEN);
+
+ return low;
}
diff --git a/drivers/avr/ssd1306.c b/drivers/avr/ssd1306.c
index 61d7a99531..1a09a2bcb7 100644
--- a/drivers/avr/ssd1306.c
+++ b/drivers/avr/ssd1306.c
@@ -5,15 +5,14 @@
# include <string.h>
# include "print.h"
# include "glcdfont.c"
-# ifdef ADAFRUIT_BLE_ENABLE
-# include "adafruit_ble.h"
-# endif
# ifdef PROTOCOL_LUFA
# include "lufa.h"
# endif
# include "sendchar.h"
# include "timer.h"
+struct CharacterMatrix display;
+
// Set this to 1 to help diagnose early startup problems
// when testing power-on with ble. Turn it off otherwise,
// as the latency of printing most of the debug info messes
diff --git a/drivers/avr/ssd1306.h b/drivers/avr/ssd1306.h
index 9669d1b7e7..9131afcf61 100644
--- a/drivers/avr/ssd1306.h
+++ b/drivers/avr/ssd1306.h
@@ -66,7 +66,7 @@ struct CharacterMatrix {
bool dirty;
};
-struct CharacterMatrix display;
+extern struct CharacterMatrix display;
bool iota_gfx_init(void);
void iota_gfx_task(void);
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.c b/drivers/boards/BLACKPILL_STM32_F401/board.c
deleted file mode 100644
index 330e06c8aa..0000000000
--- a/drivers/boards/BLACKPILL_STM32_F401/board.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#include "hal.h"
-#include "stm32_gpio.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of STM32 GPIO port setup.
- */
-typedef struct {
- uint32_t moder;
- uint32_t otyper;
- uint32_t ospeedr;
- uint32_t pupdr;
- uint32_t odr;
- uint32_t afrl;
- uint32_t afrh;
-} gpio_setup_t;
-
-/**
- * @brief Type of STM32 GPIO initialization data.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
- gpio_setup_t PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
- gpio_setup_t PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
- gpio_setup_t PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
- gpio_setup_t PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- gpio_setup_t PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- gpio_setup_t PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- gpio_setup_t PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
- gpio_setup_t PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
- gpio_setup_t PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
- gpio_setup_t PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
- gpio_setup_t PKData;
-#endif
-} gpio_config_t;
-
-/**
- * @brief STM32 GPIO static initialization data.
- */
-static const gpio_config_t gpio_default_config = {
-#if STM32_HAS_GPIOA
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
- {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
- {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
- {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
-#endif
-#if STM32_HAS_GPIOJ
- {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
-#endif
-#if STM32_HAS_GPIOK
- {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
-#endif
-};
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
- gpiop->OTYPER = config->otyper;
- gpiop->OSPEEDR = config->ospeedr;
- gpiop->PUPDR = config->pupdr;
- gpiop->ODR = config->odr;
- gpiop->AFRL = config->afrl;
- gpiop->AFRH = config->afrh;
- gpiop->MODER = config->moder;
-}
-
-static void stm32_gpio_init(void) {
- /* Enabling GPIO-related clocks, the mask comes from the
- registry header file.*/
- rccResetAHB1(STM32_GPIO_EN_MASK);
- rccEnableAHB1(STM32_GPIO_EN_MASK, true);
-
- /* Initializing all the defined GPIO ports.*/
-#if STM32_HAS_GPIOA
- gpio_init(GPIOA, &gpio_default_config.PAData);
-#endif
-#if STM32_HAS_GPIOB
- gpio_init(GPIOB, &gpio_default_config.PBData);
-#endif
-#if STM32_HAS_GPIOC
- gpio_init(GPIOC, &gpio_default_config.PCData);
-#endif
-#if STM32_HAS_GPIOD
- gpio_init(GPIOD, &gpio_default_config.PDData);
-#endif
-#if STM32_HAS_GPIOE
- gpio_init(GPIOE, &gpio_default_config.PEData);
-#endif
-#if STM32_HAS_GPIOF
- gpio_init(GPIOF, &gpio_default_config.PFData);
-#endif
-#if STM32_HAS_GPIOG
- gpio_init(GPIOG, &gpio_default_config.PGData);
-#endif
-#if STM32_HAS_GPIOH
- gpio_init(GPIOH, &gpio_default_config.PHData);
-#endif
-#if STM32_HAS_GPIOI
- gpio_init(GPIOI, &gpio_default_config.PIData);
-#endif
-#if STM32_HAS_GPIOJ
- gpio_init(GPIOJ, &gpio_default_config.PJData);
-#endif
-#if STM32_HAS_GPIOK
- gpio_init(GPIOK, &gpio_default_config.PKData);
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
-
-/**
- * @brief Early initialization code.
- * @details GPIO ports and system clocks are initialized before everything
- * else.
- */
-void __early_init(void) {
- enter_bootloader_mode_if_requested();
-
- stm32_gpio_init();
- stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {}
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.h b/drivers/boards/BLACKPILL_STM32_F401/board.h
deleted file mode 100644
index 2d1cd9ff72..0000000000
--- a/drivers/boards/BLACKPILL_STM32_F401/board.h
+++ /dev/null
@@ -1,568 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#ifndef BOARD_H
-#define BOARD_H
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-/*
- * Setup for STM32F401CCU6 black pill board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_BLACKPILL_STM32_F401
-#define BOARD_NAME "STM32F401CCU6 blackpill"
-
-/*
- * Allow Board to boot USB without extra A9 hardware/software config
- */
-#define BOARD_OTG_NOVBUSSENS 1
-
-/*
- * Board oscillators-related settings.
- */
-#if !defined(STM32_LSECLK)
-# define STM32_LSECLK 32768U
-#endif
-
-#if !defined(STM32_HSECLK)
-# define STM32_HSECLK 25000000U
-#endif
-
-/*
- * Board voltages.
- * Required for performance limits calculation.
- */
-#define STM32_VDD 300U
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F401xC
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON 0U
-#define GPIOA_PIN1 1U
-#define GPIOA_PIN2 2U
-#define GPIOA_PIN3 3U
-#define GPIOA_CS43L22_LRCK 4U
-#define GPIOA_L3GD20_SCL 5U
-#define GPIOA_L3GD20_SD0 6U
-#define GPIOA_L3GD20_SDI 7U
-#define GPIOA_PIN8 8U
-#define GPIOA_VBUS_FS 9U
-#define GPIOA_OTG_FS_ID 10U
-#define GPIOA_OTG_FS_DM 11U
-#define GPIOA_OTG_FS_DP 12U
-#define GPIOA_SWDIO 13U
-#define GPIOA_SWCLK 14U
-#define GPIOA_PIN15 15U
-
-#define GPIOB_PIN0 0U
-#define GPIOB_PIN1 1U
-#define GPIOB_PIN2 2U
-#define GPIOB_SWO 3U
-#define GPIOB_PIN4 4U
-#define GPIOB_PIN5 5U
-#define GPIOB_LSM303DLHC_SCL 6U
-#define GPIOB_PIN7 7U
-#define GPIOB_PIN8 8U
-#define GPIOB_LSM303DLHC_SDA 9U
-#define GPIOB_MP45DT02_CLK_IN 10U
-#define GPIOB_PIN11 11U
-#define GPIOB_PIN12 12U
-#define GPIOB_PIN13 13U
-#define GPIOB_PIN14 14U
-#define GPIOB_PIN15 15U
-
-#define GPIOC_OTG_FS_POWER_ON 0U
-#define GPIOC_PIN1 1U
-#define GPIOC_PIN2 2U
-#define GPIOC_CS43L22_AIN4x 3U
-#define GPIOC_MP45DT02_PDM_OUT 3U
-#define GPIOC_PIN4 4U
-#define GPIOC_PIN5 5U
-#define GPIOC_PIN6 6U
-#define GPIOC_CS43L22_MCLK 7U
-#define GPIOC_PIN8 8U
-#define GPIOC_PIN9 9U
-#define GPIOC_CS43L22_SCLK 10U
-#define GPIOC_PIN11 11U
-#define GPIOC_CS43L22_SDIN 12U
-#define GPIOC_PIN13 13U
-#define GPIOC_OSC32_IN 14U
-#define GPIOC_OSC32_OUT 15U
-
-#define GPIOD_PIN0 0U
-#define GPIOD_PIN1 1U
-#define GPIOD_PIN2 2U
-#define GPIOD_PIN3 3U
-#define GPIOD_CS43L22_RESET 4U
-#define GPIOD_OverCurrent 5U
-#define GPIOD_PIN6 6U
-#define GPIOD_PIN7 7U
-#define GPIOD_PIN8 8U
-#define GPIOD_PIN9 9U
-#define GPIOD_PIN10 10U
-#define GPIOD_PIN11 11U
-#define GPIOD_LED4 12U
-#define GPIOD_LED3 13U
-#define GPIOD_LED5 14U
-#define GPIOD_LED6 15U
-
-#define GPIOE_L3GD20_INT1 0U
-#define GPIOE_L3GD20_INT2 1U
-#define GPIOE_LSM303DLHC_DRDY 2U
-#define GPIOE_L3GD20_CS 3U
-#define GPIOE_LSM303DLHC_INT1 4U
-#define GPIOE_LSM303DLHC_INT2 5U
-#define GPIOE_PIN6 6U
-#define GPIOE_PIN7 7U
-#define GPIOE_PIN8 8U
-#define GPIOE_PIN9 9U
-#define GPIOE_PIN10 10U
-#define GPIOE_PIN11 11U
-#define GPIOE_PIN12 12U
-#define GPIOE_PIN13 13U
-#define GPIOE_PIN14 14U
-#define GPIOE_PIN15 15U
-
-#define GPIOF_PIN0 0U
-#define GPIOF_PIN1 1U
-#define GPIOF_PIN2 2U
-#define GPIOF_PIN3 3U
-#define GPIOF_PIN4 4U
-#define GPIOF_PIN5 5U
-#define GPIOF_PIN6 6U
-#define GPIOF_PIN7 7U
-#define GPIOF_PIN8 8U
-#define GPIOF_PIN9 9U
-#define GPIOF_PIN10 10U
-#define GPIOF_PIN11 11U
-#define GPIOF_PIN12 12U
-#define GPIOF_PIN13 13U
-#define GPIOF_PIN14 14U
-#define GPIOF_PIN15 15U
-
-#define GPIOG_PIN0 0U
-#define GPIOG_PIN1 1U
-#define GPIOG_PIN2 2U
-#define GPIOG_PIN3 3U
-#define GPIOG_PIN4 4U
-#define GPIOG_PIN5 5U
-#define GPIOG_PIN6 6U
-#define GPIOG_PIN7 7U
-#define GPIOG_PIN8 8U
-#define GPIOG_PIN9 9U
-#define GPIOG_PIN10 10U
-#define GPIOG_PIN11 11U
-#define GPIOG_PIN12 12U
-#define GPIOG_PIN13 13U
-#define GPIOG_PIN14 14U
-#define GPIOG_PIN15 15U
-
-#define GPIOH_OSC_IN 0U
-#define GPIOH_OSC_OUT 1U
-#define GPIOH_PIN2 2U
-#define GPIOH_PIN3 3U
-#define GPIOH_PIN4 4U
-#define GPIOH_PIN5 5U
-#define GPIOH_PIN6 6U
-#define GPIOH_PIN7 7U
-#define GPIOH_PIN8 8U
-#define GPIOH_PIN9 9U
-#define GPIOH_PIN10 10U
-#define GPIOH_PIN11 11U
-#define GPIOH_PIN12 12U
-#define GPIOH_PIN13 13U
-#define GPIOH_PIN14 14U
-#define GPIOH_PIN15 15U
-
-#define GPIOI_PIN0 0U
-#define GPIOI_PIN1 1U
-#define GPIOI_PIN2 2U
-#define GPIOI_PIN3 3U
-#define GPIOI_PIN4 4U
-#define GPIOI_PIN5 5U
-#define GPIOI_PIN6 6U
-#define GPIOI_PIN7 7U
-#define GPIOI_PIN8 8U
-#define GPIOI_PIN9 9U
-#define GPIOI_PIN10 10U
-#define GPIOI_PIN11 11U
-#define GPIOI_PIN12 12U
-#define GPIOI_PIN13 13U
-#define GPIOI_PIN14 14U
-#define GPIOI_PIN15 15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
-#define LINE_CS43L22_LRCK PAL_LINE(GPIOA, 4U)
-#define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U)
-#define LINE_L3GD20_SD0 PAL_LINE(GPIOA, 6U)
-#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
-#define LINE_VBUS_FS PAL_LINE(GPIOA, 9U)
-#define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U)
-#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
-#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
-#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
-#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
-#define LINE_SWO PAL_LINE(GPIOB, 3U)
-#define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U)
-#define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 9U)
-#define LINE_MP45DT02_CLK_IN PAL_LINE(GPIOB, 10U)
-#define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U)
-#define LINE_CS43L22_AIN4x PAL_LINE(GPIOC, 3U)
-#define LINE_MP45DT02_PDM_OUT PAL_LINE(GPIOC, 3U)
-#define LINE_CS43L22_MCLK PAL_LINE(GPIOC, 7U)
-#define LINE_CS43L22_SCLK PAL_LINE(GPIOC, 10U)
-#define LINE_CS43L22_SDIN PAL_LINE(GPIOC, 12U)
-#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
-#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
-#define LINE_CS43L22_RESET PAL_LINE(GPIOD, 4U)
-#define LINE_OverCurrent PAL_LINE(GPIOD, 5U)
-#define LINE_LED4 PAL_LINE(GPIOD, 12U)
-#define LINE_LED3 PAL_LINE(GPIOD, 13U)
-#define LINE_LED5 PAL_LINE(GPIOD, 14U)
-#define LINE_LED6 PAL_LINE(GPIOD, 15U)
-#define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U)
-#define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U)
-#define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U)
-#define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U)
-#define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U)
-#define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U)
-#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
-#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n) (0U << ((n)*2U))
-#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U))
-#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U))
-#define PIN_MODE_ANALOG(n) (3U << ((n)*2U))
-#define PIN_ODR_LOW(n) (0U << (n))
-#define PIN_ODR_HIGH(n) (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
-#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U))
-#define PIN_OSPEED_LOW(n) (1U << ((n)*2U))
-#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U))
-#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U))
-#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U))
-#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U))
-#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U))
-#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0 - BUTTON (input floating).
- * PA1 - PIN1 (input pullup).
- * PA2 - PIN2 (input pullup).
- * PA3 - PIN3 (input pullup).
- * PA4 - CS43L22_LRCK (alternate 6).
- * PA5 - L3GD20_SCL (alternate 5).
- * PA6 - L3GD20_SD0 (alternate 5).
- * PA7 - L3GD20_SDI (alternate 5).
- * PA8 - PIN8 (input pullup).
- * PA9 - VBUS_FS (input floating).
- * PA10 - OTG_FS_ID (alternate 10).
- * PA11 - OTG_FS_DM (alternate 10).
- * PA12 - OTG_FS_DP (alternate 10).
- * PA13 - SWDIO (alternate 0).
- * PA14 - SWCLK (alternate 0).
- * PA15 - PIN15 (input pullup).
- */
-#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_ALTERNATE(GPIOA_CS43L22_LRCK) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SCL) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SD0) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SDI) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_VBUS_FS) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_CS43L22_LRCK) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SCL) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SD0) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SDI) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON) | PIN_OSPEED_HIGH(GPIOA_PIN1) | PIN_OSPEED_HIGH(GPIOA_PIN2) | PIN_OSPEED_HIGH(GPIOA_PIN3) | PIN_OSPEED_HIGH(GPIOA_CS43L22_LRCK) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SCL) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SD0) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SDI) | PIN_OSPEED_HIGH(GPIOA_PIN8) | PIN_OSPEED_HIGH(GPIOA_VBUS_FS) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | PIN_PUPDR_PULLUP(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_FLOATING(GPIOA_CS43L22_LRCK) | PIN_PUPDR_FLOATING(GPIOA_L3GD20_SCL) | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SD0) | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SDI) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | PIN_PUPDR_FLOATING(GPIOA_SWDIO) | PIN_PUPDR_FLOATING(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_CS43L22_LRCK) | PIN_ODR_HIGH(GPIOA_L3GD20_SCL) | PIN_ODR_HIGH(GPIOA_L3GD20_SD0) | PIN_ODR_HIGH(GPIOA_L3GD20_SDI) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_VBUS_FS) | PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | PIN_AFIO_AF(GPIOA_PIN1, 0U) | PIN_AFIO_AF(GPIOA_PIN2, 0U) | PIN_AFIO_AF(GPIOA_PIN3, 0U) | PIN_AFIO_AF(GPIOA_CS43L22_LRCK, 6U) | PIN_AFIO_AF(GPIOA_L3GD20_SCL, 5U) | PIN_AFIO_AF(GPIOA_L3GD20_SD0, 5U) | PIN_AFIO_AF(GPIOA_L3GD20_SDI, 5U))
-#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | PIN_AFIO_AF(GPIOA_VBUS_FS, 0U) | PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U))
-
-/*
- * GPIOB setup:
- *
- * PB0 - PIN0 (input pullup).
- * PB1 - PIN1 (input pullup).
- * PB2 - PIN2 (input pullup).
- * PB3 - SWO (alternate 0).
- * PB4 - PIN4 (input pullup).
- * PB5 - PIN5 (input pullup).
- * PB6 - LSM303DLHC_SCL (alternate 4).
- * PB7 - PIN7 (input pullup).
- * PB8 - PIN8 (input pullup).
- * PB9 - LSM303DLHC_SDA (alternate 4).
- * PB10 - MP45DT02_CLK_IN (alternate 5).
- * PB11 - PIN11 (input pullup).
- * PB12 - PIN12 (input pullup).
- * PB13 - PIN13 (input pullup).
- * PB14 - PIN14 (input pullup).
- * PB15 - PIN15 (input pullup).
- */
-#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_SWO) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SCL) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SDA) | PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SCL) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SDA) | PIN_OTYPE_PUSHPULL(GPIOB_MP45DT02_CLK_IN) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | PIN_OSPEED_HIGH(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_SWO) | PIN_OSPEED_HIGH(GPIOB_PIN4) | PIN_OSPEED_HIGH(GPIOB_PIN5) | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SCL) | PIN_OSPEED_HIGH(GPIOB_PIN7) | PIN_OSPEED_HIGH(GPIOB_PIN8) | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SDA) | PIN_OSPEED_HIGH(GPIOB_MP45DT02_CLK_IN) | PIN_OSPEED_HIGH(GPIOB_PIN11) | PIN_OSPEED_HIGH(GPIOB_PIN12) | PIN_OSPEED_HIGH(GPIOB_PIN13) | PIN_OSPEED_HIGH(GPIOB_PIN14) | PIN_OSPEED_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_SWO) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SCL) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SDA) | PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_SWO) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SCL) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SDA) | PIN_ODR_HIGH(GPIOB_MP45DT02_CLK_IN) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15))